Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
/* This file contains two passes of the compiler: reg_scan and reg_class.
/* Data for initializing the above. */
-static char initial_fixed_regs[] = FIXED_REGISTERS;
+static const char initial_fixed_regs[] = FIXED_REGISTERS;
/* Indexed by hard register number, contains 1 for registers
that are fixed use or are clobbered by function calls.
/* Data for initializing the above. */
-static char initial_call_used_regs[] = CALL_USED_REGISTERS;
+static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
+
+/* This is much like call_used_regs, except it doesn't have to
+ be a superset of FIXED_REGISTERS. This vector indicates
+ what is really call clobbered, and is used when defining
+ regs_invalidated_by_call. */
+
+#ifdef CALL_REALLY_USED_REGISTERS
+char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
+#endif
/* Indexed by hard register number, contains 1 for registers that are
fixed use or call used registers that cannot hold quantities across
and are also considered fixed. */
char global_regs[FIRST_PSEUDO_REGISTER];
-
+
+/* Contains 1 for registers that are set or clobbered by calls. */
+/* ??? Ideally, this would be just call_used_regs plus global_regs, but
+ for someone's bright idea to have call_used_regs strictly include
+ fixed_regs. Which leaves us guessing as to the set of fixed_regs
+ that are actually preserved. We know for sure that those associated
+ with the local stack frame are safe, but scant others. */
+
+HARD_REG_SET regs_invalidated_by_call;
+
/* Table of register numbers in the order in which to try to use them. */
#ifdef REG_ALLOC_ORDER
int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
/* The same information, but as an array of unsigned ints. We copy from
these unsigned ints to the table above. We do this so the tm.h files
- do not have to be aware of the wordsize for machines with <= 64 regs. */
+ do not have to be aware of the wordsize for machines with <= 64 regs.
+ Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
#define N_REG_INTS \
- ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT)
+ ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
= REG_CLASS_CONTENTS;
static struct reg_info_data *reg_info_head;
/* No more global register variables may be declared; true once
- regclass has been initialized. */
+ regclass has been initialized. */
static int no_global_reg_vars = 0;
void
init_reg_sets ()
{
- register int i, j;
+ int i, j;
/* First copy the register information from the initial int form into
the regsets. */
{
CLEAR_HARD_REG_SET (reg_class_contents[i]);
+ /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
- if (int_reg_class_contents[i][j / HOST_BITS_PER_INT]
- & ((unsigned) 1 << (j % HOST_BITS_PER_INT)))
+ if (int_reg_class_contents[i][j / 32]
+ & ((unsigned) 1 << (j % 32)))
SET_HARD_REG_BIT (reg_class_contents[i], j);
}
static void
init_reg_sets_1 ()
{
- register unsigned int i, j;
- register unsigned int /* enum machine_mode */ m;
+ unsigned int i, j;
+ unsigned int /* enum machine_mode */ m;
char allocatable_regs_of_mode [MAX_MACHINE_MODE];
/* This macro allows the fixed or call-used registers
register /* Declare it register if it's a scalar. */
#endif
HARD_REG_SET c;
- register int k;
+ int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
register /* Declare it register if it's a scalar. */
#endif
HARD_REG_SET c;
- register int k;
+ int k;
COPY_HARD_REG_SET (c, reg_class_contents[i]);
IOR_HARD_REG_SET (c, reg_class_contents[j]);
CLEAR_HARD_REG_SET (fixed_reg_set);
CLEAR_HARD_REG_SET (call_used_reg_set);
CLEAR_HARD_REG_SET (call_fixed_reg_set);
+ CLEAR_HARD_REG_SET (regs_invalidated_by_call);
memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
SET_HARD_REG_BIT (call_fixed_reg_set, i);
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
+
+ /* There are a couple of fixed registers that we know are safe to
+ exclude from being clobbered by calls:
+
+ The frame pointer is always preserved across calls. The arg pointer
+ is if it is fixed. The stack pointer usually is, unless
+ RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
+ If we are generating PIC code, the PIC offset table register is
+ preserved across calls, though the target can override that. */
+
+ if (i == STACK_POINTER_REGNUM || i == FRAME_POINTER_REGNUM)
+ ;
+#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ else if (i == HARD_FRAME_POINTER_REGNUM)
+ ;
+#endif
+#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
+ ;
+#endif
+#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+ else if (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
+ ;
+#endif
+ else if (0
+#ifdef CALL_REALLY_USED_REGISTERS
+ || call_really_used_regs[i]
+#else
+ || call_used_regs[i]
+#endif
+ || global_regs[i])
+ SET_HARD_REG_BIT (regs_invalidated_by_call, i);
}
+
memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
memset (allocatable_regs_of_mode, 0, sizeof (allocatable_regs_of_mode));
for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
}
else
{
- cost = i == j ? 2 : REGISTER_MOVE_COST (m, i, j);
+ cost = REGISTER_MOVE_COST (m, i, j);
for (p2 = ®_class_subclasses[j][0];
*p2 != LIM_REG_CLASSES;
static void
init_reg_modes ()
{
- register int i;
+ int i;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
enum reg_class altclass;
int partial_cost = 0;
/* We need a memory reference to feed to SECONDARY... macros. */
- /* mem may be unused even if the SECONDARY_ macros are defined. */
+ /* mem may be unused even if the SECONDARY_ macros are defined. */
rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
{
fixed_regs[i] = fixed;
call_used_regs[i] = call_used;
+#ifdef CALL_REALLY_USED_REGISTERS
+ if (fixed == 0)
+ call_really_used_regs[i] = call_used;
+#endif
}
}
else
static struct reg_pref *reg_pref;
-/* Allocated buffers for reg_pref. */
+/* Allocated buffers for reg_pref. */
static struct reg_pref *reg_pref_buffer;
-/* Account for the fact that insns within a loop are executed very commonly,
- but don't keep doing this as loops go too deep. */
+/* Frequency of executions of current insn. */
-static int loop_cost;
+static int frequency;
static rtx scan_one_insn PARAMS ((rtx, int));
static void record_operand_costs PARAMS ((rtx, struct costs *, struct reg_pref *));
before regclass is run. */
reg_pref = NULL;
- /* No more global register variables may be declared. */
+ /* No more global register variables may be declared. */
no_global_reg_vars = 1;
}
\f
if (GET_CODE (recog_data.operand[i]) == MEM)
record_address_regs (XEXP (recog_data.operand[i], 0),
- BASE_REG_CLASS, loop_cost * 2);
+ BASE_REG_CLASS, frequency * 2);
else if (constraints[i][0] == 'p')
record_address_regs (recog_data.operand[i],
- BASE_REG_CLASS, loop_cost * 2);
+ BASE_REG_CLASS, frequency * 2);
}
/* Check for commutative in a separate loop so everything will
costs[REGNO (SET_DEST (set))].mem_cost
-= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)),
GENERAL_REGS, 1)
- * loop_cost);
+ * frequency);
record_address_regs (XEXP (SET_SRC (set), 0),
- BASE_REG_CLASS, loop_cost * 2);
+ BASE_REG_CLASS, frequency * 2);
return insn;
}
/* This makes one more setting of new insns's dest. */
REG_N_SETS (REGNO (recog_data.operand[0]))++;
REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
*recog_data.operand_loc[1] = recog_data.operand[0];
REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
for (i = recog_data.n_dups - 1; i >= 0; i--)
if (recog_data.dup_num[i] == 1)
{
*recog_data.dup_loc[i] = recog_data.operand[0];
REG_N_REFS (REGNO (recog_data.operand[0]))++;
+ REG_FREQ (REGNO (recog_data.operand[0])) += frequency;
}
return PREV_INSN (newinsn);
int regno = REGNO (recog_data.operand[i]);
struct costs *p = &costs[regno], *q = &op_costs[i];
- p->mem_cost += q->mem_cost * loop_cost;
+ p->mem_cost += q->mem_cost * frequency;
for (j = 0; j < N_REG_CLASSES; j++)
- p->cost[j] += q->cost[j] * loop_cost;
+ p->cost[j] += q->cost[j] * frequency;
}
return insn;
int nregs;
FILE *dump;
{
- register rtx insn;
- register int i;
+ rtx insn;
+ int i;
int pass;
init_recog ();
{
rtx r = gen_rtx_REG (VOIDmode, 0);
enum machine_mode m;
- register int j;
+ int j;
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
if (!optimize)
{
- loop_cost = 1;
+ frequency = REG_FREQ_MAX;
for (insn = f; insn; insn = NEXT_INSN (insn))
insn = scan_one_insn (insn, pass);
}
times more than insns outside a loop. This is much more
aggressive than the assumptions made elsewhere and is being
tried as an experiment. */
- if (optimize_size)
- loop_cost = 1;
- else
- loop_cost = 1 << (2 * MIN (bb->loop_depth, 5));
+ frequency = REG_FREQ_FROM_BB (bb);
for (insn = bb->head; ; insn = NEXT_INSN (insn))
{
insn = scan_one_insn (insn, pass);
}
for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
{
- register int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
+ int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
enum reg_class best = ALL_REGS, alt = NO_REGS;
/* This is an enum reg_class, but we call it an int
to save lots of casts. */
- register int class;
- register struct costs *p = &costs[i];
+ int class;
+ struct costs *p = &costs[i];
/* In non-optimizing compilation REG_N_REFS is not initialized
yet. */
for (class = (int) ALL_REGS - 1; class > 0; class--)
{
/* Ignore classes that are too small for this operand or
- invalid for a operand that was auto-incremented. */
+ invalid for an operand that was auto-incremented. */
if (!contains_reg_of_mode [class][PSEUDO_REGNO_MODE (i)]
#ifdef FORBIDDEN_INC_DEC_CLASSES
|| (in_inc_dec[i] && forbidden_inc_dec_class[class])
enum reg_class class;
int scale;
{
- register enum rtx_code code = GET_CODE (x);
+ enum rtx_code code = GET_CODE (x);
switch (code)
{
{
rtx arg0 = XEXP (x, 0);
rtx arg1 = XEXP (x, 1);
- register enum rtx_code code0 = GET_CODE (arg0);
- register enum rtx_code code1 = GET_CODE (arg1);
+ enum rtx_code code0 = GET_CODE (arg0);
+ enum rtx_code code1 = GET_CODE (arg1);
/* Look inside subregs. */
if (code0 == SUBREG)
case REG:
{
- register struct costs *pp = &costs[REGNO (x)];
- register int i;
+ struct costs *pp = &costs[REGNO (x)];
+ int i;
pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2;
default:
{
- register const char *fmt = GET_RTX_FORMAT (code);
- register int i;
+ const char *fmt = GET_RTX_FORMAT (code);
+ int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
if (fmt[i] == 'e')
record_address_regs (XEXP (x, i), class, scale);
unsigned int nregs;
int repeat ATTRIBUTE_UNUSED;
{
- register rtx insn;
+ rtx insn;
allocate_reg_info (nregs, TRUE, FALSE);
max_parallel = 3;
rtx last;
unsigned int old_max_regno;
{
- register rtx insn;
+ rtx insn;
allocate_reg_info (max_reg_num (), FALSE, FALSE);
int note_flag;
unsigned int min_regno;
{
- register enum rtx_code code;
- register rtx dest;
- register rtx note;
+ enum rtx_code code;
+ rtx dest;
+ rtx note;
code = GET_CODE (x);
switch (code)
if (GET_CODE (dest) == REG
&& REGNO (dest) >= min_regno)
- REG_N_SETS (REGNO (dest))++;
+ {
+ REG_N_SETS (REGNO (dest))++;
+ REG_N_REFS (REGNO (dest))++;
+ }
/* If this is setting a pseudo from another pseudo or the sum of a
pseudo and a constant integer and the other pseudo is known to be
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
REG_POINTER (SET_DEST (x)) = 1;
+ /* If this is setting a register from a register or from a simple
+ conversion of a register, propagate REG_DECL. */
+ if (GET_CODE (dest) == REG)
+ {
+ rtx src = SET_SRC (x);
+
+ while (GET_CODE (src) == SIGN_EXTEND
+ || GET_CODE (src) == ZERO_EXTEND
+ || GET_CODE (src) == TRUNCATE
+ || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
+ src = XEXP (src, 0);
+
+ if (GET_CODE (src) == REG && REGNO_DECL (REGNO (src)) == 0)
+ REGNO_DECL (REGNO (src)) = REGNO_DECL (REGNO (dest));
+ else if (GET_CODE (src) == REG && REGNO_DECL (REGNO (dest)) == 0)
+ REGNO_DECL (REGNO (dest)) = REGNO_DECL (REGNO (src));
+ }
+
/* ... fall through ... */
default:
{
- register const char *fmt = GET_RTX_FORMAT (code);
- register int i;
+ const char *fmt = GET_RTX_FORMAT (code);
+ int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
reg_scan_mark_refs (XEXP (x, i), insn, note_flag, min_regno);
else if (fmt[i] == 'E' && XVEC (x, i) != 0)
{
- register int j;
+ int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag, min_regno);
}
int
reg_class_subset_p (c1, c2)
- register enum reg_class c1;
- register enum reg_class c2;
+ enum reg_class c1;
+ enum reg_class c2;
{
if (c1 == c2) return 1;
int
reg_classes_intersect_p (c1, c2)
- register enum reg_class c1;
- register enum reg_class c2;
+ enum reg_class c1;
+ enum reg_class c2;
{
#ifdef HARD_REG_SET
register
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