2004-06-03 Chris Demetriou <cgd@broadcom.com>

[pf3gnuchains/gcc-fork.git] / gcc / recog.c

diff --git a/gcc/recog.c b/gcc/recog.c
index d2338e6..d7c9507 100644 (file)
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -1,6 +1,6 @@
 /* Subroutines used by or related to instruction recognition.
    Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
-   1999, 2000, 2001, 2002, 2003, 2003 Free Software Foundation, Inc.
+   1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
 
 This file is part of GCC.
 
@@ -521,11 +521,11 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
   /* Do changes needed to keep rtx consistent.  Don't do any other
      simplifications, as it is not our job.  */
 
-  if ((GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
+  if (SWAPPABLE_OPERANDS_P (x)
       && swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
     {
       validate_change (object, loc,
-                      gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code
+                      gen_rtx_fmt_ee (COMMUTATIVE_ARITH_P (x) ? code
                                       : swap_condition (code),
                                       GET_MODE (x), XEXP (x, 1),
                                       XEXP (x, 0)), 1);
@@ -700,15 +700,6 @@ validate_replace_src_group (rtx from, rtx to, rtx insn)
   d.insn = insn;
   note_uses (&PATTERN (insn), validate_replace_src_1, &d);
 }
-
-/* Same as validate_replace_src_group, but validate by seeing if
-   INSN is still valid.  */
-int
-validate_replace_src (rtx from, rtx to, rtx insn)
-{
-  validate_replace_src_group (from, to, insn);
-  return apply_change_group ();
-}
 \f
 #ifdef HAVE_cc0
 /* Return 1 if the insn using CC0 set by INSN does not contain
@@ -1123,12 +1114,6 @@ immediate_operand (rtx op, enum machine_mode mode)
       && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
     return 0;
 
-  /* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
-     result in 0/1.  It seems a safe assumption that this is
-     in range for everyone.  */
-  if (GET_CODE (op) == CONSTANT_P_RTX)
-    return 1;
-
   return (CONSTANT_P (op)
          && (GET_MODE (op) == mode || mode == VOIDmode
              || GET_MODE (op) == VOIDmode)
@@ -1379,7 +1364,7 @@ int
 comparison_operator (rtx op, enum machine_mode mode)
 {
   return ((mode == VOIDmode || GET_MODE (op) == mode)
-         && GET_RTX_CLASS (GET_CODE (op)) == '<');
+         && COMPARISON_P (op));
 }
 \f
 /* If BODY is an insn body that uses ASM_OPERANDS,
@@ -1600,7 +1585,7 @@ decode_asm_operands (rtx body, rtx *operands, rtx **operand_locs,
   return template;
 }
 
-/* Check if an asm_operand matches it's constraints.
+/* Check if an asm_operand matches its constraints.
    Return > 0 if ok, = 0 if bad, < 0 if inconclusive.  */
 
 int
@@ -1940,7 +1925,7 @@ offsettable_address_p (int strictp, enum machine_mode mode, rtx y)
       return good;
     }
 
-  if (GET_RTX_CLASS (ycode) == 'a')
+  if (GET_RTX_CLASS (ycode) == RTX_AUTOINC)
     return 0;
 
   /* The offset added here is chosen as the maximum offset that
@@ -2313,7 +2298,7 @@ constrain_operands (int strict)
 
          /* A unary operator may be accepted by the predicate, but it
             is irrelevant for matching constraints.  */
-         if (GET_RTX_CLASS (GET_CODE (op)) == '1')
+         if (UNARY_P (op))
            op = XEXP (op, 0);
 
          if (GET_CODE (op) == SUBREG)
@@ -2386,9 +2371,9 @@ constrain_operands (int strict)
 
                      /* A unary operator may be accepted by the predicate,
                         but it is irrelevant for matching constraints.  */
-                     if (GET_RTX_CLASS (GET_CODE (op1)) == '1')
+                     if (UNARY_P (op1))
                        op1 = XEXP (op1, 0);
-                     if (GET_RTX_CLASS (GET_CODE (op2)) == '1')
+                     if (UNARY_P (op2))
                        op2 = XEXP (op2, 0);
 
                      val = operands_match_p (op1, op2);
@@ -2666,7 +2651,7 @@ reg_fits_class_p (rtx operand, enum reg_class class, int offset,
     {
       int sr;
       regno += offset;
-      for (sr = HARD_REGNO_NREGS (regno, mode) - 1;
+      for (sr = hard_regno_nregs[regno][mode] - 1;
           sr > 0; sr--)
        if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
                                 regno + sr))
@@ -2795,7 +2780,7 @@ split_all_insns (int upd_life)
 
   if (changed && upd_life)
     update_life_info (blocks, UPDATE_LIFE_GLOBAL_RM_NOTES,
-                     PROP_DEATH_NOTES | PROP_REG_INFO);
+                     PROP_DEATH_NOTES);
 
 #ifdef ENABLE_CHECKING
   verify_flow_info ();
@@ -2910,7 +2895,7 @@ peep2_reg_dead_p (int ofs, rtx reg)
     abort ();
 
   regno = REGNO (reg);
-  n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
+  n = hard_regno_nregs[regno][GET_MODE (reg)];
   while (--n >= 0)
     if (REGNO_REG_SET_P (peep2_insn_data[ofs].live_before, regno + n))
       return 0;
@@ -2998,7 +2983,7 @@ peep2_find_free_register (int from, int to, const char *class_str,
        continue;
 
       success = 1;
-      for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
+      for (j = hard_regno_nregs[regno][mode] - 1; j >= 0; j--)
        {
          if (TEST_HARD_REG_BIT (*reg_set, regno + j)
              || TEST_HARD_REG_BIT (live, regno + j))
@@ -3009,7 +2994,7 @@ peep2_find_free_register (int from, int to, const char *class_str,
        }
       if (success)
        {
-         for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
+         for (j = hard_regno_nregs[regno][mode] - 1; j >= 0; j--)
            SET_HARD_REG_BIT (*reg_set, regno + j);
 
          /* Start the next search with the next register.  */