/* Subroutines used by or related to instruction recognition.
Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
- 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of GCC.
{
rtx object = changes[i].object;
- /* if there is no object to test or if it is the same as the one we
+ /* If there is no object to test or if it is the same as the one we
already tested, ignore it. */
if (object == 0 || object == last_validated)
continue;
return;
}
- /* Call ourself recursively to perform the replacements. */
+ /* Call ourself recursively to perform the replacements.
+ We must not replace inside already replaced expression, otherwise we
+ get infinite recursion for replacements like (reg X)->(subreg (reg X))
+ done by regmove, so we must special case shared ASM_OPERANDS. */
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ if (GET_CODE (x) == PARALLEL)
{
- if (fmt[i] == 'e')
- validate_replace_rtx_1 (&XEXP (x, i), from, to, object);
- else if (fmt[i] == 'E')
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- validate_replace_rtx_1 (&XVECEXP (x, i, j), from, to, object);
+ for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
+ {
+ if (j && GET_CODE (XVECEXP (x, 0, j)) == SET
+ && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == ASM_OPERANDS)
+ {
+ /* Verify that operands are really shared. */
+ if (ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (x, 0, 0))) !=
+ ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (x, 0, j))))
+ abort ();
+ validate_replace_rtx_1 (&SET_DEST (XVECEXP (x, 0, j)),
+ from, to, object);
+ }
+ else
+ validate_replace_rtx_1 (&XVECEXP (x, 0, j), from, to, object);
+ }
}
+ else
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ {
+ if (fmt[i] == 'e')
+ validate_replace_rtx_1 (&XEXP (x, i), from, to, object);
+ else if (fmt[i] == 'E')
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+ validate_replace_rtx_1 (&XVECEXP (x, i, j), from, to, object);
+ }
/* If we didn't substitute, there is nothing more to do. */
if (num_changes == prev_changes)
/* Do changes needed to keep rtx consistent. Don't do any other
simplifications, as it is not our job. */
- if ((GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
+ if (SWAPPABLE_OPERANDS_P (x)
&& swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
{
validate_change (object, loc,
- gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code
+ gen_rtx_fmt_ee (COMMUTATIVE_ARITH_P (x) ? code
: swap_condition (code),
GET_MODE (x), XEXP (x, 1),
XEXP (x, 0)), 1);
d.insn = insn;
note_uses (&PATTERN (insn), validate_replace_src_1, &d);
}
-
-/* Same as validate_replace_src_group, but validate by seeing if
- INSN is still valid. */
-int
-validate_replace_src (rtx from, rtx to, rtx insn)
-{
- validate_replace_src_group (from, to, insn);
- return apply_change_group ();
-}
\f
#ifdef HAVE_cc0
/* Return 1 if the insn using CC0 set by INSN does not contain
&& trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
return 0;
- /* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
- result in 0/1. It seems a safe assumption that this is
- in range for everyone. */
- if (GET_CODE (op) == CONSTANT_P_RTX)
- return 1;
-
return (CONSTANT_P (op)
&& (GET_MODE (op) == mode || mode == VOIDmode
|| GET_MODE (op) == VOIDmode)
comparison_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
- && GET_RTX_CLASS (GET_CODE (op)) == '<');
+ && COMPARISON_P (op));
}
\f
/* If BODY is an insn body that uses ASM_OPERANDS,
return template;
}
-/* Check if an asm_operand matches it's constraints.
+/* Check if an asm_operand matches its constraints.
Return > 0 if ok, = 0 if bad, < 0 if inconclusive. */
int
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
break;
- /* FALLTHRU */
+ /* Fall through. */
case 'i':
if (CONSTANT_P (op)
case 'X':
result = 1;
+ break;
case 'g':
if (general_operand (op, VOIDmode))
result = 1;
}
#ifdef EXTRA_CONSTRAINT_STR
- if (EXTRA_CONSTRAINT_STR (op, c, constraint))
+ else if (EXTRA_CONSTRAINT_STR (op, c, constraint))
+ result = 1;
+ else if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
+ /* Every memory operand can be reloaded to fit. */
+ && memory_operand (op, VOIDmode))
+ result = 1;
+ else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint)
+ /* Every address operand can be reloaded to fit. */
+ && address_operand (op, VOIDmode))
result = 1;
- if (EXTRA_MEMORY_CONSTRAINT (c, constraint))
- {
- /* Every memory operand can be reloaded to fit. */
- if (memory_operand (op, VOIDmode))
- result = 1;
- }
- if (EXTRA_ADDRESS_CONSTRAINT (c, constraint))
- {
- /* Every address operand can be reloaded to fit. */
- if (address_operand (op, VOIDmode))
- result = 1;
- }
#endif
break;
}
return good;
}
- if (GET_RTX_CLASS (ycode) == 'a')
+ if (GET_RTX_CLASS (ycode) == RTX_AUTOINC)
return 0;
/* The offset added here is chosen as the maximum offset that
because the amount of the increment depends on the mode. */
int
-mode_dependent_address_p (rtx addr ATTRIBUTE_UNUSED /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */)
+mode_dependent_address_p (rtx addr ATTRIBUTE_UNUSED /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */)
{
GO_IF_MODE_DEPENDENT_ADDRESS (addr, win);
return 0;
extract_insn (insn);
recog_data.insn = insn;
}
-/* Do cached extract_insn, constrain_operand and complain about failures.
+/* Do cached extract_insn, constrain_operands and complain about failures.
Used by insn_attrtab. */
void
extract_constrain_insn_cached (rtx insn)
&& !constrain_operands (reload_completed))
fatal_insn_not_found (insn);
}
-/* Do cached constrain_operand and complain about failures. */
+/* Do cached constrain_operands and complain about failures. */
int
constrain_operands_cached (int strict)
{
{
int i;
- memset (recog_op_alt, 0, sizeof recog_op_alt);
+ for (i = 0; i < recog_data.n_operands; i++)
+ memset (recog_op_alt[i], 0, (recog_data.n_alternatives
+ * sizeof (struct operand_alternative)));
+
for (i = 0; i < recog_data.n_operands; i++)
{
int j;
/* A unary operator may be accepted by the predicate, but it
is irrelevant for matching constraints. */
- if (GET_RTX_CLASS (GET_CODE (op)) == '1')
+ if (UNARY_P (op))
op = XEXP (op, 0);
if (GET_CODE (op) == SUBREG)
/* A unary operator may be accepted by the predicate,
but it is irrelevant for matching constraints. */
- if (GET_RTX_CLASS (GET_CODE (op1)) == '1')
+ if (UNARY_P (op1))
op1 = XEXP (op1, 0);
- if (GET_RTX_CLASS (GET_CODE (op2)) == '1')
+ if (UNARY_P (op2))
op2 = XEXP (op2, 0);
val = operands_match_p (op1, op2);
break;
case 'm':
- if (GET_CODE (op) == MEM
- /* Before reload, accept what reload can turn into mem. */
- || (strict < 0 && CONSTANT_P (op))
- /* During reload, accept a pseudo */
- || (reload_in_progress && GET_CODE (op) == REG
- && REGNO (op) >= FIRST_PSEUDO_REGISTER))
+ /* Memory operands must be valid, to the extent
+ required by STRICT. */
+ if (GET_CODE (op) == MEM)
+ {
+ if (strict > 0
+ && !strict_memory_address_p (GET_MODE (op),
+ XEXP (op, 0)))
+ break;
+ if (strict == 0
+ && !memory_address_p (GET_MODE (op), XEXP (op, 0)))
+ break;
+ win = 1;
+ }
+ /* Before reload, accept what reload can turn into mem. */
+ else if (strict < 0 && CONSTANT_P (op))
+ win = 1;
+ /* During reload, accept a pseudo */
+ else if (reload_in_progress && GET_CODE (op) == REG
+ && REGNO (op) >= FIRST_PSEUDO_REGISTER)
win = 1;
break;
else if (EXTRA_CONSTRAINT_STR (op, c, p))
win = 1;
- if (EXTRA_MEMORY_CONSTRAINT (c, p))
- {
- /* Every memory operand can be reloaded to fit. */
- if (strict < 0 && GET_CODE (op) == MEM)
- win = 1;
-
- /* Before reload, accept what reload can turn into mem. */
- if (strict < 0 && CONSTANT_P (op))
- win = 1;
-
- /* During reload, accept a pseudo */
- if (reload_in_progress && GET_CODE (op) == REG
- && REGNO (op) >= FIRST_PSEUDO_REGISTER)
- win = 1;
- }
- if (EXTRA_ADDRESS_CONSTRAINT (c, p))
- {
- /* Every address operand can be reloaded to fit. */
- if (strict < 0)
- win = 1;
- }
+ else if (EXTRA_MEMORY_CONSTRAINT (c, p)
+ /* Every memory operand can be reloaded to fit. */
+ && ((strict < 0 && GET_CODE (op) == MEM)
+ /* Before reload, accept what reload can turn
+ into mem. */
+ || (strict < 0 && CONSTANT_P (op))
+ /* During reload, accept a pseudo */
+ || (reload_in_progress && GET_CODE (op) == REG
+ && REGNO (op) >= FIRST_PSEUDO_REGISTER)))
+ win = 1;
+ else if (EXTRA_ADDRESS_CONSTRAINT (c, p)
+ /* Every address operand can be reloaded to fit. */
+ && strict < 0)
+ win = 1;
#endif
break;
}
{
int sr;
regno += offset;
- for (sr = HARD_REGNO_NREGS (regno, mode) - 1;
+ for (sr = hard_regno_nregs[regno][mode] - 1;
sr > 0; sr--)
if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
regno + sr))
return 0;
}
\f
-/* Split single instruction. Helper function for split_all_insns.
- Return last insn in the sequence if successful, or NULL if unsuccessful. */
+/* Split single instruction. Helper function for split_all_insns and
+ split_all_insns_noflow. Return last insn in the sequence if successful,
+ or NULL if unsuccessful. */
+
static rtx
split_insn (rtx insn)
{
- rtx set;
- if (!INSN_P (insn))
- ;
- /* Don't split no-op move insns. These should silently
- disappear later in final. Splitting such insns would
- break the code that handles REG_NO_CONFLICT blocks. */
+ /* Split insns here to get max fine-grain parallelism. */
+ rtx first = PREV_INSN (insn);
+ rtx last = try_split (PATTERN (insn), insn, 1);
- else if ((set = single_set (insn)) != NULL && set_noop_p (set))
- {
- /* Nops get in the way while scheduling, so delete them
- now if register allocation has already been done. It
- is too risky to try to do this before register
- allocation, and there are unlikely to be very many
- nops then anyways. */
- if (reload_completed)
- delete_insn_and_edges (insn);
- }
- else
- {
- /* Split insns here to get max fine-grain parallelism. */
- rtx first = PREV_INSN (insn);
- rtx last = try_split (PATTERN (insn), insn, 1);
+ if (last == insn)
+ return NULL_RTX;
+
+ /* try_split returns the NOTE that INSN became. */
+ PUT_CODE (insn, NOTE);
+ NOTE_SOURCE_FILE (insn) = 0;
+ NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
- if (last != insn)
+ /* ??? Coddle to md files that generate subregs in post-reload
+ splitters instead of computing the proper hard register. */
+ if (reload_completed && first != last)
+ {
+ first = NEXT_INSN (first);
+ for (;;)
{
- /* try_split returns the NOTE that INSN became. */
- PUT_CODE (insn, NOTE);
- NOTE_SOURCE_FILE (insn) = 0;
- NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
-
- /* ??? Coddle to md files that generate subregs in post-
- reload splitters instead of computing the proper
- hard register. */
- if (reload_completed && first != last)
- {
- first = NEXT_INSN (first);
- while (1)
- {
- if (INSN_P (first))
- cleanup_subreg_operands (first);
- if (first == last)
- break;
- first = NEXT_INSN (first);
- }
- }
- return last;
+ if (INSN_P (first))
+ cleanup_subreg_operands (first);
+ if (first == last)
+ break;
+ first = NEXT_INSN (first);
}
}
- return NULL_RTX;
+ return last;
}
+
/* Split all insns in the function. If UPD_LIFE, update life info after. */
void
rtx insn, next;
bool finish = false;
- for (insn = bb->head; !finish ; insn = next)
+ for (insn = BB_HEAD (bb); !finish ; insn = next)
{
- rtx last;
-
/* Can't use `next_real_insn' because that might go across
CODE_LABELS and short-out basic blocks. */
next = NEXT_INSN (insn);
- finish = (insn == bb->end);
- last = split_insn (insn);
- if (last)
+ finish = (insn == BB_END (bb));
+ if (INSN_P (insn))
{
- /* The split sequence may include barrier, but the
- BB boundary we are interested in will be set to previous
- one. */
-
- while (GET_CODE (last) == BARRIER)
- last = PREV_INSN (last);
- SET_BIT (blocks, bb->index);
- changed = true;
- insn = last;
+ rtx set = single_set (insn);
+
+ /* Don't split no-op move insns. These should silently
+ disappear later in final. Splitting such insns would
+ break the code that handles REG_NO_CONFLICT blocks. */
+ if (set && set_noop_p (set))
+ {
+ /* Nops get in the way while scheduling, so delete them
+ now if register allocation has already been done. It
+ is too risky to try to do this before register
+ allocation, and there are unlikely to be very many
+ nops then anyways. */
+ if (reload_completed)
+ {
+ /* If the no-op set has a REG_UNUSED note, we need
+ to update liveness information. */
+ if (find_reg_note (insn, REG_UNUSED, NULL_RTX))
+ {
+ SET_BIT (blocks, bb->index);
+ changed = true;
+ }
+ /* ??? Is life info affected by deleting edges? */
+ delete_insn_and_edges (insn);
+ }
+ }
+ else
+ {
+ rtx last = split_insn (insn);
+ if (last)
+ {
+ /* The split sequence may include barrier, but the
+ BB boundary we are interested in will be set to
+ previous one. */
+
+ while (GET_CODE (last) == BARRIER)
+ last = PREV_INSN (last);
+ SET_BIT (blocks, bb->index);
+ changed = true;
+ }
+ }
}
}
}
if (changed && upd_life)
update_life_info (blocks, UPDATE_LIFE_GLOBAL_RM_NOTES,
- PROP_DEATH_NOTES | PROP_REG_INFO);
+ PROP_DEATH_NOTES);
#ifdef ENABLE_CHECKING
verify_flow_info ();
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
- split_insn (insn);
+ if (INSN_P (insn))
+ {
+ /* Don't split no-op move insns. These should silently
+ disappear later in final. Splitting such insns would
+ break the code that handles REG_NO_CONFLICT blocks. */
+ rtx set = single_set (insn);
+ if (set && set_noop_p (set))
+ {
+ /* Nops get in the way while scheduling, so delete them
+ now if register allocation has already been done. It
+ is too risky to try to do this before register
+ allocation, and there are unlikely to be very many
+ nops then anyways.
+
+ ??? Should we use delete_insn when the CFG isn't valid? */
+ if (reload_completed)
+ delete_insn_and_edges (insn);
+ }
+ else
+ split_insn (insn);
+ }
}
- return;
}
\f
#ifdef HAVE_peephole2
abort ();
regno = REGNO (reg);
- n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
+ n = hard_regno_nregs[regno][GET_MODE (reg)];
while (--n >= 0)
if (REGNO_REG_SET_P (peep2_insn_data[ofs].live_before, regno + n))
return 0;
continue;
success = 1;
- for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
+ for (j = hard_regno_nregs[regno][mode] - 1; j >= 0; j--)
{
if (TEST_HARD_REG_BIT (*reg_set, regno + j)
|| TEST_HARD_REG_BIT (live, regno + j))
}
if (success)
{
- for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
+ for (j = hard_regno_nregs[regno][mode] - 1; j >= 0; j--)
SET_HARD_REG_BIT (*reg_set, regno + j);
/* Start the next search with the next register. */
pbi = init_propagate_block_info (bb, live, NULL, NULL, PROP_DEATH_NOTES);
#endif
- for (insn = bb->end; ; insn = prev)
+ for (insn = BB_END (bb); ; insn = prev)
{
prev = PREV_INSN (insn);
if (INSN_P (insn))
XEXP (note, 0),
REG_NOTES (x));
- if (x != bb->end && eh_edge)
+ if (x != BB_END (bb) && eh_edge)
{
edge nfte, nehe;
int flags;
}
}
- if (insn == bb->head)
+ if (insn == BB_HEAD (bb))
break;
}
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