#endif
#endif
-static void validate_replace_rtx_1 PARAMS ((rtx *, rtx, rtx, rtx));
-static rtx *find_single_use_1 PARAMS ((rtx, rtx *));
-static void validate_replace_src_1 PARAMS ((rtx *, void *));
-static rtx split_insn PARAMS ((rtx));
+static void validate_replace_rtx_1 (rtx *, rtx, rtx, rtx);
+static rtx *find_single_use_1 (rtx, rtx *);
+static void validate_replace_src_1 (rtx *, void *);
+static rtx split_insn (rtx);
/* Nonzero means allow operands to be volatile.
This should be 0 if you are generating rtl, such as if you are calling
int reload_completed;
+/* Nonzero after thread_prologue_and_epilogue_insns has run. */
+int epilogue_completed;
+
/* Initialize data used by the function `recog'.
This must be called once in the compilation of a function
before any insn recognition may be done in the function. */
void
-init_recog_no_volatile ()
+init_recog_no_volatile (void)
{
volatile_ok = 0;
}
void
-init_recog ()
+init_recog (void)
{
volatile_ok = 1;
}
through this one. (The only exception is in combine.c.) */
int
-recog_memoized_1 (insn)
- rtx insn;
+recog_memoized_1 (rtx insn)
{
if (INSN_CODE (insn) < 0)
INSN_CODE (insn) = recog (PATTERN (insn), insn, 0);
and that the operands mentioned in it are legitimate. */
int
-check_asm_operands (x)
- rtx x;
+check_asm_operands (rtx x)
{
int noperands;
rtx *operands;
if (noperands == 0)
return 1;
- operands = (rtx *) alloca (noperands * sizeof (rtx));
- constraints = (const char **) alloca (noperands * sizeof (char *));
+ operands = alloca (noperands * sizeof (rtx));
+ constraints = alloca (noperands * sizeof (char *));
decode_asm_operands (x, operands, NULL, constraints, NULL);
Otherwise, perform the change and return 1. */
int
-validate_change (object, loc, new, in_group)
- rtx object;
- rtx *loc;
- rtx new;
- int in_group;
+validate_change (rtx object, rtx *loc, rtx new, int in_group)
{
rtx old = *loc;
else
changes_allocated *= 2;
- changes =
- (change_t*) xrealloc (changes,
- sizeof (change_t) * changes_allocated);
+ changes = xrealloc (changes, sizeof (change_t) * changes_allocated);
}
changes[num_changes].object = object;
were valid; i.e. whether INSN can still be recognized. */
int
-insn_invalid_p (insn)
- rtx insn;
+insn_invalid_p (rtx insn)
{
rtx pat = PATTERN (insn);
int num_clobbers = 0;
/* Return number of changes made and not validated yet. */
int
-num_changes_pending ()
+num_changes_pending (void)
{
return num_changes;
}
Return 1 if all changes are valid, zero otherwise. */
int
-apply_change_group ()
+apply_change_group (void)
{
int i;
rtx last_validated = NULL_RTX;
{
rtx object = changes[i].object;
- /* if there is no object to test or if it is the same as the one we
+ /* If there is no object to test or if it is the same as the one we
already tested, ignore it. */
if (object == 0 || object == last_validated)
continue;
/* Return the number of changes so far in the current group. */
int
-num_validated_changes ()
+num_validated_changes (void)
{
return num_changes;
}
/* Retract the changes numbered NUM and up. */
void
-cancel_changes (num)
- int num;
+cancel_changes (int num)
{
int i;
validate_change passing OBJECT. */
static void
-validate_replace_rtx_1 (loc, from, to, object)
- rtx *loc;
- rtx from, to, object;
+validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
{
int i, j;
const char *fmt;
if INSN is still valid. */
int
-validate_replace_rtx_subexp (from, to, insn, loc)
- rtx from, to, insn, *loc;
+validate_replace_rtx_subexp (rtx from, rtx to, rtx insn, rtx *loc)
{
validate_replace_rtx_1 (loc, from, to, insn);
return apply_change_group ();
changes have been made, validate by seeing if INSN is still valid. */
int
-validate_replace_rtx (from, to, insn)
- rtx from, to, insn;
+validate_replace_rtx (rtx from, rtx to, rtx insn)
{
validate_replace_rtx_1 (&PATTERN (insn), from, to, insn);
return apply_change_group ();
/* Try replacing every occurrence of FROM in INSN with TO. */
void
-validate_replace_rtx_group (from, to, insn)
- rtx from, to, insn;
+validate_replace_rtx_group (rtx from, rtx to, rtx insn)
{
validate_replace_rtx_1 (&PATTERN (insn), from, to, insn);
}
};
static void
-validate_replace_src_1 (x, data)
- rtx *x;
- void *data;
+validate_replace_src_1 (rtx *x, void *data)
{
struct validate_replace_src_data *d
= (struct validate_replace_src_data *) data;
SET_DESTs. */
void
-validate_replace_src_group (from, to, insn)
- rtx from, to, insn;
+validate_replace_src_group (rtx from, rtx to, rtx insn)
{
struct validate_replace_src_data d;
/* Same as validate_replace_src_group, but validate by seeing if
INSN is still valid. */
int
-validate_replace_src (from, to, insn)
- rtx from, to, insn;
+validate_replace_src (rtx from, rtx to, rtx insn)
{
validate_replace_src_group (from, to, insn);
return apply_change_group ();
EQ and NE tests do not count. */
int
-next_insn_tests_no_inequality (insn)
- rtx insn;
+next_insn_tests_no_inequality (rtx insn)
{
rtx next = next_cc0_user (insn);
|| GET_CODE (next) == CALL_INSN)
&& ! inequality_comparisons_p (PATTERN (next)));
}
-
-#if 0 /* This is useless since the insn that sets the cc's
- must be followed immediately by the use of them. */
-/* Return 1 if the CC value set up by INSN is not used. */
-
-int
-next_insns_test_no_inequality (insn)
- rtx insn;
-{
- rtx next = NEXT_INSN (insn);
-
- for (; next != 0; next = NEXT_INSN (next))
- {
- if (GET_CODE (next) == CODE_LABEL
- || GET_CODE (next) == BARRIER)
- return 1;
- if (GET_CODE (next) == NOTE)
- continue;
- if (inequality_comparisons_p (PATTERN (next)))
- return 0;
- if (sets_cc0_p (PATTERN (next)) == 1)
- return 1;
- if (! reg_mentioned_p (cc0_rtx, PATTERN (next)))
- return 1;
- }
- return 1;
-}
-#endif
#endif
\f
/* This is used by find_single_use to locate an rtx that contains exactly one
DEST that are being used to totally replace it are not counted. */
static rtx *
-find_single_use_1 (dest, loc)
- rtx dest;
- rtx *loc;
+find_single_use_1 (rtx dest, rtx *loc)
{
rtx x = *loc;
enum rtx_code code = GET_CODE (x);
and last insn referencing DEST. */
rtx *
-find_single_use (dest, insn, ploc)
- rtx dest;
- rtx insn;
- rtx *ploc;
+find_single_use (rtx dest, rtx insn, rtx *ploc)
{
rtx next;
rtx *result;
class NO_REGS, see the comment for `register_operand'. */
int
-general_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+general_operand (rtx op, enum machine_mode mode)
{
enum rtx_code code = GET_CODE (op);
return 0;
/* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
- create such rtl, and we must reject it. */
+ create such rtl, and we must reject it. */
if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
&& GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub)))
return 0;
expressions in the machine description. */
int
-address_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+address_operand (rtx op, enum machine_mode mode)
{
return memory_address_p (mode, op);
}
it is most consistent to keep this function from accepting them. */
int
-register_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+register_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
/* Return 1 for a register in Pmode; ignore the tested mode. */
int
-pmode_register_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+pmode_register_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return register_operand (op, Pmode);
}
or a hard register. */
int
-scratch_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+scratch_operand (rtx op, enum machine_mode mode)
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return 0;
expressions in the machine description. */
int
-immediate_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+immediate_operand (rtx op, enum machine_mode mode)
{
/* Don't accept CONST_INT or anything similar
if the caller wants something floating. */
/* Returns 1 if OP is an operand that is a CONST_INT. */
int
-const_int_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+const_int_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) != CONST_INT)
return 0;
floating-point number. */
int
-const_double_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+const_double_operand (rtx op, enum machine_mode mode)
{
/* Don't accept CONST_INT or anything similar
if the caller wants something floating. */
/* Return 1 if OP is a general operand that is not an immediate operand. */
int
-nonimmediate_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonimmediate_operand (rtx op, enum machine_mode mode)
{
return (general_operand (op, mode) && ! CONSTANT_P (op));
}
/* Return 1 if OP is a register reference or immediate value of mode MODE. */
int
-nonmemory_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonmemory_operand (rtx op, enum machine_mode mode)
{
if (CONSTANT_P (op))
{
expressions in the machine description. */
int
-push_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+push_operand (rtx op, enum machine_mode mode)
{
unsigned int rounded_size = GET_MODE_SIZE (mode);
expressions in the machine description. */
int
-pop_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+pop_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) != MEM)
return 0;
/* Return 1 if ADDR is a valid memory address for mode MODE. */
int
-memory_address_p (mode, addr)
- enum machine_mode mode ATTRIBUTE_UNUSED;
- rtx addr;
+memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
{
if (GET_CODE (addr) == ADDRESSOF)
return 1;
expressions in the machine description. */
int
-memory_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+memory_operand (rtx op, enum machine_mode mode)
{
rtx inner;
that is, a memory reference whose address is a general_operand. */
int
-indirect_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+indirect_operand (rtx op, enum machine_mode mode)
{
/* Before reload, a SUBREG isn't in memory (see memory_operand, above). */
if (! reload_completed
MATCH_OPERATOR to recognize all the branch insns. */
int
-comparison_operator (op, mode)
- rtx op;
- enum machine_mode mode;
+comparison_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& GET_RTX_CLASS (GET_CODE (op)) == '<');
Otherwise return -1. */
int
-asm_noperands (body)
- rtx body;
+asm_noperands (rtx body)
{
switch (GET_CODE (body))
{
we don't store that info. */
const char *
-decode_asm_operands (body, operands, operand_locs, constraints, modes)
- rtx body;
- rtx *operands;
- rtx **operand_locs;
- const char **constraints;
- enum machine_mode *modes;
+decode_asm_operands (rtx body, rtx *operands, rtx **operand_locs,
+ const char **constraints, enum machine_mode *modes)
{
int i;
int noperands;
Return > 0 if ok, = 0 if bad, < 0 if inconclusive. */
int
-asm_operand_ok (op, constraint)
- rtx op;
- const char *constraint;
+asm_operand_ok (rtx op, const char *constraint)
{
int result = 0;
Otherwise, return a null pointer. */
rtx *
-find_constant_term_loc (p)
- rtx *p;
+find_constant_term_loc (rtx *p)
{
rtx *tem;
enum rtx_code code = GET_CODE (*p);
don't use it before reload. */
int
-offsettable_memref_p (op)
- rtx op;
+offsettable_memref_p (rtx op)
{
return ((GET_CODE (op) == MEM)
&& offsettable_address_p (1, GET_MODE (op), XEXP (op, 0)));
consider pseudo-regs valid as index or base regs. */
int
-offsettable_nonstrict_memref_p (op)
- rtx op;
+offsettable_nonstrict_memref_p (rtx op)
{
return ((GET_CODE (op) == MEM)
&& offsettable_address_p (0, GET_MODE (op), XEXP (op, 0)));
for the sake of use in reload.c. */
int
-offsettable_address_p (strictp, mode, y)
- int strictp;
- enum machine_mode mode;
- rtx y;
+offsettable_address_p (int strictp, enum machine_mode mode, rtx y)
{
enum rtx_code ycode = GET_CODE (y);
rtx z;
rtx y1 = y;
rtx *y2;
- int (*addressp) PARAMS ((enum machine_mode, rtx)) =
+ int (*addressp) (enum machine_mode, rtx) =
(strictp ? strict_memory_address_p : memory_address_p);
unsigned int mode_sz = GET_MODE_SIZE (mode);
because the amount of the increment depends on the mode. */
int
-mode_dependent_address_p (addr)
- rtx addr ATTRIBUTE_UNUSED; /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */
+mode_dependent_address_p (rtx addr ATTRIBUTE_UNUSED /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */)
{
GO_IF_MODE_DEPENDENT_ADDRESS (addr, win);
return 0;
win: ATTRIBUTE_UNUSED_LABEL
return 1;
}
-
-/* Return 1 if OP is a general operand
- other than a memory ref with a mode dependent address. */
-
-int
-mode_independent_operand (op, mode)
- enum machine_mode mode;
- rtx op;
-{
- rtx addr;
-
- if (! general_operand (op, mode))
- return 0;
-
- if (GET_CODE (op) != MEM)
- return 1;
-
- addr = XEXP (op, 0);
- GO_IF_MODE_DEPENDENT_ADDRESS (addr, lose);
- return 1;
- /* Label `lose' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
- lose: ATTRIBUTE_UNUSED_LABEL
- return 0;
-}
\f
/* Like extract_insn, but save insn extracted and don't extract again, when
called again for the same insn expecting that recog_data still contain the
valid information. This is used primary by gen_attr infrastructure that
often does extract insn again and again. */
void
-extract_insn_cached (insn)
- rtx insn;
+extract_insn_cached (rtx insn)
{
if (recog_data.insn == insn && INSN_CODE (insn) >= 0)
return;
/* Do cached extract_insn, constrain_operand and complain about failures.
Used by insn_attrtab. */
void
-extract_constrain_insn_cached (insn)
- rtx insn;
+extract_constrain_insn_cached (rtx insn)
{
extract_insn_cached (insn);
if (which_alternative == -1
}
/* Do cached constrain_operand and complain about failures. */
int
-constrain_operands_cached (strict)
- int strict;
+constrain_operands_cached (int strict)
{
if (which_alternative == -1)
return constrain_operands (strict);
/* Analyze INSN and fill in recog_data. */
void
-extract_insn (insn)
- rtx insn;
+extract_insn (rtx insn)
{
int i;
int icode;
information from the constraint strings into a more usable form.
The collected data is stored in recog_op_alt. */
void
-preprocess_constraints ()
+preprocess_constraints (void)
{
int i;
};
int
-constrain_operands (strict)
- int strict;
+constrain_operands (int strict)
{
const char *constraints[MAX_RECOG_OPERANDS];
int matching_operands[MAX_RECOG_OPERANDS];
/* Every memory operand can be reloaded to fit. */
if (strict < 0 && GET_CODE (op) == MEM)
win = 1;
-
+
/* Before reload, accept what reload can turn into mem. */
if (strict < 0 && CONSTANT_P (op))
win = 1;
If REG occupies multiple hard regs, all of them must be in CLASS. */
int
-reg_fits_class_p (operand, class, offset, mode)
- rtx operand;
- enum reg_class class;
- int offset;
- enum machine_mode mode;
+reg_fits_class_p (rtx operand, enum reg_class class, int offset,
+ enum machine_mode mode)
{
int regno = REGNO (operand);
if (regno < FIRST_PSEUDO_REGISTER
/* Split single instruction. Helper function for split_all_insns.
Return last insn in the sequence if successful, or NULL if unsuccessful. */
static rtx
-split_insn (insn)
- rtx insn;
+split_insn (rtx insn)
{
rtx set;
if (!INSN_P (insn))
/* Split all insns in the function. If UPD_LIFE, update life info after. */
void
-split_all_insns (upd_life)
- int upd_life;
+split_all_insns (int upd_life)
{
sbitmap blocks;
bool changed;
find_many_sub_basic_blocks (blocks);
if (old_last_basic_block != last_basic_block && upd_life)
- {
- sbitmap new_blocks = sbitmap_alloc (last_basic_block);
-
- sbitmap_copy (new_blocks, blocks);
- while (old_last_basic_block < last_basic_block)
- {
- SET_BIT (new_blocks, old_last_basic_block);
- old_last_basic_block++;
- }
- sbitmap_free (blocks);
- new_blocks = blocks;
- }
+ blocks = sbitmap_resize (blocks, last_basic_block, 1);
}
if (changed && upd_life)
Used by machine dependent reorg passes. */
void
-split_all_insns_noflow ()
+split_all_insns_noflow (void)
{
rtx next, insn;
in a multi-insn pattern. */
rtx
-peep2_next_insn (n)
- int n;
+peep2_next_insn (int n)
{
if (n >= MAX_INSNS_PER_PEEP2 + 1)
abort ();
after `current'. */
int
-peep2_regno_dead_p (ofs, regno)
- int ofs;
- int regno;
+peep2_regno_dead_p (int ofs, int regno)
{
if (ofs >= MAX_INSNS_PER_PEEP2 + 1)
abort ();
/* Similarly for a REG. */
int
-peep2_reg_dead_p (ofs, reg)
- int ofs;
- rtx reg;
+peep2_reg_dead_p (int ofs, rtx reg)
{
int regno, n;
returned. */
rtx
-peep2_find_free_register (from, to, class_str, mode, reg_set)
- int from, to;
- const char *class_str;
- enum machine_mode mode;
- HARD_REG_SET *reg_set;
+peep2_find_free_register (int from, int to, const char *class_str,
+ enum machine_mode mode, HARD_REG_SET *reg_set)
{
static int search_ofs;
enum reg_class class;
/* Perform the peephole2 optimization pass. */
void
-peephole2_optimize (dump_file)
- FILE *dump_file ATTRIBUTE_UNUSED;
+peephole2_optimize (FILE *dump_file ATTRIBUTE_UNUSED)
{
regset_head rs_heads[MAX_INSNS_PER_PEEP2 + 2];
rtx insn, prev;
REG_EH_REGION, NULL_RTX);
/* Replace the old sequence with the new. */
- try = emit_insn_after_scope (try, peep2_insn_data[i].insn,
- INSN_SCOPE (peep2_insn_data[i].insn));
+ try = emit_insn_after_setloc (try, peep2_insn_data[i].insn,
+ INSN_LOCATOR (peep2_insn_data[i].insn));
before_try = PREV_INSN (insn);
delete_insn_chain (insn, peep2_insn_data[i].insn);
SETs inside. */
int
-store_data_bypass_p (out_insn, in_insn)
- rtx out_insn, in_insn;
+store_data_bypass_p (rtx out_insn, rtx in_insn)
{
rtx out_set, in_set;
of insn categorization may be any JUMP or CALL insn. */
int
-if_test_bypass_p (out_insn, in_insn)
- rtx out_insn, in_insn;
+if_test_bypass_p (rtx out_insn, rtx in_insn)
{
rtx out_set, in_set;