/* Subroutines used by or related to instruction recognition.
Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
- 1999, 2000, 2001 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
#include "config.h"
#include "hard-reg-set.h"
#include "recog.h"
#include "regs.h"
+#include "expr.h"
#include "function.h"
#include "flags.h"
#include "real.h"
static void validate_replace_rtx_1 PARAMS ((rtx *, rtx, rtx, rtx));
static rtx *find_single_use_1 PARAMS ((rtx, rtx *));
-static rtx *find_constant_term_loc PARAMS ((rtx *));
static void validate_replace_src_1 PARAMS ((rtx *, void *));
+static rtx split_insn PARAMS ((rtx));
/* Nonzero means allow operands to be volatile.
This should be 0 if you are generating rtl, such as if you are calling
rtx insn;
{
if (INSN_CODE (insn) < 0)
- INSN_CODE (insn) = recog (PATTERN (insn), insn, NULL_PTR);
+ INSN_CODE (insn) = recog (PATTERN (insn), insn, 0);
return INSN_CODE (insn);
}
\f
operands = (rtx *) alloca (noperands * sizeof (rtx));
constraints = (const char **) alloca (noperands * sizeof (char *));
- decode_asm_operands (x, operands, NULL_PTR, constraints, NULL_PTR);
+ decode_asm_operands (x, operands, NULL, constraints, NULL);
for (i = 0; i < noperands; i++)
{
const char *c = constraints[i];
if (c[0] == '%')
c++;
- if (ISDIGIT ((unsigned char)c[0]) && c[1] == '\0')
+ if (ISDIGIT ((unsigned char) c[0]) && c[1] == '\0')
c = constraints[c[0] - '0'];
if (! asm_operand_ok (operands[i], c))
- return 0;
+ return 0;
}
return 1;
static int num_changes = 0;
-/* Validate a proposed change to OBJECT. LOC is the location in the rtl for
+/* Validate a proposed change to OBJECT. LOC is the location in the rtl
at which NEW will be placed. If OBJECT is zero, no validation is done,
the change is simply made.
if (in_group == 0 && num_changes != 0)
abort ();
- *loc = new;
+ *loc = new;
/* Save the information describing this change. */
if (num_changes >= changes_allocated)
else
changes_allocated *= 2;
- changes =
- (change_t*) xrealloc (changes,
- sizeof (change_t) * changes_allocated);
+ changes =
+ (change_t*) xrealloc (changes,
+ sizeof (change_t) * changes_allocated);
}
-
+
changes[num_changes].object = object;
changes[num_changes].loc = loc;
changes[num_changes].old = old;
int icode = recog (pat, insn,
(GET_CODE (pat) == SET
&& ! reload_completed && ! reload_in_progress)
- ? &num_clobbers : NULL_PTR);
+ ? &num_clobbers : 0);
int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
-
+
/* If this is an asm and the operand aren't legal, then fail. Likewise if
this is not an asm and the insn wasn't recognized. */
if ((is_asm && ! check_asm_operands (PATTERN (insn)))
apply_change_group ()
{
int i;
+ rtx last_validated = NULL_RTX;
/* The changes have been applied and all INSN_CODEs have been reset to force
rerecognition.
{
rtx object = changes[i].object;
- if (object == 0)
+ /* if there is no object to test or if it is the same as the one we
+ already tested, ignore it. */
+ if (object == 0 || object == last_validated)
continue;
if (GET_CODE (object) == MEM)
&& GET_CODE (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1)) == CLOBBER
&& asm_noperands (PATTERN (object)) < 0)
{
- rtx newpat;
-
- if (XVECLEN (pat, 0) == 2)
- newpat = XVECEXP (pat, 0, 0);
- else
- {
- int j;
-
- newpat
- = gen_rtx_PARALLEL (VOIDmode,
- rtvec_alloc (XVECLEN (pat, 0) - 1));
- for (j = 0; j < XVECLEN (newpat, 0); j++)
- XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j);
- }
-
- /* Add a new change to this group to replace the pattern
- with this new pattern. Then consider this change
- as having succeeded. The change we added will
- cause the entire call to fail if things remain invalid.
-
- Note that this can lose if a later change than the one
- we are processing specified &XVECEXP (PATTERN (object), 0, X)
- but this shouldn't occur. */
-
- validate_change (object, &PATTERN (object), newpat, 1);
- }
+ rtx newpat;
+
+ if (XVECLEN (pat, 0) == 2)
+ newpat = XVECEXP (pat, 0, 0);
+ else
+ {
+ int j;
+
+ newpat
+ = gen_rtx_PARALLEL (VOIDmode,
+ rtvec_alloc (XVECLEN (pat, 0) - 1));
+ for (j = 0; j < XVECLEN (newpat, 0); j++)
+ XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j);
+ }
+
+ /* Add a new change to this group to replace the pattern
+ with this new pattern. Then consider this change
+ as having succeeded. The change we added will
+ cause the entire call to fail if things remain invalid.
+
+ Note that this can lose if a later change than the one
+ we are processing specified &XVECEXP (PATTERN (object), 0, X)
+ but this shouldn't occur. */
+
+ validate_change (object, &PATTERN (object), newpat, 1);
+ continue;
+ }
else if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
/* If this insn is a CLOBBER or USE, it is always valid, but is
never recognized. */
else
break;
}
+ last_validated = object;
}
if (i == num_changes)
{
+ basic_block bb;
+
+ for (i = 0; i < num_changes; i++)
+ if (changes[i].object
+ && INSN_P (changes[i].object)
+ && (bb = BLOCK_FOR_INSN (changes[i].object)))
+ bb->flags |= BB_DIRTY;
+
num_changes = 0;
return 1;
}
}
}
-/* Return the number of changes so far in the current group. */
+/* Return the number of changes so far in the current group. */
int
num_validated_changes ()
rtx *loc;
rtx from, to, object;
{
- register int i, j;
- register const char *fmt;
- register rtx x = *loc;
+ int i, j;
+ const char *fmt;
+ rtx x = *loc;
enum rtx_code code;
+ enum machine_mode op0_mode = VOIDmode;
+ int prev_changes = num_changes;
+ rtx new;
if (!x)
return;
+
code = GET_CODE (x);
+ fmt = GET_RTX_FORMAT (code);
+ if (fmt[0] == 'e')
+ op0_mode = GET_MODE (XEXP (x, 0));
+
/* X matches FROM if it is the same rtx or they are both referring to the
same register in the same mode. Avoid calling rtx_equal_p unless the
operands look similar. */
return;
}
- /* For commutative or comparison operations, try replacing each argument
- separately and seeing if we made any changes. If so, put a constant
- argument last.*/
- if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
- {
- int prev_changes = num_changes;
+ /* Call ourself recursively to perform the replacements. */
- validate_replace_rtx_1 (&XEXP (x, 0), from, to, object);
- validate_replace_rtx_1 (&XEXP (x, 1), from, to, object);
- if (prev_changes != num_changes && CONSTANT_P (XEXP (x, 0)))
- {
- validate_change (object, loc,
- gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code
- : swap_condition (code),
- GET_MODE (x), XEXP (x, 1),
- XEXP (x, 0)),
- 1);
- x = *loc;
- code = GET_CODE (x);
- }
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ {
+ if (fmt[i] == 'e')
+ validate_replace_rtx_1 (&XEXP (x, i), from, to, object);
+ else if (fmt[i] == 'E')
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+ validate_replace_rtx_1 (&XVECEXP (x, i, j), from, to, object);
}
- /* Note that if CODE's RTX_CLASS is "c" or "<" we will have already
- done the substitution, otherwise we won't. */
+ /* If we didn't substitute, there is nothing more to do. */
+ if (num_changes == prev_changes)
+ return;
+
+ /* Allow substituted expression to have different mode. This is used by
+ regmove to change mode of pseudo register. */
+ if (fmt[0] == 'e' && GET_MODE (XEXP (x, 0)) != VOIDmode)
+ op0_mode = GET_MODE (XEXP (x, 0));
+
+ /* Do changes needed to keep rtx consistent. Don't do any other
+ simplifications, as it is not our job. */
+
+ if ((GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
+ && swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
+ {
+ validate_change (object, loc,
+ gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code
+ : swap_condition (code),
+ GET_MODE (x), XEXP (x, 1),
+ XEXP (x, 0)), 1);
+ x = *loc;
+ code = GET_CODE (x);
+ }
switch (code)
{
case PLUS:
/* If we have a PLUS whose second operand is now a CONST_INT, use
- plus_constant to try to simplify it. */
- if (GET_CODE (XEXP (x, 1)) == CONST_INT && XEXP (x, 1) == to)
- validate_change (object, loc, plus_constant (XEXP (x, 0), INTVAL (to)),
- 1);
- return;
-
+ plus_constant to try to simplify it.
+ ??? We may want later to remove this, once simplification is
+ separated from this function. */
+ if (GET_CODE (XEXP (x, 1)) == CONST_INT)
+ validate_change (object, loc,
+ simplify_gen_binary
+ (PLUS, GET_MODE (x), XEXP (x, 0), XEXP (x, 1)), 1);
+ break;
case MINUS:
- if (GET_CODE (to) == CONST_INT && XEXP (x, 1) == from)
- {
- validate_change (object, loc,
- plus_constant (XEXP (x, 0), - INTVAL (to)),
- 1);
- return;
- }
+ if (GET_CODE (XEXP (x, 1)) == CONST_INT
+ || GET_CODE (XEXP (x, 1)) == CONST_DOUBLE)
+ validate_change (object, loc,
+ simplify_gen_binary
+ (PLUS, GET_MODE (x), XEXP (x, 0),
+ simplify_gen_unary (NEG,
+ GET_MODE (x), XEXP (x, 1),
+ GET_MODE (x))), 1);
break;
-
case ZERO_EXTEND:
case SIGN_EXTEND:
- /* In these cases, the operation to be performed depends on the mode
- of the operand. If we are replacing the operand with a VOIDmode
- constant, we lose the information. So try to simplify the operation
- in that case. */
- if (GET_MODE (to) == VOIDmode
- && (rtx_equal_p (XEXP (x, 0), from)
- || (GET_CODE (XEXP (x, 0)) == SUBREG
- && rtx_equal_p (SUBREG_REG (XEXP (x, 0)), from))))
+ if (GET_MODE (XEXP (x, 0)) == VOIDmode)
{
- rtx new = NULL_RTX;
-
- /* If there is a subreg involved, crop to the portion of the
- constant that we are interested in. */
- if (GET_CODE (XEXP (x, 0)) == SUBREG)
- {
- if (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) <= UNITS_PER_WORD)
- to = operand_subword (to, SUBREG_WORD (XEXP (x, 0)),
- 0, GET_MODE (from));
- else if (GET_MODE_CLASS (GET_MODE (from)) == MODE_INT
- && (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
- <= HOST_BITS_PER_WIDE_INT))
- {
- int i = SUBREG_WORD (XEXP (x, 0)) * BITS_PER_WORD;
- HOST_WIDE_INT valh;
- unsigned HOST_WIDE_INT vall;
-
- if (GET_CODE (to) == CONST_INT)
- {
- vall = INTVAL (to);
- valh = (HOST_WIDE_INT) vall < 0 ? ~0 : 0;
- }
- else
- {
- vall = CONST_DOUBLE_LOW (to);
- valh = CONST_DOUBLE_HIGH (to);
- }
-
- if (WORDS_BIG_ENDIAN)
- i = (GET_MODE_BITSIZE (GET_MODE (from))
- - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - i);
- if (i > 0 && i < HOST_BITS_PER_WIDE_INT)
- vall = vall >> i | valh << (HOST_BITS_PER_WIDE_INT - i);
- else if (i >= HOST_BITS_PER_WIDE_INT)
- vall = valh >> (i - HOST_BITS_PER_WIDE_INT);
- to = GEN_INT (trunc_int_for_mode (vall,
- GET_MODE (XEXP (x, 0))));
- }
- else
- to = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
- }
-
- /* If the above didn't fail, perform the extension from the
- mode of the operand (and not the mode of FROM). */
- if (to)
- new = simplify_unary_operation (code, GET_MODE (x), to,
- GET_MODE (XEXP (x, 0)));
-
+ new = simplify_gen_unary (code, GET_MODE (x), XEXP (x, 0),
+ op0_mode);
/* If any of the above failed, substitute in something that
we know won't be recognized. */
if (!new)
new = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
-
validate_change (object, loc, new, 1);
- return;
}
break;
-
case SUBREG:
- /* In case we are replacing by constant, attempt to simplify it to non-SUBREG
- expression. We can't do this later, since the information about inner mode
- may be lost. */
- if (CONSTANT_P (to) && rtx_equal_p (SUBREG_REG (x), from))
- {
- if (GET_MODE_SIZE (GET_MODE (x)) == UNITS_PER_WORD
- && GET_MODE_SIZE (GET_MODE (from)) > UNITS_PER_WORD
- && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
- {
- rtx temp = operand_subword (to, SUBREG_WORD (x),
- 0, GET_MODE (from));
- if (temp)
- {
- validate_change (object, loc, temp, 1);
- return;
- }
- }
- if (subreg_lowpart_p (x))
- {
- rtx new = gen_lowpart_if_possible (GET_MODE (x), to);
- if (new)
- {
- validate_change (object, loc, new, 1);
- return;
- }
- }
-
- /* A paradoxical SUBREG of a VOIDmode constant is the same constant,
- since we are saying that the high bits don't matter. */
- if (GET_MODE (to) == VOIDmode
- && GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (GET_MODE (from)))
- {
- validate_change (object, loc, to, 1);
- return;
- }
- }
-
- /* Changing mode twice with SUBREG => just change it once,
- or not at all if changing back to starting mode. */
- if (GET_CODE (to) == SUBREG
- && rtx_equal_p (SUBREG_REG (x), from))
- {
- if (GET_MODE (x) == GET_MODE (SUBREG_REG (to))
- && SUBREG_WORD (x) == 0 && SUBREG_WORD (to) == 0)
- {
- validate_change (object, loc, SUBREG_REG (to), 1);
- return;
- }
-
- validate_change (object, loc,
- gen_rtx_SUBREG (GET_MODE (x), SUBREG_REG (to),
- SUBREG_WORD (x) + SUBREG_WORD (to)), 1);
- return;
- }
-
- /* If we have a SUBREG of a register that we are replacing and we are
- replacing it with a MEM, make a new MEM and try replacing the
- SUBREG with it. Don't do this if the MEM has a mode-dependent address
- or if we would be widening it. */
-
- if (GET_CODE (from) == REG
- && GET_CODE (to) == MEM
- && rtx_equal_p (SUBREG_REG (x), from)
- && ! mode_dependent_address_p (XEXP (to, 0))
- && ! MEM_VOLATILE_P (to)
- && GET_MODE_SIZE (GET_MODE (x)) <= GET_MODE_SIZE (GET_MODE (to)))
- {
- int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
- enum machine_mode mode = GET_MODE (x);
- rtx new;
-
- if (BYTES_BIG_ENDIAN)
- offset += (MIN (UNITS_PER_WORD,
- GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
- - MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)));
-
- new = gen_rtx_MEM (mode, plus_constant (XEXP (to, 0), offset));
- MEM_COPY_ATTRIBUTES (new, to);
- validate_change (object, loc, new, 1);
- return;
- }
+ /* All subregs possible to simplify should be simplified. */
+ new = simplify_subreg (GET_MODE (x), SUBREG_REG (x), op0_mode,
+ SUBREG_BYTE (x));
+
+ /* Subregs of VOIDmode operands are incorrect. */
+ if (!new && GET_MODE (SUBREG_REG (x)) == VOIDmode)
+ new = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
+ if (new)
+ validate_change (object, loc, new, 1);
break;
-
case ZERO_EXTRACT:
case SIGN_EXTRACT:
/* If we are replacing a register with memory, try to change the memory
- to be the mode required for memory in extract operations (this isn't
- likely to be an insertion operation; if it was, nothing bad will
- happen, we might just fail in some cases). */
+ to be the mode required for memory in extract operations (this isn't
+ likely to be an insertion operation; if it was, nothing bad will
+ happen, we might just fail in some cases). */
- if (GET_CODE (from) == REG && GET_CODE (to) == MEM
- && rtx_equal_p (XEXP (x, 0), from)
+ if (GET_CODE (XEXP (x, 0)) == MEM
&& GET_CODE (XEXP (x, 1)) == CONST_INT
&& GET_CODE (XEXP (x, 2)) == CONST_INT
- && ! mode_dependent_address_p (XEXP (to, 0))
- && ! MEM_VOLATILE_P (to))
+ && !mode_dependent_address_p (XEXP (XEXP (x, 0), 0))
+ && !MEM_VOLATILE_P (XEXP (x, 0)))
{
enum machine_mode wanted_mode = VOIDmode;
- enum machine_mode is_mode = GET_MODE (to);
+ enum machine_mode is_mode = GET_MODE (XEXP (x, 0));
int pos = INTVAL (XEXP (x, 2));
-#ifdef HAVE_extzv
- if (code == ZERO_EXTRACT)
+ if (GET_CODE (x) == ZERO_EXTRACT)
{
- wanted_mode = insn_data[(int) CODE_FOR_extzv].operand[1].mode;
- if (wanted_mode == VOIDmode)
- wanted_mode = word_mode;
+ enum machine_mode new_mode
+ = mode_for_extraction (EP_extzv, 1);
+ if (new_mode != MAX_MACHINE_MODE)
+ wanted_mode = new_mode;
}
-#endif
-#ifdef HAVE_extv
- if (code == SIGN_EXTRACT)
+ else if (GET_CODE (x) == SIGN_EXTRACT)
{
- wanted_mode = insn_data[(int) CODE_FOR_extv].operand[1].mode;
- if (wanted_mode == VOIDmode)
- wanted_mode = word_mode;
+ enum machine_mode new_mode
+ = mode_for_extraction (EP_extv, 1);
+ if (new_mode != MAX_MACHINE_MODE)
+ wanted_mode = new_mode;
}
-#endif
/* If we have a narrower mode, we can do something. */
if (wanted_mode != VOIDmode
int offset = pos / BITS_PER_UNIT;
rtx newmem;
- /* If the bytes and bits are counted differently, we
- must adjust the offset. */
+ /* If the bytes and bits are counted differently, we
+ must adjust the offset. */
if (BYTES_BIG_ENDIAN != BITS_BIG_ENDIAN)
- offset = (GET_MODE_SIZE (is_mode) - GET_MODE_SIZE (wanted_mode)
- - offset);
+ offset =
+ (GET_MODE_SIZE (is_mode) - GET_MODE_SIZE (wanted_mode) -
+ offset);
pos %= GET_MODE_BITSIZE (wanted_mode);
- newmem = gen_rtx_MEM (wanted_mode,
- plus_constant (XEXP (to, 0), offset));
- MEM_COPY_ATTRIBUTES (newmem, to);
+ newmem = adjust_address_nv (XEXP (x, 0), wanted_mode, offset);
validate_change (object, &XEXP (x, 2), GEN_INT (pos), 1);
validate_change (object, &XEXP (x, 0), newmem, 1);
}
break;
-
+
default:
break;
}
-
- /* For commutative or comparison operations we've already performed
- replacements. Don't try to perform them again. */
- if (GET_RTX_CLASS (code) != '<' && GET_RTX_CLASS (code) != 'c')
- {
- fmt = GET_RTX_FORMAT (code);
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
- {
- if (fmt[i] == 'e')
- validate_replace_rtx_1 (&XEXP (x, i), from, to, object);
- else if (fmt[i] == 'E')
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- validate_replace_rtx_1 (&XVECEXP (x, i, j), from, to, object);
- }
- }
}
/* Try replacing every occurrence of FROM in subexpression LOC of INSN
next_insn_tests_no_inequality (insn)
rtx insn;
{
- register rtx next = next_cc0_user (insn);
+ rtx next = next_cc0_user (insn);
/* If there is no next insn, we have to take the conservative choice. */
if (next == 0)
next_insns_test_no_inequality (insn)
rtx insn;
{
- register rtx next = NEXT_INSN (insn);
+ rtx next = NEXT_INSN (insn);
for (; next != 0; next = NEXT_INSN (next))
{
case LABEL_REF:
case SYMBOL_REF:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case CLOBBER:
return 0;
case MEM:
case SUBREG:
return find_single_use_1 (dest, &XEXP (x, 0));
-
+
default:
break;
}
int
general_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
- register enum rtx_code code = GET_CODE (op);
- int mode_altering_drug = 0;
+ enum rtx_code code = GET_CODE (op);
if (mode == VOIDmode)
mode = GET_MODE (op);
&& GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
return 0;
+ if (GET_CODE (op) == CONST_INT
+ && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
+ return 0;
+
if (CONSTANT_P (op))
return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode
|| mode == VOIDmode)
&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
return 0;
#endif
+ /* Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory
+ may result in incorrect reference. We should simplify all valid
+ subregs of MEM anyway. But allow this after reload because we
+ might be called from cleanup_subreg_operands.
+
+ ??? This is a kludge. */
+ if (!reload_completed && SUBREG_BYTE (op) != 0
+ && GET_CODE (SUBREG_REG (op)) == MEM)
+ return 0;
op = SUBREG_REG (op);
code = GET_CODE (op);
-#if 0
- /* No longer needed, since (SUBREG (MEM...))
- will load the MEM into a reload reg in the MEM's own mode. */
- mode_altering_drug = 1;
-#endif
}
if (code == REG)
if (code == MEM)
{
- register rtx y = XEXP (op, 0);
+ rtx y = XEXP (op, 0);
if (! volatile_ok && MEM_VOLATILE_P (op))
return 0;
return 0;
win:
- if (mode_altering_drug)
- return ! mode_dependent_address_p (XEXP (op, 0));
return 1;
}
\f
int
address_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
return memory_address_p (mode, op);
int
register_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
}
/* If we have an ADDRESSOF, consider it valid since it will be
- converted into something that will not be a MEM. */
+ converted into something that will not be a MEM. */
if (GET_CODE (op) == ADDRESSOF)
return 1;
int
scratch_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
int
immediate_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
/* Don't accept CONST_INT or anything similar
&& GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
return 0;
+ if (GET_CODE (op) == CONST_INT
+ && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
+ return 0;
+
/* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
result in 0/1. It seems a safe assumption that this is
in range for everyone. */
int
const_int_operand (op, mode)
- register rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+ rtx op;
+ enum machine_mode mode;
{
- return GET_CODE (op) == CONST_INT;
+ if (GET_CODE (op) != CONST_INT)
+ return 0;
+
+ if (mode != VOIDmode
+ && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
+ return 0;
+
+ return 1;
}
/* Returns 1 if OP is an operand that is a constant integer or constant
int
const_double_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
/* Don't accept CONST_INT or anything similar
int
nonimmediate_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
return (general_operand (op, mode) && ! CONSTANT_P (op));
int
nonmemory_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
if (CONSTANT_P (op))
&& GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
return 0;
+ if (GET_CODE (op) == CONST_INT
+ && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op))
+ return 0;
+
return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode
- || mode == VOIDmode)
+ || mode == VOIDmode)
#ifdef LEGITIMATE_PIC_OPERAND_P
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
#endif
int
memory_address_p (mode, addr)
enum machine_mode mode ATTRIBUTE_UNUSED;
- register rtx addr;
+ rtx addr;
{
if (GET_CODE (addr) == ADDRESSOF)
return 1;
-
+
GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
return 0;
int
memory_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
rtx inner;
int
indirect_operand (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
/* Before reload, a SUBREG isn't in memory (see memory_operand, above). */
if (! reload_completed
&& GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == MEM)
{
- register int offset = SUBREG_WORD (op) * UNITS_PER_WORD;
+ int offset = SUBREG_BYTE (op);
rtx inner = SUBREG_REG (op);
- if (BYTES_BIG_ENDIAN)
- offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (op)))
- - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (inner))));
-
if (mode != VOIDmode && GET_MODE (op) != mode)
return 0;
int
comparison_operator (op, mode)
- register rtx op;
+ rtx op;
enum machine_mode mode;
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
const char **constraints;
enum machine_mode *modes;
{
- register int i;
+ int i;
int noperands;
const char *template = 0;
template = ASM_OPERANDS_TEMPLATE (asmop);
}
else if (GET_CODE (body) == PARALLEL
- && GET_CODE (XVECEXP (body, 0, 0)) == SET)
+ && GET_CODE (XVECEXP (body, 0, 0)) == SET
+ && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) == ASM_OPERANDS)
{
rtx asmop = SET_SRC (XVECEXP (body, 0, 0));
int nparallel = XVECLEN (body, 0); /* Includes CLOBBERs. */
{
if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
break; /* Past last SET */
-
+
if (operands)
operands[i] = SET_DEST (XVECEXP (body, 0, i));
if (operand_locs)
return template;
}
-/* Check if an asm_operand matches it's constraints.
+/* Check if an asm_operand matches it's constraints.
Return > 0 if ok, = 0 if bad, < 0 if inconclusive. */
int
proper matching constraint, but we can't actually fail
the check if they didn't. Indicate that results are
inconclusive. */
+ while (ISDIGIT (*constraint))
+ constraint++;
result = -1;
break;
if (GET_CODE (op) == MEM
&& (1
|| GET_CODE (XEXP (op, 0)) == PRE_DEC
- || GET_CODE (XEXP (op, 0)) == POST_DEC))
+ || GET_CODE (XEXP (op, 0)) == POST_DEC))
return 1;
break;
if (GET_CODE (op) == MEM
&& (1
|| GET_CODE (XEXP (op, 0)) == PRE_INC
- || GET_CODE (XEXP (op, 0)) == POST_INC))
+ || GET_CODE (XEXP (op, 0)) == POST_INC))
return 1;
break;
case 'E':
-#ifndef REAL_ARITHMETIC
- /* Match any floating double constant, but only if
- we can examine the bits of it reliably. */
- if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
- || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
- && GET_MODE (op) != VOIDmode && ! flag_pretend_float)
- break;
-#endif
- /* FALLTHRU */
-
case 'F':
if (GET_CODE (op) == CONST_DOUBLE)
return 1;
return the location (type rtx *) of the pointer to that constant term.
Otherwise, return a null pointer. */
-static rtx *
+rtx *
find_constant_term_loc (p)
rtx *p;
{
- register rtx *tem;
- register enum rtx_code code = GET_CODE (*p);
+ rtx *tem;
+ enum rtx_code code = GET_CODE (*p);
/* If *P IS such a constant term, P is its location. */
offsettable_address_p (strictp, mode, y)
int strictp;
enum machine_mode mode;
- register rtx y;
+ rtx y;
{
- register enum rtx_code ycode = GET_CODE (y);
- register rtx z;
+ enum rtx_code ycode = GET_CODE (y);
+ rtx z;
rtx y1 = y;
rtx *y2;
int (*addressp) PARAMS ((enum machine_mode, rtx)) =
/* The offset added here is chosen as the maximum offset that
any instruction could need to add when operating on something
of the specified mode. We assume that if Y and Y+c are
- valid addresses then so is Y+d for all 0<d<c. */
-
- z = plus_constant_for_output (y, mode_sz - 1);
+ valid addresses then so is Y+d for all 0<d<c. adjust_address will
+ go inside a LO_SUM here, so we do so as well. */
+ if (GET_CODE (y) == LO_SUM
+ && mode != BLKmode
+ && mode_sz <= GET_MODE_ALIGNMENT (mode) / BITS_PER_UNIT)
+ z = gen_rtx_LO_SUM (GET_MODE (y), XEXP (y, 0),
+ plus_constant (XEXP (y, 1), mode_sz - 1));
+ else
+ z = plus_constant (y, mode_sz - 1);
/* Use QImode because an odd displacement may be automatically invalid
for any wider mode. But it should be valid for a single byte. */
int
mode_dependent_address_p (addr)
- rtx addr ATTRIBUTE_UNUSED; /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */
+ rtx addr ATTRIBUTE_UNUSED; /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */
{
GO_IF_MODE_DEPENDENT_ADDRESS (addr, win);
return 0;
- /* Label `win' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
+ /* Label `win' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
win: ATTRIBUTE_UNUSED_LABEL
return 1;
}
addr = XEXP (op, 0);
GO_IF_MODE_DEPENDENT_ADDRESS (addr, lose);
return 1;
- /* Label `lose' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
+ /* Label `lose' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
lose: ATTRIBUTE_UNUSED_LABEL
return 0;
}
-
-/* Given an operand OP that is a valid memory reference which
- satisfies offsettable_memref_p, return a new memory reference whose
- address has been adjusted by OFFSET. OFFSET should be positive and
- less than the size of the object referenced. */
-
-rtx
-adj_offsettable_operand (op, offset)
- rtx op;
- int offset;
-{
- register enum rtx_code code = GET_CODE (op);
-
- if (code == MEM)
- {
- register rtx y = XEXP (op, 0);
- register rtx new;
-
- if (CONSTANT_ADDRESS_P (y))
- {
- new = gen_rtx_MEM (GET_MODE (op),
- plus_constant_for_output (y, offset));
- MEM_COPY_ATTRIBUTES (new, op);
- return new;
- }
-
- if (GET_CODE (y) == PLUS)
- {
- rtx z = y;
- register rtx *const_loc;
-
- op = copy_rtx (op);
- z = XEXP (op, 0);
- const_loc = find_constant_term_loc (&z);
- if (const_loc)
- {
- *const_loc = plus_constant_for_output (*const_loc, offset);
- return op;
- }
- }
-
- new = gen_rtx_MEM (GET_MODE (op), plus_constant_for_output (y, offset));
- MEM_COPY_ATTRIBUTES (new, op);
- return new;
- }
- abort ();
-}
\f
/* Like extract_insn, but save insn extracted and don't extract again, when
called again for the same insn expecting that recog_data still contain the
break;
case '&':
op_alt[j].earlyclobber = 1;
- break;
+ break;
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
- op_alt[j].matches = c - '0';
- recog_op_alt[op_alt[j].matches][j].matched = i;
+ {
+ char *end;
+ op_alt[j].matches = strtoul (p - 1, &end, 10);
+ recog_op_alt[op_alt[j].matches][j].matched = i;
+ p = end;
+ }
break;
case 'm':
case 'p':
op_alt[j].is_address = 1;
- op_alt[j].class = reg_class_subunion[(int) op_alt[j].class][(int) BASE_REG_CLASS];
+ op_alt[j].class = reg_class_subunion[(int) op_alt[j].class]
+ [(int) MODE_BASE_REG_CLASS (VOIDmode)];
break;
case 'g': case 'r':
break;
default:
- op_alt[j].class = reg_class_subunion[(int) op_alt[j].class][(int) REG_CLASS_FROM_LETTER ((unsigned char)c)];
+ op_alt[j].class = reg_class_subunion[(int) op_alt[j].class][(int) REG_CLASS_FROM_LETTER ((unsigned char) c)];
break;
}
}
}
}
}
-
+
/* Check the operands of an insn against the insn's operand constraints
and return 1 if they are valid.
The information about the insn's operands, constraints, operand modes
const char *constraints[MAX_RECOG_OPERANDS];
int matching_operands[MAX_RECOG_OPERANDS];
int earlyclobber[MAX_RECOG_OPERANDS];
- register int c;
+ int c;
struct funny_match funny_match[MAX_RECOG_OPERANDS];
int funny_match_index;
do
{
- register int opno;
+ int opno;
int lose = 0;
funny_match_index = 0;
for (opno = 0; opno < recog_data.n_operands; opno++)
{
- register rtx op = recog_data.operand[opno];
+ rtx op = recog_data.operand[opno];
enum machine_mode mode = GET_MODE (op);
- register const char *p = constraints[opno];
+ const char *p = constraints[opno];
int offset = 0;
int win = 0;
int val;
{
if (GET_CODE (SUBREG_REG (op)) == REG
&& REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
- offset = SUBREG_WORD (op);
+ offset = subreg_regno_offset (REGNO (SUBREG_REG (op)),
+ GET_MODE (SUBREG_REG (op)),
+ SUBREG_BYTE (op),
+ GET_MODE (op));
op = SUBREG_REG (op);
}
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
+ {
+ /* This operand must be the same as a previous one.
+ This kind of constraint is used for instructions such
+ as add when they take only two operands.
- /* This operand must be the same as a previous one.
- This kind of constraint is used for instructions such
- as add when they take only two operands.
+ Note that the lower-numbered operand is passed first.
- Note that the lower-numbered operand is passed first.
+ If we are not testing strictly, assume that this
+ constraint will be satisfied. */
- If we are not testing strictly, assume that this constraint
- will be satisfied. */
- if (strict < 0)
- val = 1;
- else
- {
- rtx op1 = recog_data.operand[c - '0'];
- rtx op2 = recog_data.operand[opno];
+ char *end;
+ int match;
- /* A unary operator may be accepted by the predicate,
- but it is irrelevant for matching constraints. */
- if (GET_RTX_CLASS (GET_CODE (op1)) == '1')
- op1 = XEXP (op1, 0);
- if (GET_RTX_CLASS (GET_CODE (op2)) == '1')
- op2 = XEXP (op2, 0);
+ match = strtoul (p - 1, &end, 10);
+ p = end;
- val = operands_match_p (op1, op2);
- }
+ if (strict < 0)
+ val = 1;
+ else
+ {
+ rtx op1 = recog_data.operand[match];
+ rtx op2 = recog_data.operand[opno];
- matching_operands[opno] = c - '0';
- matching_operands[c - '0'] = opno;
+ /* A unary operator may be accepted by the predicate,
+ but it is irrelevant for matching constraints. */
+ if (GET_RTX_CLASS (GET_CODE (op1)) == '1')
+ op1 = XEXP (op1, 0);
+ if (GET_RTX_CLASS (GET_CODE (op2)) == '1')
+ op2 = XEXP (op2, 0);
- if (val != 0)
- win = 1;
- /* If output is *x and input is *--x,
- arrange later to change the output to *--x as well,
- since the output op is the one that will be printed. */
- if (val == 2 && strict > 0)
- {
- funny_match[funny_match_index].this = opno;
- funny_match[funny_match_index++].other = c - '0';
- }
+ val = operands_match_p (op1, op2);
+ }
+
+ matching_operands[opno] = match;
+ matching_operands[match] = opno;
+
+ if (val != 0)
+ win = 1;
+
+ /* If output is *x and input is *--x, arrange later
+ to change the output to *--x as well, since the
+ output op is the one that will be printed. */
+ if (val == 2 && strict > 0)
+ {
+ funny_match[funny_match_index].this = opno;
+ funny_match[funny_match_index++].other = match;
+ }
+ }
break;
case 'p':
break;
case 'E':
-#ifndef REAL_ARITHMETIC
- /* Match any CONST_DOUBLE, but only if
- we can examine the bits of it reliably. */
- if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
- || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
- && GET_MODE (op) != VOIDmode && ! flag_pretend_float)
- break;
-#endif
- if (GET_CODE (op) == CONST_DOUBLE)
- win = 1;
- break;
-
case 'F':
if (GET_CODE (op) == CONST_DOUBLE)
win = 1;
int
reg_fits_class_p (operand, class, offset, mode)
rtx operand;
- register enum reg_class class;
+ enum reg_class class;
int offset;
enum machine_mode mode;
{
- register int regno = REGNO (operand);
+ int regno = REGNO (operand);
if (regno < FIRST_PSEUDO_REGISTER
&& TEST_HARD_REG_BIT (reg_class_contents[(int) class],
regno + offset))
{
- register int sr;
+ int sr;
regno += offset;
for (sr = HARD_REGNO_NREGS (regno, mode) - 1;
sr > 0; sr--)
return 0;
}
\f
+/* Split single instruction. Helper function for split_all_insns.
+ Return last insn in the sequence if successful, or NULL if unsuccessful. */
+static rtx
+split_insn (insn)
+ rtx insn;
+{
+ rtx set;
+ if (!INSN_P (insn))
+ ;
+ /* Don't split no-op move insns. These should silently
+ disappear later in final. Splitting such insns would
+ break the code that handles REG_NO_CONFLICT blocks. */
+
+ else if ((set = single_set (insn)) != NULL && set_noop_p (set))
+ {
+ /* Nops get in the way while scheduling, so delete them
+ now if register allocation has already been done. It
+ is too risky to try to do this before register
+ allocation, and there are unlikely to be very many
+ nops then anyways. */
+ if (reload_completed)
+ delete_insn_and_edges (insn);
+ }
+ else
+ {
+ /* Split insns here to get max fine-grain parallelism. */
+ rtx first = PREV_INSN (insn);
+ rtx last = try_split (PATTERN (insn), insn, 1);
+
+ if (last != insn)
+ {
+ /* try_split returns the NOTE that INSN became. */
+ PUT_CODE (insn, NOTE);
+ NOTE_SOURCE_FILE (insn) = 0;
+ NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
+
+ /* ??? Coddle to md files that generate subregs in post-
+ reload splitters instead of computing the proper
+ hard register. */
+ if (reload_completed && first != last)
+ {
+ first = NEXT_INSN (first);
+ while (1)
+ {
+ if (INSN_P (first))
+ cleanup_subreg_operands (first);
+ if (first == last)
+ break;
+ first = NEXT_INSN (first);
+ }
+ }
+ return last;
+ }
+ }
+ return NULL_RTX;
+}
/* Split all insns in the function. If UPD_LIFE, update life info after. */
void
{
sbitmap blocks;
int changed;
- int i;
+ basic_block bb;
- blocks = sbitmap_alloc (n_basic_blocks);
+ blocks = sbitmap_alloc (last_basic_block);
sbitmap_zero (blocks);
changed = 0;
- for (i = n_basic_blocks - 1; i >= 0; --i)
+ FOR_EACH_BB_REVERSE (bb)
{
- basic_block bb = BASIC_BLOCK (i);
rtx insn, next;
+ bool finish = false;
- for (insn = bb->head; insn ; insn = next)
+ for (insn = bb->head; !finish ; insn = next)
{
- rtx set;
+ rtx last;
/* Can't use `next_real_insn' because that might go across
CODE_LABELS and short-out basic blocks. */
next = NEXT_INSN (insn);
- if (! INSN_P (insn))
- ;
-
- /* Don't split no-op move insns. These should silently
- disappear later in final. Splitting such insns would
- break the code that handles REG_NO_CONFLICT blocks. */
-
- else if ((set = single_set (insn)) != NULL
- && rtx_equal_p (SET_SRC (set), SET_DEST (set)))
+ finish = (insn == bb->end);
+ last = split_insn (insn);
+ if (last)
{
- /* Nops get in the way while scheduling, so delete them
- now if register allocation has already been done. It
- is too risky to try to do this before register
- allocation, and there are unlikely to be very many
- nops then anyways. */
- if (reload_completed)
- {
- PUT_CODE (insn, NOTE);
- NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (insn) = 0;
- }
+ /* The split sequence may include barrier, but the
+ BB boundary we are interested in will be set to previous
+ one. */
+
+ while (GET_CODE (last) == BARRIER)
+ last = PREV_INSN (last);
+ SET_BIT (blocks, bb->index);
+ changed = 1;
+ insn = last;
}
- else
- {
- /* Split insns here to get max fine-grain parallelism. */
- rtx first = PREV_INSN (insn);
- rtx last = try_split (PATTERN (insn), insn, 1);
-
- if (last != insn)
- {
- SET_BIT (blocks, i);
- changed = 1;
-
- /* try_split returns the NOTE that INSN became. */
- PUT_CODE (insn, NOTE);
- NOTE_SOURCE_FILE (insn) = 0;
- NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
-
- /* ??? Coddle to md files that generate subregs in post-
- reload splitters instead of computing the proper
- hard register. */
- if (reload_completed && first != last)
- {
- first = NEXT_INSN (first);
- while (1)
- {
- if (INSN_P (first))
- cleanup_subreg_operands (first);
- if (first == last)
- break;
- first = NEXT_INSN (first);
- }
- }
-
- if (insn == bb->end)
- {
- bb->end = last;
- break;
- }
- }
- }
-
- if (insn == bb->end)
- break;
}
+ }
- /* ??? When we're called from just after reload, the CFG is in bad
- shape, and we may have fallen off the end. This could be fixed
- by having reload not try to delete unreachable code. Otherwise
- assert we found the end insn. */
- if (insn == NULL && upd_life)
- abort ();
+ if (changed)
+ {
+ find_many_sub_basic_blocks (blocks);
}
if (changed && upd_life)
{
- compute_bb_for_insn (get_max_uid ());
count_or_remove_death_notes (blocks, 1);
update_life_info (blocks, UPDATE_LIFE_LOCAL, PROP_DEATH_NOTES);
}
+#ifdef ENABLE_CHECKING
+ verify_flow_info ();
+#endif
sbitmap_free (blocks);
}
+
+/* Same as split_all_insns, but do not expect CFG to be available.
+ Used by machine depedent reorg passes. */
+
+void
+split_all_insns_noflow ()
+{
+ rtx next, insn;
+
+ for (insn = get_insns (); insn; insn = next)
+ {
+ next = NEXT_INSN (insn);
+ split_insn (insn);
+ }
+ return;
+}
\f
#ifdef HAVE_peephole2
struct peep2_insn_data
return NULL_RTX;
}
-/* Perform the peephole2 optimization pass. */
+/* Perform the peephole2 optimization pass. */
void
peephole2_optimize (dump_file)
regset_head rs_heads[MAX_INSNS_PER_PEEP2 + 2];
rtx insn, prev;
regset live;
- int i, b;
+ int i;
+ basic_block bb;
#ifdef HAVE_conditional_execution
sbitmap blocks;
- int changed;
+ bool changed;
#endif
+ bool do_cleanup_cfg = false;
+ bool do_rebuild_jump_labels = false;
/* Initialize the regsets we're going to use. */
for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
live = INITIALIZE_REG_SET (rs_heads[i]);
#ifdef HAVE_conditional_execution
- blocks = sbitmap_alloc (n_basic_blocks);
+ blocks = sbitmap_alloc (last_basic_block);
sbitmap_zero (blocks);
- changed = 0;
+ changed = false;
#else
count_or_remove_death_notes (NULL, 1);
#endif
- for (b = n_basic_blocks - 1; b >= 0; --b)
+ FOR_EACH_BB_REVERSE (bb)
{
- basic_block bb = BASIC_BLOCK (b);
struct propagate_block_info *pbi;
/* Indicate that all slots except the last holds invalid data. */
prev = PREV_INSN (insn);
if (INSN_P (insn))
{
- rtx try;
+ rtx try, before_try, x;
int match_len;
+ rtx note;
+ bool was_call = false;
/* Record this insn. */
if (--peep2_current < 0)
try = peephole2_insns (PATTERN (insn), insn, &match_len);
if (try != NULL)
{
+ /* If we are splitting a CALL_INSN, look for the CALL_INSN
+ in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
+ cfg-related call notes. */
+ for (i = 0; i <= match_len; ++i)
+ {
+ int j;
+ rtx old_insn, new_insn, note;
+
+ j = i + peep2_current;
+ if (j >= MAX_INSNS_PER_PEEP2 + 1)
+ j -= MAX_INSNS_PER_PEEP2 + 1;
+ old_insn = peep2_insn_data[j].insn;
+ if (GET_CODE (old_insn) != CALL_INSN)
+ continue;
+ was_call = true;
+
+ new_insn = try;
+ while (new_insn != NULL_RTX)
+ {
+ if (GET_CODE (new_insn) == CALL_INSN)
+ break;
+ new_insn = NEXT_INSN (new_insn);
+ }
+
+ if (new_insn == NULL_RTX)
+ abort ();
+
+ CALL_INSN_FUNCTION_USAGE (new_insn)
+ = CALL_INSN_FUNCTION_USAGE (old_insn);
+
+ for (note = REG_NOTES (old_insn);
+ note;
+ note = XEXP (note, 1))
+ switch (REG_NOTE_KIND (note))
+ {
+ case REG_NORETURN:
+ case REG_SETJMP:
+ case REG_ALWAYS_RETURN:
+ REG_NOTES (new_insn)
+ = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
+ XEXP (note, 0),
+ REG_NOTES (new_insn));
+ default:
+ /* Discard all other reg notes. */
+ break;
+ }
+
+ /* Croak if there is another call in the sequence. */
+ while (++i <= match_len)
+ {
+ j = i + peep2_current;
+ if (j >= MAX_INSNS_PER_PEEP2 + 1)
+ j -= MAX_INSNS_PER_PEEP2 + 1;
+ old_insn = peep2_insn_data[j].insn;
+ if (GET_CODE (old_insn) == CALL_INSN)
+ abort ();
+ }
+ break;
+ }
+
i = match_len + peep2_current;
if (i >= MAX_INSNS_PER_PEEP2 + 1)
i -= MAX_INSNS_PER_PEEP2 + 1;
+ note = find_reg_note (peep2_insn_data[i].insn,
+ REG_EH_REGION, NULL_RTX);
+
/* Replace the old sequence with the new. */
- flow_delete_insn_chain (insn, peep2_insn_data[i].insn);
- try = emit_insn_after (try, prev);
+ try = emit_insn_after_scope (try, peep2_insn_data[i].insn,
+ INSN_SCOPE (peep2_insn_data[i].insn));
+ before_try = PREV_INSN (insn);
+ delete_insn_chain (insn, peep2_insn_data[i].insn);
- /* Adjust the basic block boundaries. */
- if (peep2_insn_data[i].insn == bb->end)
- bb->end = try;
- if (insn == bb->head)
- bb->head = NEXT_INSN (prev);
+ /* Re-insert the EH_REGION notes. */
+ if (note || (was_call && nonlocal_goto_handler_labels))
+ {
+ edge eh_edge;
+
+ for (eh_edge = bb->succ; eh_edge
+ ; eh_edge = eh_edge->succ_next)
+ if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
+ break;
+
+ for (x = try ; x != before_try ; x = PREV_INSN (x))
+ if (GET_CODE (x) == CALL_INSN
+ || (flag_non_call_exceptions
+ && may_trap_p (PATTERN (x))
+ && !find_reg_note (x, REG_EH_REGION, NULL)))
+ {
+ if (note)
+ REG_NOTES (x)
+ = gen_rtx_EXPR_LIST (REG_EH_REGION,
+ XEXP (note, 0),
+ REG_NOTES (x));
+
+ if (x != bb->end && eh_edge)
+ {
+ edge nfte, nehe;
+ int flags;
+
+ nfte = split_block (bb, x);
+ flags = (eh_edge->flags
+ & (EDGE_EH | EDGE_ABNORMAL));
+ if (GET_CODE (x) == CALL_INSN)
+ flags |= EDGE_ABNORMAL_CALL;
+ nehe = make_edge (nfte->src, eh_edge->dest,
+ flags);
+
+ nehe->probability = eh_edge->probability;
+ nfte->probability
+ = REG_BR_PROB_BASE - nehe->probability;
+
+ do_cleanup_cfg |= purge_dead_edges (nfte->dest);
+#ifdef HAVE_conditional_execution
+ SET_BIT (blocks, nfte->dest->index);
+ changed = true;
+#endif
+ bb = nfte->src;
+ eh_edge = nehe;
+ }
+ }
+
+ /* Converting possibly trapping insn to non-trapping is
+ possible. Zap dummy outgoing edges. */
+ do_cleanup_cfg |= purge_dead_edges (bb);
+ }
#ifdef HAVE_conditional_execution
/* With conditional execution, we cannot back up the
death data structures are not so self-contained.
So record that we've made a modification to this
block and update life information at the end. */
- SET_BIT (blocks, b);
- changed = 1;
+ SET_BIT (blocks, bb->index);
+ changed = true;
for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
peep2_insn_data[i].insn = NULL_RTX;
COPY_REG_SET (live, peep2_insn_data[i].live_before);
/* Update life information for the new sequence. */
+ x = try;
do
{
- if (INSN_P (try))
+ if (INSN_P (x))
{
if (--i < 0)
i = MAX_INSNS_PER_PEEP2;
- peep2_insn_data[i].insn = try;
- propagate_one_insn (pbi, try);
+ peep2_insn_data[i].insn = x;
+ propagate_one_insn (pbi, x);
COPY_REG_SET (peep2_insn_data[i].live_before, live);
}
- try = PREV_INSN (try);
+ x = PREV_INSN (x);
}
- while (try != prev);
+ while (x != prev);
/* ??? Should verify that LIVE now matches what we
had before the new sequence. */
peep2_current = i;
#endif
+
+ /* If we generated a jump instruction, it won't have
+ JUMP_LABEL set. Recompute after we're done. */
+ for (x = try; x != before_try; x = PREV_INSN (x))
+ if (GET_CODE (x) == JUMP_INSN)
+ {
+ do_rebuild_jump_labels = true;
+ break;
+ }
}
}
FREE_REG_SET (peep2_insn_data[i].live_before);
FREE_REG_SET (live);
+ if (do_rebuild_jump_labels)
+ rebuild_jump_labels (get_insns ());
+
+ /* If we eliminated EH edges, we may be able to merge blocks. Further,
+ we've changed global life since exception handlers are no longer
+ reachable. */
+ if (do_cleanup_cfg)
+ {
+ cleanup_cfg (0);
+ update_life_info (0, UPDATE_LIFE_GLOBAL_RM_NOTES, PROP_DEATH_NOTES);
+ }
#ifdef HAVE_conditional_execution
- count_or_remove_death_notes (blocks, 1);
- update_life_info (blocks, UPDATE_LIFE_LOCAL, PROP_DEATH_NOTES);
+ else
+ {
+ count_or_remove_death_notes (blocks, 1);
+ update_life_info (blocks, UPDATE_LIFE_LOCAL, PROP_DEATH_NOTES);
+ }
sbitmap_free (blocks);
#endif
}
#endif /* HAVE_peephole2 */
+
+/* Common predicates for use with define_bypass. */
+
+/* True if the dependency between OUT_INSN and IN_INSN is on the store
+ data not the address operand(s) of the store. IN_INSN must be
+ single_set. OUT_INSN must be either a single_set or a PARALLEL with
+ SETs inside. */
+
+int
+store_data_bypass_p (out_insn, in_insn)
+ rtx out_insn, in_insn;
+{
+ rtx out_set, in_set;
+
+ in_set = single_set (in_insn);
+ if (! in_set)
+ abort ();
+
+ if (GET_CODE (SET_DEST (in_set)) != MEM)
+ return false;
+
+ out_set = single_set (out_insn);
+ if (out_set)
+ {
+ if (reg_mentioned_p (SET_DEST (out_set), SET_DEST (in_set)))
+ return false;
+ }
+ else
+ {
+ rtx out_pat;
+ int i;
+
+ out_pat = PATTERN (out_insn);
+ if (GET_CODE (out_pat) != PARALLEL)
+ abort ();
+
+ for (i = 0; i < XVECLEN (out_pat, 0); i++)
+ {
+ rtx exp = XVECEXP (out_pat, 0, i);
+
+ if (GET_CODE (exp) == CLOBBER)
+ continue;
+
+ if (GET_CODE (exp) != SET)
+ abort ();
+
+ if (reg_mentioned_p (SET_DEST (exp), SET_DEST (in_set)))
+ return false;
+ }
+ }
+
+ return true;
+}
+
+/* True if the dependency between OUT_INSN and IN_INSN is in the IF_THEN_ELSE
+ condition, and not the THEN or ELSE branch. OUT_INSN may be either a single
+ or multiple set; IN_INSN should be single_set for truth, but for convenience
+ of insn categorization may be any JUMP or CALL insn. */
+
+int
+if_test_bypass_p (out_insn, in_insn)
+ rtx out_insn, in_insn;
+{
+ rtx out_set, in_set;
+
+ in_set = single_set (in_insn);
+ if (! in_set)
+ {
+ if (GET_CODE (in_insn) == JUMP_INSN || GET_CODE (in_insn) == CALL_INSN)
+ return false;
+ abort ();
+ }
+
+ if (GET_CODE (SET_SRC (in_set)) != IF_THEN_ELSE)
+ return false;
+ in_set = SET_SRC (in_set);
+
+ out_set = single_set (out_insn);
+ if (out_set)
+ {
+ if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1))
+ || reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2)))
+ return false;
+ }
+ else
+ {
+ rtx out_pat;
+ int i;
+
+ out_pat = PATTERN (out_insn);
+ if (GET_CODE (out_pat) != PARALLEL)
+ abort ();
+
+ for (i = 0; i < XVECLEN (out_pat, 0); i++)
+ {
+ rtx exp = XVECEXP (out_pat, 0, i);
+
+ if (GET_CODE (exp) == CLOBBER)
+ continue;
+
+ if (GET_CODE (exp) != SET)
+ abort ();
+
+ if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1))
+ || reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2)))
+ return false;
+ }
+ }
+
+ return true;
+}
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