/* ??? I'm lazy and don't wish to handle CONST_DOUBLE. Other
constants, such as SYMBOL_REF, cannot be extended. */
- if (GET_CODE (this_rtx) != CONST_INT)
+ if (!CONST_INT_P (this_rtx))
continue;
this_val = INTVAL (this_rtx);
a cheap CONST_INT. */
if (op_alt_regno[i][j] == -1
&& reg_fits_class_p (testreg, rclass, 0, mode)
- && (GET_CODE (recog_data.operand[i]) != CONST_INT
+ && (!CONST_INT_P (recog_data.operand[i])
|| (rtx_cost (recog_data.operand[i], SET,
optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)))
> rtx_cost (testreg, SET,
rtx prev = prev_nonnote_insn (insn);
rtx prev_set = prev ? single_set (prev) : NULL_RTX;
unsigned int regno = REGNO (reg);
- rtx const_reg = NULL_RTX;
+ rtx index_reg = NULL_RTX;
rtx reg_sum = NULL_RTX;
- /* Now, we need an index register.
- We'll set index_reg to this index register, const_reg to the
- register that is to be loaded with the constant
- (denoted as REGZ in the substitution illustration above),
- and reg_sum to the register-register that we want to use to
- substitute uses of REG (typically in MEMs) with.
- First check REG and BASE for being index registers;
- we can use them even if they are not dead. */
+ /* Now we need to set INDEX_REG to an index register (denoted as
+ REGZ in the illustration above) and REG_SUM to the expression
+ register+register that we want to use to substitute uses of REG
+ (typically in MEMs) with. First check REG and BASE for being
+ index registers; we can use them even if they are not dead. */
if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
|| TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
REGNO (base)))
{
- const_reg = reg;
+ index_reg = reg;
reg_sum = plus;
}
else
&& reg_state[i].store_ruid <= reg_state[regno].use_ruid
&& hard_regno_nregs[i][GET_MODE (reg)] == 1)
{
- rtx index_reg = gen_rtx_REG (GET_MODE (reg), i);
-
- const_reg = index_reg;
+ index_reg = gen_rtx_REG (GET_MODE (reg), i);
reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
break;
}
/* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
(REGY), i.e. BASE, is not clobbered before the last use we'll
create. */
- if (prev_set != 0
- && GET_CODE (SET_SRC (prev_set)) == CONST_INT
+ if (reg_sum
+ && prev_set
+ && CONST_INT_P (SET_SRC (prev_set))
&& rtx_equal_p (SET_DEST (prev_set), reg)
&& reg_state[regno].use_index >= 0
&& (reg_state[REGNO (base)].store_ruid
- <= reg_state[regno].use_ruid)
- && reg_sum != 0)
+ <= reg_state[regno].use_ruid))
{
int i;
- /* Change destination register and, if necessary, the
- constant value in PREV, the constant loading instruction. */
- validate_change (prev, &SET_DEST (prev_set), const_reg, 1);
+ /* Change destination register and, if necessary, the constant
+ value in PREV, the constant loading instruction. */
+ validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
if (reg_state[regno].offset != const0_rtx)
validate_change (prev,
&SET_SRC (prev_set),
if (apply_change_group ())
{
+ /* For every new use of REG_SUM, we have to record the use
+ of BASE therein, i.e. operand 1. */
+ for (i = reg_state[regno].use_index;
+ i < RELOAD_COMBINE_MAX_USES; i++)
+ reload_combine_note_use
+ (&XEXP (*reg_state[regno].reg_use[i].usep, 1),
+ reg_state[regno].reg_use[i].insn);
+
+ if (reg_state[REGNO (base)].use_ruid
+ > reg_state[regno].use_ruid)
+ reg_state[REGNO (base)].use_ruid
+ = reg_state[regno].use_ruid;
+
/* Delete the reg-reg addition. */
delete_insn (insn);
remove_reg_equal_equiv_notes (prev);
reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
- reg_state[REGNO (const_reg)].store_ruid
+ reg_state[REGNO (index_reg)].store_ruid
= reload_combine_ruid;
continue;
}
case PLUS:
/* We are interested in (plus (reg) (const_int)) . */
if (!REG_P (XEXP (x, 0))
- || GET_CODE (XEXP (x, 1)) != CONST_INT)
+ || !CONST_INT_P (XEXP (x, 1)))
break;
offset = XEXP (x, 1);
x = XEXP (x, 0);
(set (STRICT_LOW_PART (REGX)) (CONST_INT B))
*/
- if (GET_CODE (src) == CONST_INT && reg_base_reg[regno] < 0)
+ if (CONST_INT_P (src) && reg_base_reg[regno] < 0)
{
rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno],
GET_MODE (reg));
&& SET_DEST (set) == reg
&& GET_CODE (SET_SRC (set)) == PLUS
&& XEXP (SET_SRC (set), 0) == reg
- && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (SET_SRC (set), 1)))
{
rtx src3 = XEXP (SET_SRC (set), 1);
HOST_WIDE_INT added_offset = INTVAL (src3);
allocation if possible. */
&& SCALAR_INT_MODE_P (GET_MODE (XEXP (cnd, 0)))
&& hard_regno_nregs[REGNO (XEXP (cnd, 0))][GET_MODE (XEXP (cnd, 0))] == 1
- && GET_CODE (XEXP (cnd, 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (cnd, 1)))
{
rtx implicit_set =
gen_rtx_SET (VOIDmode, XEXP (cnd, 0), XEXP (cnd, 1));
{
base_reg = XEXP (src, 0);
- if (GET_CODE (XEXP (src, 1)) == CONST_INT)
+ if (CONST_INT_P (XEXP (src, 1)))
offset = INTVAL (XEXP (src, 1));
else if (REG_P (XEXP (src, 1))
&& (reg_set_luid[REGNO (XEXP (src, 1))]