* gcc.dg/uninit-H.c: Define ASM for Xtensa targets.

[pf3gnuchains/gcc-fork.git] / gcc / postreload.c

diff --git a/gcc/postreload.c b/gcc/postreload.c
index 3b15118..14dc712 100644 (file)
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -118,6 +118,19 @@ reload_cse_simplify (rtx insn, rtx testreg)
       int count = 0;
       rtx value = NULL_RTX;
 
+      /* Registers mentioned in the clobber list for an asm cannot be reused
+        within the body of the asm.  Invalidate those registers now so that
+        we don't try to substitute values for them.  */
+      if (asm_noperands (body) >= 0)
+       {
+         for (i = XVECLEN (body, 0) - 1; i >= 0; --i)
+           {
+             rtx part = XVECEXP (body, 0, i);
+             if (GET_CODE (part) == CLOBBER && REG_P (XEXP (part, 0)))
+               cselib_invalidate_rtx (XEXP (part, 0));
+           }
+       }
+
       /* If every action in a PARALLEL is a noop, we can delete
         the entire PARALLEL.  */
       for (i = XVECLEN (body, 0) - 1; i >= 0; --i)
@@ -414,7 +427,7 @@ reload_cse_simplify_operands (rtx insn, rtx testreg)
             extension.  Punt on this for now.  */
          if (! set)
            continue;
-         /* If the destination is a also MEM or a STRICT_LOW_PART, no
+         /* If the destination is also a MEM or a STRICT_LOW_PART, no
             extension applies.
             Also, if there is an explicit extension, we don't have to
             worry about an implicit one.  */
@@ -1375,13 +1388,14 @@ reload_cse_move2add (rtx first)
 
       /* If INSN is a conditional branch, we try to extract an
         implicit set out of it.  */
-      if (any_condjump_p (insn) && onlyjump_p (insn))
+      if (any_condjump_p (insn))
        {
          rtx cnd = fis_get_condition (insn);
 
          if (cnd != NULL_RTX
              && GET_CODE (cnd) == NE
              && REG_P (XEXP (cnd, 0))
+             && !reg_set_p (XEXP (cnd, 0), insn)
              /* The following two checks, which are also in
                 move2add_note_store, are intended to reduce the
                 number of calls to gen_rtx_SET to avoid memory