/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
- Copyright (C) 1991,92,94,95,96,97,98,99, 2000 Free Software Foundation, Inc.
+ Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+ Free Software Foundation, Inc.
This definition file is free software; you can redistribute it
and/or modify it under the terms of the GNU General Public
#define count_leading_zeros(COUNT,X) \
do { \
UDItype __xr = (X), __t, __a; \
- __asm__("cmpbge %1,%2,%0" : "=r"(__t) : "r"(~__xr), "r"(-1)); \
+ __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \
__a = __clz_tab[__t ^ 0xff] - 1; \
__asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \
(COUNT) = 64 - (__clz_tab[__t] + __a*8); \
#define count_trailing_zeros(COUNT,X) \
do { \
UDItype __xr = (X), __t, __a; \
- __asm__("cmpbge %1,%2,%0" : "=r"(__t) : "r"(~__xr), "r"(-1)); \
+ __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \
__t = ~__t & -~__t; \
__a = ((__t & 0xCC) != 0) * 2; \
__a += ((__t & 0xF0) != 0) * 4; \
"rIJ" ((USItype) (bh)), \
"r" ((USItype) (al)), \
"rIJ" ((USItype) (bl)))
-/* Call libgcc1 routine. */
+/* Call libgcc routine. */
#define umul_ppmm(w1, w0, u, v) \
do { \
DWunion __w; \
"1" ((USItype) (al)), \
"g" ((USItype) (bl)))
-/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
+/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
#if defined (__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
#endif /* not mcf5200 */
#endif /* not mc68020 */
-/* The '020, '030, '040 and '060 have bitfield insns. */
+/* The '020, '030, '040 and '060 have bitfield insns. */
#if defined (__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
} while (0)
#define SMUL_TIME 14
#define UDIV_TIME 120
-#elif defined (_ARCH_POWER)
+#elif defined (_ARCH_PWR)
#define umul_ppmm(xh, xl, m0, m1) \
do { \
USItype __m0 = (m0), __m1 = (m1); \
({union {UDItype __ll; \
struct {USItype __h, __l;} __i; \
} __xx; \
- __asm__ ("movw %1,%R0
- uemul %2,%0" \
+ __asm__ ("movw %1,%R0\n\tuemul %2,%0" \
: "=&r" (__xx.__ll) \
: "g" ((USItype) (u)), \
"g" ((USItype) (v))); \
: "r" ((USItype) (__d)), \
"1" ((USItype) (__n1)), \
"0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
-#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
+#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
#endif /* __sparclite__ */
#endif /* __sparc_v8__ */
#endif /* sparc32 */
__x1 += __ll_highpart (__x0);/* this can't give carry */ \
__x1 += __x2; /* but this indeed can */ \
if (__x1 < __x2) /* did we get it? */ \
- __x3 += __ll_B; /* yes, add it in the proper pos. */ \
+ __x3 += __ll_B; /* yes, add it in the proper pos. */ \
\
(w1) = __x3 + __ll_highpart (__x1); \
(w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \