/* Allocate registers within a basic block, for GNU compiler.
Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000 Free Software Foundation, Inc.
+ 1999, 2000, 2001 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA. */
/* Allocation of hard register numbers to pseudo registers is done in
two passes. In this pass we consider only regs that are born and
Tying is represented with "quantity numbers".
A non-tied register is given a new quantity number.
Tied registers have the same quantity number.
-
+
We have provision to exempt registers, even when they are contained
within the block, that can be tied to others that are not contained in it.
This is so that global_alloc could process them both and tie them then.
#include "rtl.h"
#include "tm_p.h"
#include "flags.h"
+#include "hard-reg-set.h"
#include "basic-block.h"
#include "regs.h"
#include "function.h"
-#include "hard-reg-set.h"
#include "insn-config.h"
#include "insn-attr.h"
#include "recog.h"
#include "output.h"
#include "toplev.h"
+#include "except.h"
\f
/* Next quantity number available for allocation. */
int n_refs;
+ /* The frequency of uses of quantity Q. */
+
+ int freq;
+
/* Insn number (counting from head of basic block)
where quantity Q was born. -1 if birth has not been recorded. */
short phys_reg;
- /* Nonzero if this quantity has been used in a SUBREG that changes
- its size. */
+ /* Nonzero if this quantity has been used in a SUBREG in some
+ way that is illegal. */
- char changes_size;
+ char changes_mode;
};
static short *qty_phys_num_sugg;
-
/* If (REG N) has been assigned a quantity number, is a register number
of another register assigned the same quantity number, or -1 for the
end of the chain. qty->first_reg point to the head of this chain. */
static int this_insn_number;
static rtx this_insn;
-/* Used to communicate changes made by update_equiv_regs to
- memref_referenced_p. reg_equiv_replacement is set for any REG_EQUIV note
- found or created, so that we can keep track of what memory accesses might
- be created later, e.g. by reload. */
+struct equivalence
+{
+ /* Set when an attempt should be made to replace a register
+ with the associated src entry. */
+
+ char replace;
+
+ /* Set when a REG_EQUIV note is found or created. Use to
+ keep track of what memory accesses might be created later,
+ e.g. by reload. */
-static rtx *reg_equiv_replacement;
+ rtx replacement;
-/* Used for communication between update_equiv_regs and no_equiv. */
-static rtx *reg_equiv_init_insns;
+ rtx src;
+
+ /* Loop depth is used to recognize equivalences which appear
+ to be present within the same loop (or in an inner loop). */
+
+ int loop_depth;
+
+ /* The list of each instruction which initializes this register. */
+
+ rtx init_insns;
+};
+
+/* reg_equiv[N] (where N is a pseudo reg number) is the equivalence
+ structure for that register. */
+
+static struct equivalence *reg_equiv;
/* Nonzero if we recorded an equivalence for a LABEL_REF. */
static int recorded_label_ref;
static void alloc_qty PARAMS ((int, enum machine_mode, int, int));
static void validate_equiv_mem_from_store PARAMS ((rtx, rtx, void *));
static int validate_equiv_mem PARAMS ((rtx, rtx, rtx));
-static int contains_replace_regs PARAMS ((rtx, char *));
+static int equiv_init_varies_p PARAMS ((rtx));
+static int equiv_init_movable_p PARAMS ((rtx, int));
+static int contains_replace_regs PARAMS ((rtx));
static int memref_referenced_p PARAMS ((rtx, rtx));
static int memref_used_between_p PARAMS ((rtx, rtx, rtx));
static void update_equiv_regs PARAMS ((void));
qty[qtyno].min_class = reg_preferred_class (regno);
qty[qtyno].alternate_class = reg_alternate_class (regno);
qty[qtyno].n_refs = REG_N_REFS (regno);
- qty[qtyno].changes_size = REG_CHANGES_SIZE (regno);
+ qty[qtyno].freq = REG_FREQ (regno);
+ qty[qtyno].changes_mode = REG_CHANGES_MODE (regno);
}
\f
/* Main entry point of this file. */
reg_qty = (int *) xmalloc (max_regno * sizeof (int));
reg_offset = (char *) xmalloc (max_regno * sizeof (char));
- reg_next_in_qty = (int *) xmalloc(max_regno * sizeof (int));
+ reg_next_in_qty = (int *) xmalloc (max_regno * sizeof (int));
- /* Allocate the reg_renumber array */
+ /* Allocate the reg_renumber array. */
allocate_reg_info (max_regno, FALSE, TRUE);
/* Determine which pseudo-registers can be allocated by local-alloc.
In general, these are the registers used only in a single block and
- which only die once. However, if a register's preferred class has only
- a few entries, don't allocate this register here unless it is preferred
- or nothing since retry_global_alloc won't be able to move it to
- GENERAL_REGS if a reload register of this class is needed.
+ which only die once.
We need not be concerned with which block actually uses the register
since we will never see it outside that block. */
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
{
- if (REG_BASIC_BLOCK (i) >= 0 && REG_N_DEATHS (i) == 1
- && (reg_alternate_class (i) == NO_REGS
- || ! CLASS_LIKELY_SPILLED_P (reg_preferred_class (i))))
+ if (REG_BASIC_BLOCK (i) >= 0 && REG_N_DEATHS (i) == 1)
reg_qty[i] = -2;
else
reg_qty[i] = -1;
else
{
#define CLEAR(vector) \
- bzero ((char *) (vector), (sizeof (*(vector))) * next_qty);
+ memset ((char *) (vector), 0, (sizeof (*(vector))) * next_qty);
CLEAR (qty_phys_copy_sugg);
CLEAR (qty_phys_num_copy_sugg);
return recorded_label_ref;
}
\f
-/* Depth of loops we are in while in update_equiv_regs. */
-static int loop_depth;
-
/* Used for communication between the following two functions: contains
a MEM that we wish to ensure remains unchanged. */
static rtx equiv_mem;
for (insn = start; insn && ! equiv_mem_modified; insn = NEXT_INSN (insn))
{
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+ if (! INSN_P (insn))
continue;
if (find_reg_note (insn, REG_DEAD, reg))
return 1;
if (GET_CODE (insn) == CALL_INSN && ! RTX_UNCHANGING_P (memref)
- && ! CONST_CALL_P (insn))
+ && ! CONST_OR_PURE_CALL_P (insn))
return 0;
note_stores (PATTERN (insn), validate_equiv_mem_from_store, NULL);
return 0;
}
-/* TRUE if X uses any registers for which reg_equiv_replace is true. */
+/* Returns zero if X is known to be invariant. */
+
+static int
+equiv_init_varies_p (x)
+ rtx x;
+{
+ register RTX_CODE code = GET_CODE (x);
+ register int i;
+ register const char *fmt;
+
+ switch (code)
+ {
+ case MEM:
+ return ! RTX_UNCHANGING_P (x) || equiv_init_varies_p (XEXP (x, 0));
+
+ case QUEUED:
+ return 1;
+
+ case CONST:
+ case CONST_INT:
+ case CONST_DOUBLE:
+ case SYMBOL_REF:
+ case LABEL_REF:
+ return 0;
+
+ case REG:
+ return reg_equiv[REGNO (x)].replace == 0 && rtx_varies_p (x, 0);
+
+ case ASM_OPERANDS:
+ if (MEM_VOLATILE_P (x))
+ return 1;
+
+ /* FALLTHROUGH */
+
+ default:
+ break;
+ }
+
+ fmt = GET_RTX_FORMAT (code);
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ if (fmt[i] == 'e')
+ {
+ if (equiv_init_varies_p (XEXP (x, i)))
+ return 1;
+ }
+ else if (fmt[i] == 'E')
+ {
+ int j;
+ for (j = 0; j < XVECLEN (x, i); j++)
+ if (equiv_init_varies_p (XVECEXP (x, i, j)))
+ return 1;
+ }
+
+ return 0;
+}
+
+/* Returns non-zero if X (used to initialize register REGNO) is movable.
+ X is only movable if the registers it uses have equivalent initializations
+ which appear to be within the same loop (or in an inner loop) and movable
+ or if they are not candidates for local_alloc and don't vary. */
+
+static int
+equiv_init_movable_p (x, regno)
+ rtx x;
+ int regno;
+{
+ int i, j;
+ const char *fmt;
+ enum rtx_code code = GET_CODE (x);
+
+ switch (code)
+ {
+ case SET:
+ return equiv_init_movable_p (SET_SRC (x), regno);
+
+ case CC0:
+ case CLOBBER:
+ return 0;
+
+ case PRE_INC:
+ case PRE_DEC:
+ case POST_INC:
+ case POST_DEC:
+ case PRE_MODIFY:
+ case POST_MODIFY:
+ return 0;
+
+ case REG:
+ return (reg_equiv[REGNO (x)].loop_depth >= reg_equiv[regno].loop_depth
+ && reg_equiv[REGNO (x)].replace)
+ || (REG_BASIC_BLOCK (REGNO (x)) < 0 && ! rtx_varies_p (x, 0));
+
+ case UNSPEC_VOLATILE:
+ return 0;
+
+ case ASM_OPERANDS:
+ if (MEM_VOLATILE_P (x))
+ return 0;
+
+ /* FALLTHROUGH */
+
+ default:
+ break;
+ }
+
+ fmt = GET_RTX_FORMAT (code);
+ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ switch (fmt[i])
+ {
+ case 'e':
+ if (! equiv_init_movable_p (XEXP (x, i), regno))
+ return 0;
+ break;
+ case 'E':
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+ if (! equiv_init_movable_p (XVECEXP (x, i, j), regno))
+ return 0;
+ break;
+ }
+
+ return 1;
+}
+
+/* TRUE if X uses any registers for which reg_equiv[REGNO].replace is true. */
static int
-contains_replace_regs (x, reg_equiv_replace)
+contains_replace_regs (x)
rtx x;
- char *reg_equiv_replace;
{
int i, j;
const char *fmt;
return 0;
case REG:
- return reg_equiv_replace[REGNO (x)];
+ return reg_equiv[REGNO (x)].replace;
default:
break;
switch (fmt[i])
{
case 'e':
- if (contains_replace_regs (XEXP (x, i), reg_equiv_replace))
+ if (contains_replace_regs (XEXP (x, i)))
return 1;
break;
case 'E':
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- if (contains_replace_regs (XVECEXP (x, i, j), reg_equiv_replace))
+ if (contains_replace_regs (XVECEXP (x, i, j)))
return 1;
break;
}
return 0;
case REG:
- return (reg_equiv_replacement[REGNO (x)]
+ return (reg_equiv[REGNO (x)].replacement
&& memref_referenced_p (memref,
- reg_equiv_replacement[REGNO (x)]));
+ reg_equiv[REGNO (x)].replacement));
case MEM:
if (true_dependence (memref, VOIDmode, x, rtx_varies_p))
return 1;
return memref_referenced_p (memref, SET_SRC (x));
-
+
default:
break;
}
for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
insn = NEXT_INSN (insn))
- if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
- && memref_referenced_p (memref, PATTERN (insn)))
+ if (INSN_P (insn) && memref_referenced_p (memref, PATTERN (insn)))
return 1;
return 0;
static void
update_equiv_regs ()
{
- /* Set when an attempt should be made to replace a register with the
- associated reg_equiv_replacement entry at the end of this function. */
- char *reg_equiv_replace;
rtx insn;
- int block, depth;
+ int block;
+ int loop_depth;
+ regset_head cleared_regs;
+ int clear_regnos = 0;
- reg_equiv_replace = (char *) xcalloc (max_regno, sizeof *reg_equiv_replace);
- reg_equiv_init_insns = (rtx *) xcalloc (max_regno, sizeof (rtx));
- reg_equiv_replacement = (rtx *) xcalloc (max_regno, sizeof (rtx));
+ reg_equiv = (struct equivalence *) xcalloc (max_regno, sizeof *reg_equiv);
+ INIT_REG_SET (&cleared_regs);
init_alias_analysis ();
- loop_depth = 0;
-
/* Scan the insns and find which registers have equivalences. Do this
in a separate scan of the insns because (due to -fcse-follow-jumps)
a register can be set below its use. */
+ loop_depth = 0;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
rtx note;
if (GET_CODE (insn) == NOTE)
{
if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
- loop_depth++;
+ ++loop_depth;
else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
- loop_depth--;
+ {
+ if (! loop_depth)
+ abort ();
+ --loop_depth;
+ }
}
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+ if (! INSN_P (insn))
continue;
for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
Don't add a REG_EQUIV note if the insn already has one. The existing
REG_EQUIV is likely more useful than the one we are adding.
- If one of the regs in the address is marked as reg_equiv_replace,
- then we can't add this REG_EQUIV note. The reg_equiv_replace
+ If one of the regs in the address has reg_equiv[REGNO].replace set,
+ then we can't add this REG_EQUIV note. The reg_equiv[REGNO].replace
optimization may move the set of this register immediately before
- insn, which puts it after reg_equiv_init_insns[regno], and hence
+ insn, which puts it after reg_equiv[REGNO].init_insns, and hence
the mention in the REG_EQUIV note would be to an uninitialized
pseudo. */
/* ????? This test isn't good enough; we might see a MEM with a use of
a pseudo register before we see its setting insn that will cause
- reg_equiv_replace for that pseudo to be set.
+ reg_equiv[].replace for that pseudo to be set.
Equivalences to MEMs should be made in another pass, after the
- reg_equiv_replace information has been gathered. */
+ reg_equiv[].replace information has been gathered. */
if (GET_CODE (dest) == MEM && GET_CODE (src) == REG
&& (regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
&& REG_BASIC_BLOCK (regno) >= 0
&& REG_N_SETS (regno) == 1
- && reg_equiv_init_insns[regno] != 0
- && reg_equiv_init_insns[regno] != const0_rtx
- && ! find_reg_note (XEXP (reg_equiv_init_insns[regno], 0),
+ && reg_equiv[regno].init_insns != 0
+ && reg_equiv[regno].init_insns != const0_rtx
+ && ! find_reg_note (XEXP (reg_equiv[regno].init_insns, 0),
REG_EQUIV, NULL_RTX)
- && ! contains_replace_regs (XEXP (dest, 0), reg_equiv_replace))
+ && ! contains_replace_regs (XEXP (dest, 0)))
{
- rtx init_insn = XEXP (reg_equiv_init_insns[regno], 0);
+ rtx init_insn = XEXP (reg_equiv[regno].init_insns, 0);
if (validate_equiv_mem (init_insn, src, dest)
&& ! memref_used_between_p (dest, init_insn, insn))
REG_NOTES (init_insn)
if (GET_CODE (dest) != REG
|| (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER
- || reg_equiv_init_insns[regno] == const0_rtx
+ || reg_equiv[regno].init_insns == const0_rtx
|| (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno))
&& GET_CODE (src) == MEM))
{
note_stores (set, no_equiv, NULL);
continue;
}
- /* Don't handle the equivalence if the source is in a register
- class that's likely to be spilled. */
- if (GET_CODE (src) == REG
- && REGNO (src) >= FIRST_PSEUDO_REGISTER
- && CLASS_LIKELY_SPILLED_P (reg_preferred_class (REGNO (src))))
- {
- no_equiv (dest, set, NULL);
- continue;
- }
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
+ /* cse sometimes generates function invariants, but doesn't put a
+ REG_EQUAL note on the insn. Since this note would be redundant,
+ there's no point creating it earlier than here. */
+ if (! note && ! rtx_varies_p (src, 0))
+ REG_NOTES (insn)
+ = note = gen_rtx_EXPR_LIST (REG_EQUAL, src, REG_NOTES (insn));
+
+ /* Don't bother considering a REG_EQUAL note containing an EXPR_LIST
+ since it represents a function call */
+ if (note && GET_CODE (XEXP (note, 0)) == EXPR_LIST)
+ note = NULL_RTX;
+
if (REG_N_SETS (regno) != 1
&& (! note
- || ! function_invariant_p (XEXP (note, 0))
- || (reg_equiv_replacement[regno]
+ || rtx_varies_p (XEXP (note, 0), 0)
+ || (reg_equiv[regno].replacement
&& ! rtx_equal_p (XEXP (note, 0),
- reg_equiv_replacement[regno]))))
+ reg_equiv[regno].replacement))))
{
no_equiv (dest, set, NULL);
continue;
}
/* Record this insn as initializing this register. */
- reg_equiv_init_insns[regno]
- = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv_init_insns[regno]);
+ reg_equiv[regno].init_insns
+ = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv[regno].init_insns);
/* If this register is known to be equal to a constant, record that
it is always equivalent to the constant. */
- if (note && function_invariant_p (XEXP (note, 0)))
+ if (note && ! rtx_varies_p (XEXP (note, 0), 0))
PUT_MODE (note, (enum machine_mode) REG_EQUIV);
/* If this insn introduces a "constant" register, decrease the priority
a register used only in one basic block from a MEM. If so, and the
MEM remains unchanged for the life of the register, add a REG_EQUIV
note. */
-
+
note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
if (note == 0 && REG_BASIC_BLOCK (regno) >= 0
&& (GET_CODE (XEXP (XEXP (XEXP (note, 0), 0), 0))
== LABEL_REF)))
recorded_label_ref = 1;
-
-
- reg_equiv_replacement[regno] = XEXP (note, 0);
+
+ reg_equiv[regno].replacement = XEXP (note, 0);
+ reg_equiv[regno].src = src;
+ reg_equiv[regno].loop_depth = loop_depth;
/* Don't mess with things live during setjmp. */
- if (REG_LIVE_LENGTH (regno) >= 0)
+ if (REG_LIVE_LENGTH (regno) >= 0 && optimize)
{
/* Note that the statement below does not affect the priority
in local-alloc! */
/* If the register is referenced exactly twice, meaning it is
set once and used once, indicate that the reference may be
- replaced by the equivalence we computed above. If the
- register is only used in one basic block, this can't succeed
- or combine would have done it.
+ replaced by the equivalence we computed above. Do this
+ even if the register is only used in one block so that
+ dependencies can be handled where the last register is
+ used in a different block (i.e. HIGH / LO_SUM sequences)
+ and to reduce the number of registers alive across calls.
It would be nice to use "loop_depth * 2" in the compare
below. Unfortunately, LOOP_DEPTH need not be constant within
memory and then used exactly once, not in a loop. */
if (REG_N_REFS (regno) == 2
- && REG_BASIC_BLOCK (regno) < 0
- && rtx_equal_p (XEXP (note, 0), SET_SRC (set)))
- reg_equiv_replace[regno] = 1;
+ && (rtx_equal_p (XEXP (note, 0), src)
+ || ! equiv_init_varies_p (src))
+ && GET_CODE (insn) == INSN
+ && equiv_init_movable_p (PATTERN (insn), regno))
+ reg_equiv[regno].replace = 1;
}
}
}
registers only used that once. If so, see if we can replace the
reference with the equivalent from. If we can, delete the
initializing reference and this register will go away. If we
- can't replace the reference, and the instruction is not in a
- loop, then move the register initialization just before the use,
- so that they are in the same basic block. */
- block = -1;
- depth = 0;
- for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ can't replace the reference, and the initialzing reference is
+ within the same loop (or in an inner loop), then move the register
+ initialization just before the use, so that they are in the same
+ basic block.
+
+ Skip this optimization if loop_depth isn't initially zero since
+ that indicates a mismatch between loop begin and loop end notes
+ (i.e. gcc.dg/noncompile/920721-2.c). */
+ block = n_basic_blocks - 1;
+ for (insn = (loop_depth == 0) ? get_last_insn () : NULL_RTX;
+ insn; insn = PREV_INSN (insn))
{
rtx link;
- /* Keep track of which basic block we are in. */
- if (block + 1 < n_basic_blocks
- && BLOCK_HEAD (block + 1) == insn)
- ++block;
-
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+ if (! INSN_P (insn))
{
if (GET_CODE (insn) == NOTE)
{
- if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
- ++depth;
- else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
+ if (NOTE_INSN_BASIC_BLOCK_P (insn))
+ block = NOTE_BASIC_BLOCK (insn)->index - 1;
+ else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
{
- --depth;
- if (depth < 0)
+ if (! loop_depth)
abort ();
+ --loop_depth;
}
+ else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
+ ++loop_depth;
}
continue;
int regno = REGNO (XEXP (link, 0));
rtx equiv_insn;
- if (! reg_equiv_replace[regno])
+ if (! reg_equiv[regno].replace
+ || reg_equiv[regno].loop_depth < loop_depth)
continue;
- /* reg_equiv_replace[REGNO] gets set only when
+ /* reg_equiv[REGNO].replace gets set only when
REG_N_REFS[REGNO] is 2, i.e. the register is set
once and used once. (If it were only set, but not used,
- flow would have deleted the setting insns.) Hence
- there can only be one insn in reg_equiv_init_insns. */
- equiv_insn = XEXP (reg_equiv_init_insns[regno], 0);
+ flow would have deleted the setting insns.) Hence
+ there can only be one insn in reg_equiv[REGNO].init_insns. */
+ if (reg_equiv[regno].init_insns == NULL_RTX
+ || XEXP (reg_equiv[regno].init_insns, 1) != NULL_RTX)
+ abort ();
+ equiv_insn = XEXP (reg_equiv[regno].init_insns, 0);
+
+ /* We may not move instructions that can throw, since
+ that changes basic block boundaries and we are not
+ prepared to adjust the CFG to match. */
+ if (can_throw_internal (equiv_insn))
+ continue;
- if (validate_replace_rtx (regno_reg_rtx[regno],
- reg_equiv_replacement[regno], insn))
+ if (asm_noperands (PATTERN (equiv_insn)) < 0
+ && validate_replace_rtx (regno_reg_rtx[regno],
+ reg_equiv[regno].src, insn))
{
+ rtx equiv_link;
+ rtx last_link;
+ rtx note;
+
+ /* Find the last note. */
+ for (last_link = link; XEXP (last_link, 1);
+ last_link = XEXP (last_link, 1))
+ ;
+
+ /* Append the REG_DEAD notes from equiv_insn. */
+ equiv_link = REG_NOTES (equiv_insn);
+ while (equiv_link)
+ {
+ note = equiv_link;
+ equiv_link = XEXP (equiv_link, 1);
+ if (REG_NOTE_KIND (note) == REG_DEAD)
+ {
+ remove_note (equiv_insn, note);
+ XEXP (last_link, 1) = note;
+ XEXP (note, 1) = NULL_RTX;
+ last_link = note;
+ }
+ }
+
remove_death (regno, insn);
REG_N_REFS (regno) = 0;
+ REG_FREQ (regno) = 0;
PUT_CODE (equiv_insn, NOTE);
NOTE_LINE_NUMBER (equiv_insn) = NOTE_INSN_DELETED;
NOTE_SOURCE_FILE (equiv_insn) = 0;
+
+ reg_equiv[regno].init_insns
+ = XEXP (reg_equiv[regno].init_insns, 1);
}
- /* If we aren't in a loop, and there are no calls in
- INSN or in the initialization of the register, then
- move the initialization of the register to just
- before INSN. Update the flow information. */
- else if (depth == 0
- && GET_CODE (equiv_insn) == INSN
- && GET_CODE (insn) == INSN
- && REG_BASIC_BLOCK (regno) < 0)
+ /* Move the initialization of the register to just before
+ INSN. Update the flow information. */
+ else if (PREV_INSN (insn) != equiv_insn)
{
- int l;
+ rtx new_insn;
- emit_insn_before (copy_rtx (PATTERN (equiv_insn)), insn);
- REG_NOTES (PREV_INSN (insn)) = REG_NOTES (equiv_insn);
+ new_insn = emit_insn_before (PATTERN (equiv_insn), insn);
+ REG_NOTES (new_insn) = REG_NOTES (equiv_insn);
REG_NOTES (equiv_insn) = 0;
+ /* Make sure this insn is recognized before reload begins,
+ otherwise eliminate_regs_in_insn will abort. */
+ INSN_CODE (new_insn) = INSN_CODE (equiv_insn);
+
PUT_CODE (equiv_insn, NOTE);
NOTE_LINE_NUMBER (equiv_insn) = NOTE_INSN_DELETED;
NOTE_SOURCE_FILE (equiv_insn) = 0;
- if (block < 0)
- REG_BASIC_BLOCK (regno) = 0;
- else
- REG_BASIC_BLOCK (regno) = block;
+ XEXP (reg_equiv[regno].init_insns, 0) = new_insn;
+
+ REG_BASIC_BLOCK (regno) = block >= 0 ? block : 0;
REG_N_CALLS_CROSSED (regno) = 0;
REG_LIVE_LENGTH (regno) = 2;
if (block >= 0 && insn == BLOCK_HEAD (block))
BLOCK_HEAD (block) = PREV_INSN (insn);
- for (l = 0; l < n_basic_blocks; l++)
- CLEAR_REGNO_REG_SET (BASIC_BLOCK (l)->global_live_at_start,
- regno);
+ /* Remember to clear REGNO from all basic block's live
+ info. */
+ SET_REGNO_REG_SET (&cleared_regs, regno);
+ clear_regnos++;
}
}
}
}
+ /* Clear all dead REGNOs from all basic block's live info. */
+ if (clear_regnos)
+ {
+ int j, l;
+ if (clear_regnos > 8)
+ {
+ for (l = 0; l < n_basic_blocks; l++)
+ {
+ AND_COMPL_REG_SET (BASIC_BLOCK (l)->global_live_at_start,
+ &cleared_regs);
+ AND_COMPL_REG_SET (BASIC_BLOCK (l)->global_live_at_end,
+ &cleared_regs);
+ }
+ }
+ else
+ EXECUTE_IF_SET_IN_REG_SET (&cleared_regs, 0, j,
+ {
+ for (l = 0; l < n_basic_blocks; l++)
+ {
+ CLEAR_REGNO_REG_SET (BASIC_BLOCK (l)->global_live_at_start, j);
+ CLEAR_REGNO_REG_SET (BASIC_BLOCK (l)->global_live_at_end, j);
+ }
+ });
+ }
+
/* Clean up. */
end_alias_analysis ();
- free (reg_equiv_replace);
- free (reg_equiv_init_insns);
- free (reg_equiv_replacement);
+ CLEAR_REG_SET (&cleared_regs);
+ free (reg_equiv);
}
/* Mark REG as having no known equivalence.
if (GET_CODE (reg) != REG)
return;
regno = REGNO (reg);
- list = reg_equiv_init_insns[regno];
+ list = reg_equiv[regno].init_insns;
if (list == const0_rtx)
return;
for (; list; list = XEXP (list, 1))
rtx insn = XEXP (list, 0);
remove_note (insn, find_reg_note (insn, REG_EQUIV, NULL_RTX));
}
- reg_equiv_init_insns[regno] = const0_rtx;
- reg_equiv_replacement[regno] = NULL_RTX;
+ reg_equiv[regno].init_insns = const0_rtx;
+ reg_equiv[regno].replacement = NULL_RTX;
}
\f
/* Allocate hard regs to the pseudo regs used only within block number B.
if (GET_CODE (insn) != NOTE)
insn_number++;
- if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
+ if (INSN_P (insn))
{
register rtx link, set;
register int win = 0;
continue;
/* Likewise if each alternative has some operand that
- must match operand zero. In that case, skip any
+ must match operand zero. In that case, skip any
operand that doesn't list operand 0 since we know that
the operand always conflicts with operand 0. We
ignore commutatity in this case to keep things simple. */
priority to an equivalence found from that insn. */
int may_save_copy
= (r1 == recog_data.operand[i] && must_match_0 >= 0);
-
+
if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG)
win = combine_regs (r1, r0, may_save_copy,
insn_number, insn, 0);
&& GET_CODE (XEXP (link, 0)) == REG)
wipe_dead_reg (XEXP (link, 0), 1);
- /* If this is an insn that has a REG_RETVAL note pointing at a
+ /* If this is an insn that has a REG_RETVAL note pointing at a
CLOBBER insn, we have reached the end of a REG_NO_CONFLICT
block, so clear any register number that combined within it. */
if ((note = find_reg_note (insn, REG_RETVAL, NULL_RTX)) != 0
/* Now every register that is local to this basic block
should have been given a quantity, or else -1 meaning ignore it.
- Every quantity should have a known birth and death.
+ Every quantity should have a known birth and death.
Order the qtys so we assign them registers in order of the
number of suggested registers they need so we allocate those with
qty[q].phys_reg = -1;
}
- /* Order the qtys so we assign them registers in order of
- decreasing length of life. Normally call qsort, but if we
+ /* Order the qtys so we assign them registers in order of
+ decreasing length of life. Normally call qsort, but if we
have only a very small number of quantities, sort them ourselves. */
for (i = 0; i < next_qty; i++)
The purpose behind extending the lifetime of this qty is to
discourage the register allocator from creating false
dependencies.
-
+
The adjustment value is choosen to indicate that this qty
conflicts with all the qtys in the instructions immediately
before and after the lifetime of this qty.
&& !optimize_size
&& !SMALL_REGISTER_CLASSES)
{
-
- qty[q].phys_reg = find_free_reg (qty[q].min_class,
+ qty[q].phys_reg = find_free_reg (qty[q].min_class,
qty[q].mode, q, 0, 0,
fake_birth, fake_death);
if (qty[q].phys_reg >= 0)
continue;
}
#endif
- qty[q].phys_reg = find_free_reg (qty[q].min_class,
+ qty[q].phys_reg = find_free_reg (qty[q].min_class,
qty[q].mode, q, 0, 0,
qty[q].birth, qty[q].death);
if (qty[q].phys_reg >= 0)
/* Note that the quotient will never be bigger than
the value of floor_log2 times the maximum number of
- times a register can occur in one insn (surely less than 100).
- Multiplying this by 10000 can't overflow.
+ times a register can occur in one insn (surely less than 100)
+ weighted by frequency (max REG_FREQ_MAX).
+ Multiplying this by 10000/REG_FREQ_MAX can't overflow.
QTY_CMP_PRI is also used by qty_sugg_compare. */
#define QTY_CMP_PRI(q) \
- ((int) (((double) (floor_log2 (qty[q].n_refs) * qty[q].n_refs * qty[q].size) \
- / (qty[q].death - qty[q].birth)) * 10000))
+ ((int) (((double) (floor_log2 (qty[q].n_refs) * qty[q].freq * qty[q].size) \
+ / (qty[q].death - qty[q].birth)) * (10000 / REG_FREQ_MAX)))
static int
qty_compare (q1, q2)
const PTR q1p;
const PTR q2p;
{
- register int q1 = *(const int *)q1p, q2 = *(const int *)q2p;
+ register int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
register int tem = QTY_CMP_PRI (q2) - QTY_CMP_PRI (q1);
if (tem != 0)
if (tem != 0)
return tem;
-
+
return QTY_CMP_PRI (q2) - QTY_CMP_PRI (q1);
}
const PTR q1p;
const PTR q2p;
{
- register int q1 = *(const int *)q1p, q2 = *(const int *)q2p;
+ register int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
register int tem = QTY_CMP_SUGG (q1) - QTY_CMP_SUGG (q2);
if (tem != 0)
MAY_SAVE_COPYCOPY is non-zero if this insn is simply copying USEDREG to
SETREG or if the input and output must share a register.
In that case, we record a hard reg suggestion in QTY_PHYS_COPY_SUGG.
-
+
There are elaborate checks for the validity of combining. */
-
static int
combine_regs (usedreg, setreg, may_save_copy, insn_number, insn, already_dead)
rtx usedreg, setreg;
{
if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (usedreg))) > UNITS_PER_WORD)
may_save_copy = 0;
- offset += SUBREG_WORD (usedreg);
+ if (REGNO (SUBREG_REG (usedreg)) < FIRST_PSEUDO_REGISTER)
+ offset += subreg_regno_offset (REGNO (SUBREG_REG (usedreg)),
+ GET_MODE (SUBREG_REG (usedreg)),
+ SUBREG_BYTE (usedreg),
+ GET_MODE (usedreg));
+ else
+ offset += (SUBREG_BYTE (usedreg)
+ / REGMODE_NATURAL_SIZE (GET_MODE (usedreg)));
usedreg = SUBREG_REG (usedreg);
}
if (GET_CODE (usedreg) != REG)
return 0;
ureg = REGNO (usedreg);
- usize = REG_SIZE (usedreg);
+ if (ureg < FIRST_PSEUDO_REGISTER)
+ usize = HARD_REGNO_NREGS (ureg, GET_MODE (usedreg));
+ else
+ usize = ((GET_MODE_SIZE (GET_MODE (usedreg))
+ + (REGMODE_NATURAL_SIZE (GET_MODE (usedreg)) - 1))
+ / REGMODE_NATURAL_SIZE (GET_MODE (usedreg)));
while (GET_CODE (setreg) == SUBREG)
{
if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (setreg))) > UNITS_PER_WORD)
may_save_copy = 0;
- offset -= SUBREG_WORD (setreg);
+ if (REGNO (SUBREG_REG (setreg)) < FIRST_PSEUDO_REGISTER)
+ offset -= subreg_regno_offset (REGNO (SUBREG_REG (setreg)),
+ GET_MODE (SUBREG_REG (setreg)),
+ SUBREG_BYTE (setreg),
+ GET_MODE (setreg));
+ else
+ offset -= (SUBREG_BYTE (setreg)
+ / REGMODE_NATURAL_SIZE (GET_MODE (setreg)));
setreg = SUBREG_REG (setreg);
}
if (GET_CODE (setreg) != REG)
return 0;
sreg = REGNO (setreg);
- ssize = REG_SIZE (setreg);
+ if (sreg < FIRST_PSEUDO_REGISTER)
+ ssize = HARD_REGNO_NREGS (sreg, GET_MODE (setreg));
+ else
+ ssize = ((GET_MODE_SIZE (GET_MODE (setreg))
+ + (REGMODE_NATURAL_SIZE (GET_MODE (setreg)) - 1))
+ / REGMODE_NATURAL_SIZE (GET_MODE (setreg)));
/* If UREG is a pseudo-register that hasn't already been assigned a
quantity number, it means that it is not local to this block or dies
|| ureg == sreg
/* Don't try to connect two different hardware registers. */
|| (ureg < FIRST_PSEUDO_REGISTER && sreg < FIRST_PSEUDO_REGISTER)
- /* Don't use a hard reg that might be spilled. */
- || (ureg < FIRST_PSEUDO_REGISTER
- && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (ureg)))
- || (sreg < FIRST_PSEUDO_REGISTER
- && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (sreg)))
/* Don't connect two different machine modes if they have different
implications as to which registers may be used. */
|| !MODES_TIEABLE_P (GET_MODE (usedreg), GET_MODE (setreg)))
/* Update info about quantity SQTY. */
qty[sqty].n_calls_crossed += REG_N_CALLS_CROSSED (sreg);
qty[sqty].n_refs += REG_N_REFS (sreg);
+ qty[sqty].freq += REG_FREQ (sreg);
if (usize < ssize)
{
register int i;
if (reg_class_subset_p (rclass, qty[qtyno].alternate_class))
qty[qtyno].alternate_class = rclass;
- if (REG_CHANGES_SIZE (reg))
- qty[qtyno].changes_size = 1;
+ if (REG_CHANGES_MODE (reg))
+ qty[qtyno].changes_mode = 1;
}
\f
/* Handle something which alters the value of an rtx REG.
int birth;
{
register int regno;
-
+
if (GET_CODE (reg) == SUBREG)
- regno = REGNO (SUBREG_REG (reg)) + SUBREG_WORD (reg);
+ {
+ regno = REGNO (SUBREG_REG (reg));
+ if (regno < FIRST_PSEUDO_REGISTER)
+ regno = subreg_hard_regno (reg, 1);
+ }
else
regno = REGNO (reg);
/* If this insn has multiple results,
and the dead reg is used in one of the results,
extend its life to after this insn,
- so it won't get allocated together with any other result of this insn.
+ so it won't get allocated together with any other result of this insn.
It is unsafe to use !single_set here since it will ignore an unused
output. Just because an output is unused does not mean the compiler
not to happen). */
if (output_p)
post_mark_life (regno, GET_MODE (reg), 1,
- 2 * this_insn_number, 2 * this_insn_number+ 1);
+ 2 * this_insn_number, 2 * this_insn_number + 1);
}
else if (reg_qty[regno] >= 0)
(but actually we test only the first of the block for holding MODE)
and still free between insn BORN_INDEX and insn DEAD_INDEX,
and return the number of the first of them.
- Return -1 if such a block cannot be found.
+ Return -1 if such a block cannot be found.
If QTYNO crosses calls, insist on a register preserved by calls,
unless ACCEPT_CALL_CLOBBERED is nonzero.
{
register int i, ins;
#ifdef HARD_REG_SET
- register /* Declare it register if it's a scalar. */
+ /* Declare it register if it's a scalar. */
+ register
#endif
HARD_REG_SET used, first_used;
#ifdef ELIMINABLE_REGS
This is true of any register that can be eliminated. */
#ifdef ELIMINABLE_REGS
- for (i = 0; i < (int)(sizeof eliminables / sizeof eliminables[0]); i++)
+ for (i = 0; i < (int) ARRAY_SIZE (eliminables); i++)
SET_HARD_REG_BIT (used, eliminables[i].from);
#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
/* If FRAME_POINTER_REGNUM is not a real register, then protect the one
SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM);
#endif
-#ifdef CLASS_CANNOT_CHANGE_SIZE
- if (qty[qtyno].changes_size)
+#ifdef CLASS_CANNOT_CHANGE_MODE
+ if (qty[qtyno].changes_mode)
IOR_HARD_REG_SET (used,
- reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
+ reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE]);
#endif
/* Normally, the registers that can be used for the first register in
return regno;
}
#ifndef REG_ALLOC_ORDER
- i += j; /* Skip starting points we know will lose */
+ /* Skip starting points we know will lose. */
+ i += j;
#endif
}
}
fail:
-
/* If we are just trying suggested register, we have just tried copy-
suggested registers, and there are arithmetic-suggested registers,
try them. */
-
+
/* If it would be profitable to allocate a call-clobbered register
and save and restore it around calls, do that. */
if (just_try_suggested && qty_phys_num_copy_sugg[qtyno] != 0
&& flag_caller_saves
&& ! just_try_suggested
&& qty[qtyno].n_calls_crossed != 0
- && CALLER_SAVE_PROFITABLE (qty[qtyno].n_refs, qty[qtyno].n_calls_crossed))
+ && CALLER_SAVE_PROFITABLE (qty[qtyno].n_refs,
+ qty[qtyno].n_calls_crossed))
{
i = find_free_reg (class, mode, qtyno, 1, 0, born_index, dead_index);
if (i >= 0)
{
register int j = HARD_REGNO_NREGS (regno, mode);
#ifdef HARD_REG_SET
- register /* Declare it register if it's a scalar. */
+ /* Declare it register if it's a scalar. */
+ register
#endif
HARD_REG_SET this_reg;
last = XEXP (note, 0);
for (p = NEXT_INSN (insn); p && p != last; p = NEXT_INSN (p))
- if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
+ if (INSN_P (p))
{
if (find_reg_note (p, REG_DEAD, r1))
ok = 1;
if (! find_reg_note (p, REG_NO_CONFLICT, r1))
return 0;
}
-
+
return ok;
}
\f
static int
requires_inout (p)
- const char *p;
+ const char *p;
{
char c;
int found_zero = 0;
case 's': case 'i': case 'n':
case 'I': case 'J': case 'K': case 'L':
case 'M': case 'N': case 'O': case 'P':
-#ifdef EXTRA_CONSTRAINT
- case 'Q': case 'R': case 'S': case 'T': case 'U':
-#endif
case 'X':
/* These don't say anything we care about. */
break;
found_zero = 1;
break;
+ default:
+ if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
+ break;
+ /* FALLTHRU */
case 'p':
case 'g': case 'r':
- default:
reg_allowed = 1;
break;
}
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