2012-01-05 Paul Thomas <pault@gcc.gnu.org>

[pf3gnuchains/gcc-fork.git] / gcc / ira-int.h

diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index 9ea8041..6199894 100644 (file)
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -262,9 +262,6 @@ struct ira_object
      ira_object structures.  Otherwise, we use a bit vector indexed
      by conflict ID numbers.  */
   unsigned int conflict_vec_p : 1;
-  /* Different additional data.  It is used to decrease size of
-     allocno data footprint.  */
-  void *add_data;
 };
 
 /* A structure representing an allocno (allocation entity).  Allocno
@@ -499,7 +496,6 @@ allocno_emit_reg (ira_allocno_t a)
 #define OBJECT_MAX(O) ((O)->max)
 #define OBJECT_CONFLICT_ID(O) ((O)->id)
 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
-#define OBJECT_ADD_DATA(O) ((O)->add_data)
 
 /* Map regno -> allocnos with given regno (see comments for
    allocno member `next_regno_allocno').  */
@@ -805,7 +801,7 @@ struct target_ira_int {
   int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
 
   /* Array of the number of hard registers of given class which are
-     available for allocation.  The order is defined by the the hard
+     available for allocation.  The order is defined by the hard
      register numbers.  */
   short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
 
@@ -989,8 +985,8 @@ extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t);
 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
                                        bool, rtx, ira_loop_tree_node_t);
 
-extern int *ira_allocate_cost_vector (enum reg_class);
-extern void ira_free_cost_vector (int *, enum reg_class);
+extern int *ira_allocate_cost_vector (reg_class_t);
+extern void ira_free_cost_vector (int *, reg_class_t);
 
 extern void ira_flattening (int, int);
 extern bool ira_build (bool);
@@ -1323,17 +1319,17 @@ hard_reg_set_size (HARD_REG_SET set)
 }
 
 /* The function returns TRUE if hard registers starting with
-   HARD_REGNO and containing value of MODE are not in set
+   HARD_REGNO and containing value of MODE are fully in set
    HARD_REGSET.  */
 static inline bool
-ira_hard_reg_not_in_set_p (int hard_regno, enum machine_mode mode,
-                          HARD_REG_SET hard_regset)
+ira_hard_reg_in_set_p (int hard_regno, enum machine_mode mode,
+                      HARD_REG_SET hard_regset)
 {
   int i;
 
   ira_assert (hard_regno >= 0);
   for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
-    if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
+    if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
       return false;
   return true;
 }
@@ -1347,7 +1343,7 @@ ira_hard_reg_not_in_set_p (int hard_regno, enum machine_mode mode,
 /* Allocate cost vector *VEC for hard registers of ACLASS and
    initialize the elements by VAL if it is necessary */
 static inline void
-ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val)
+ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
 {
   int i, *reg_costs;
   int len;
@@ -1355,7 +1351,7 @@ ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val)
   if (*vec != NULL)
     return;
   *vec = reg_costs = ira_allocate_cost_vector (aclass);
-  len = ira_class_hard_regs_num[aclass];
+  len = ira_class_hard_regs_num[(int) aclass];
   for (i = 0; i < len; i++)
     reg_costs[i] = val;
 }