-Wcast-align -Wcast-qual -Wchar-subscript -Wcomment
-Wconversion -Werror -Wformat
-Wid-clash-@var{len} -Wimplicit -Wimplicit-int
--Wimplicit-function-declarations -Wimport -Winline
+-Wimplicit-function-declaration -Wimport
+-Werror-implicit-function-declaration -Winline
-Wlarger-than-@var{len} -Wmain -Wmissing-declarations
-Wmissing-prototypes -Wnested-externs -Wno-import
-Wold-style-cast -Woverloaded-virtual -Wparentheses
-fcaller-saves -fcse-follow-jumps -fcse-skip-blocks
-fdelayed-branch -fexpensive-optimizations
-ffast-math -ffloat-store -fforce-addr -fforce-mem
--ffunction-sections -finline-functions
+-ffunction-sections -fgcse -finline-functions
-fkeep-inline-functions -fno-default-inline
-fno-defer-pop -fno-function-cse
-fno-inline -fno-peephole -fomit-frame-pointer -fregmove
-mpowerpc-gfxopt -mno-powerpc-gfxopt
-mnew-mnemonics -mno-new-mnemonics
-mfull-toc -mminimal-toc -mno-fop-in-toc -mno-sum-in-toc
--mxl-call -mno-xl-call -mthreads -mpe
+-maix64 -maix32 -mxl-call -mno-xl-call -mthreads -mpe
-msoft-float -mhard-float -mmultiple -mno-multiple
-mstring -mno-string -mupdate -mno-update
-mfused-madd -mno-fused-madd -mbit-align -mno-bit-align
-mabicalls -mcpu=@var{cpu type} -membedded-data
-membedded-pic -mfp32 -mfp64 -mgas -mgp32 -mgp64
-mgpopt -mhalf-pic -mhard-float -mint64 -mips1
--mips2 -mips3 -mlong64 -mlong-calls -mmemcpy
+-mips2 -mips3 -mips4 -mlong64 -mlong-calls -mmemcpy
-mmips-as -mmips-tfile -mno-abicalls
-mno-embedded-data -mno-embedded-pic
-mno-gpopt -mno-long-calls
-mrnames -msoft-float
-m4650 -msingle-float -mmad
-mstats -EL -EB -G @var{num} -nocpp
+-mabi=32 -mabi=n32 -mabi=64 -mabi=eabi
@emph{i386 Options}
-mcpu=@var{cpu type}
-mrelax -mh -ms -mint32 -malign-300
@emph{SH Options}
--m1 -m2 -m3 -m3e -mb -ml -mrelax
+-m1 -m2 -m3 -m3e -mb -ml -mdalign -mrelax
@emph{System V Options}
-Qy -Qn -YP,@var{paths} -Ym,@var{dir}
@item -Wimplicit-int
Warn when a declaration does not specify a type.
-@item -Wimplicit-function-declarations
-Warn whenever a function is used before being declared.
+@item -Wimplicit-function-declaration
+@itemx -Werror-implicit-function-declaration
+Give a warning (or error) whenever a function is used before being
+declared.
@item -Wimplicit
Same as @samp{-Wimplicit-int} and @samp{-Wimplicit-function-}@*
@item d
Dump after delayed branch scheduling, to @file{@var{file}.dbr}.
@item D
+Dump all macro definitions, at the end of preprocessing, in addition to
+normal output.
+@item y
+Dump debugging information during parsing, to standard error.
+@item r
+Dump after RTL generation, to @file{@var{file}.rtl}.
+@item x
+Just generate RTL for a function instead of compiling it. Usually used
+with @samp{r}.
+@item j
+Dump after first jump optimization, to @file{@var{file}.jump}.
+@item s
+Dump after CSE (including the jump optimization that sometimes
+follows CSE), to @file{@var{file}.cse}.
+@item F
Dump after purging ADDRESSOF, to @file{@var{file}.addressof}.
@item f
Dump after flow analysis, to @file{@var{file}.flow}.
@item g
Dump after global register allocation, to @file{@var{file}.greg}.
+@item G
+Dump after GCSE, to @file{@var{file}.gcse}.
@item j
Dump after first jump optimization, to @file{@var{file}.jump}.
@item J
@item -frerun-loop-opt
Run the loop optimizer twice.
+@item -fgcse
+Perform a global common subexpression elimination pass.
+This pass also performs global constant and copy propagation.
+
@item -fexpensive-optimizations
Perform a number of minor optimizations that are relatively expensive.
@itemx -mno-powerpc-gpopt
@itemx -mpowerpc-gfxopt
@itemx -mno-powerpc-gfxopt
+@itemx -mpowerpc64
+@itemx -mno-powerpc64
@kindex -mpower
@kindex -mpower2
@kindex -mpowerpc
@kindex -mpowerpc-gpopt
@kindex -mpowerpc-gfxopt
+@kindex -mpowerpc64
GNU CC supports two related instruction set architectures for the
RS/6000 and PowerPC. The @dfn{POWER} instruction set are those
instructions supported by the @samp{rios} chip set used in the original
use the optional PowerPC architecture instructions in the Graphics
group, including floating-point select.
+The @samp{-mpowerpc64} option allows GNU CC to generate the additional
+64-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64-bit, doubleword quantities. GNU CC defaults to
+@samp{-mno-powerpc64}.
+
If you specify both @samp{-mno-power} and @samp{-mno-powerpc}, GNU CC
will use only the instructions in the common subset of both
architectures plus some special AIX common-mode calls, and will not use
GNU CC uses that mnemonic irrespective of which of these options is
specified.
-PowerPC assemblers support both the old and new mnemonics, as will later
-POWER assemblers. Current POWER assemblers only support the old
-mnemonics. Specify @samp{-mnew-mnemonics} if you have an assembler that
-supports them, otherwise specify @samp{-mold-mnemonics}.
-
-The default value of these options depends on how GNU CC was configured.
-Specifying @samp{-mcpu=@var{cpu_type}} sometimes overrides the value of
-these option. Unless you are building a cross-compiler, you should
-normally not specify either @samp{-mnew-mnemonics} or
+GNU CC defaults to the mnemonics appropriate for the architecture in
+use. Specifying @samp{-mcpu=@var{cpu_type}} sometimes overrides the
+value of these option. Unless you are building a cross-compiler, you
+should normally not specify either @samp{-mnew-mnemonics} or
@samp{-mold-mnemonics}, but should instead accept the default.
@item -mcpu=@var{cpu_type}
+@kindex -mcpu
Set architecture type, register usage, choice of mnemonics, and
instruction scheduling parameters for machine type @var{cpu_type}.
Supported values for @var{cpu_type} are @samp{rs6000}, @samp{rios1},
@itemx -mno-fp-in-toc
@itemx -mno-sum-in-toc
@itemx -mminimal-toc
+@kindex -mminimal-toc
Modify generation of the TOC (Table Of Contents), which is created for
every executable file. The @samp{-mfull-toc} option is selected by
default. In that case, GNU CC will allocate at least one TOC entry for
uses extremely little TOC space. You may wish to use this option
only on files that contain less frequently executed code. @refill
+@item -maix64
+@itemx -maix32
+@kindex -maix64
+@kindex -maix32
+Enable AIX 64-bit ABI and calling convention: 64-bit pointers, 64-bit
+@code{long} type, and the infrastructure needed to support them.
+Specifying @samp{-maix64} implies @samp{-mpowerpc64} and
+@samp{-mpowerpc}, while @samp{-maix32} disables the 64-bit ABI and
+implies @samp{-mno-powerpc64}. GNU CC defaults to @samp{-maix32}.
+
@item -mxl-call
@itemx -mno-xl-call
+@kindex -mxl-call
On AIX, pass floating-point arguments to prototyped functions beyond the
register save area (RSA) on the stack in addition to argument FPRs. The
AIX calling convention was extended but not initially documented to
handle an obscure K&R C case of calling a function that takes the
address of its arguments with fewer arguments than declared. AIX XL
-compilers assume that floating point arguments which do not fit in the
-RSA are on the stack when they compile a subroutine without
+compilers access floating point arguments which do not fit in the
+RSA from the stack when a subroutine is compiled without
optimization. Because always storing floating-point arguments on the
stack is inefficient and rarely needed, this option is not enabled by
default and only is necessary when calling subroutines compiled by AIX
XL compilers without optimization.
@item -mthreads
+@kindex -mthreads
Support @dfn{AIX Threads}. Link an application written to use
@dfn{pthreads} with special libraries and startup code to enable the
application to run.
@item -mpe
+@kindex -mpe
Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE). Link an
application written to use message passing with special startup code to
enable the application to run. The system must have PE installed in the
@item -msoft-float
@itemx -mhard-float
+@kindex -msoft-float
Generate code that does not use (uses) the floating-point register set.
Software floating point emulation is provided if you use the
@samp{-msoft-float} option, and pass the option to GNU CC when linking.
@item -mstring
@itemx -mno-string
+@kindex -mstring
Generate code that uses (does not use) the load string instructions and the
store string word instructions to save multiple registers and do small block
moves. These instructions are generated by default on POWER systems, and not
@item -mupdate
@itemx -mno-update
+@kindex -mupdate
Generate code that uses (does not use) the load or store instructions
that update the base register to the address of the calculated memory
location. These instructions are generated by default. If you use
@item -mfused-madd
@itemx -mno-fused-madd
+@kindex -mfused-madd
Generate code that uses (does not use) the floating point multiply and
accumulate instructions. These instructions are generated by default if
hardware floating is used.
@item -mno-bit-align
@itemx -mbit-align
+@kindex -mbit-align
On System V.4 and embedded PowerPC systems do not (do) force structures
and unions that contain bit fields to be aligned to the base type of the
bit field.
@item -mno-strict-align
@itemx -mstrict-align
+@kindex -mstrict-align
On System V.4 and embedded PowerPC systems do not (do) assume that
unaligned memory references will be handled by the system.
@item -mrelocatable
@itemx -mno-relocatable
+@kindex -mrelocatable
On embedded PowerPC systems generate code that allows (does not allow)
the program to be relocated to a different address at runtime. If you
use @samp{-mrelocatable} on any module, all objects linked together must
@samp{r4000} is the default @var{cpu type} at this ISA level.
This option does not change the sizes of any of the C data types.
+@item -mips4
+Issue instructions from level 4 of the MIPS ISA. @samp{r8000} is the
+default @var{cpu type} at this ISA level.
+
@item -mfp32
Assume that 32 32-bit floating point registers are available. This is
the default.
Types long and pointer are 64 bits, and type int is 32 bits.
This works only if @samp{-mips3} is also specified.
+@itemx -mabi=32
+@itemx -mabi=n32
+@itemx -mabi=64
+@itemx -mabi=eabi
+Generate code for the indicated ABI.
+
@item -mmips-as
Generate code for the MIPS assembler, and invoke @file{mips-tfile} to
add normal debug information. This is the default for all
@item -membedded-pic
@itemx -mno-embedded-pic
-Generate PIC code suitable for some embedded systems. All calls are made
-using PC relative address, and all data is addressed using the $gp register.
-This requires GNU as and GNU ld which do most of the work.
+Generate PIC code suitable for some embedded systems. All calls are
+made using PC relative address, and all data is addressed using the $gp
+register. No more than 65536 bytes of global data may be used. This
+requires GNU as and GNU ld which do most of the work. This currently
+only works on targets which use ECOFF; it does not work with ELF.
@item -membedded-data
@itemx -mno-embedded-data
@item -malign-loops=@var{num}
Align loops to a 2 raised to a @var{num} byte boundary. If
-@samp{-malign-loops} is not specified, the default is 2.
+@samp{-malign-loops} is not specified, the default is 2 unless
+gas 2.8 (or later) is being used in which case the default is
+to align the loop on a 16 byte boundary if it is less than 8
+bytes away.
@item -malign-jumps=@var{num}
Align instructions that are only jumped to to a 2 raised to a @var{num}
byte boundary. If @samp{-malign-jumps} is not specified, the default is
-2 if optimizing for a 386, and 4 if optimizing for a 486.
+2 if optimizing for a 386, and 4 if optimizing for a 486 unless
+gas 2.8 (or later) is being used in which case the default is
+to align the instruction on a 16 byte boundary if it is less
+than 8 bytes away.
@item -malign-functions=@var{num}
Align the start of functions to a 2 raised to @var{num} byte boundary.
@item -ml
Compile code for the processor in little endian mode.
+@item -mdalign
+Align doubles at 64 bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with -mdalign.
+
@item -mrelax
Shorten some address references at link time, when possible; uses the
linker option @samp{-relax}.
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