/* Emit RTL for the GNU C-Compiler expander.
Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC.
#include "config.h"
#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
#include "toplev.h"
#include "rtl.h"
#include "tree.h"
#include "insn-config.h"
#include "recog.h"
#include "real.h"
-#include "obstack.h"
#include "bitmap.h"
#include "basic-block.h"
#include "ggc.h"
/* This is *not* reset after each function. It gives each CODE_LABEL
in the entire compilation a unique label number. */
-static int label_num = 1;
+static GTY(()) int label_num = 1;
/* Highest label number in current function.
Zero means use the value of label_num instead.
rtx global_rtl[GR_MAX];
+/* Commonly used RTL for hard registers. These objects are not necessarily
+ unique, so we allocate them separately from global_rtl. They are
+ initialized once per compilation unit, then copied into regno_reg_rtx
+ at the beginning of each function. */
+static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
+
/* We record floating-point CONST_DOUBLEs in each floating-point mode for
the values of 0, 1, and 2. For the integer entries and VOIDmode, we
record a copy of const[012]_rtx. */
static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
htab_t mem_attrs_htab;
+/* A hash table storing register attribute structures. */
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
+ htab_t reg_attrs_htab;
+
/* A hash table storing all CONST_DOUBLEs. */
static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
htab_t const_double_htab;
static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
rtx, unsigned int,
enum machine_mode));
+static hashval_t reg_attrs_htab_hash PARAMS ((const void *));
+static int reg_attrs_htab_eq PARAMS ((const void *,
+ const void *));
+static reg_attrs *get_reg_attrs PARAMS ((tree, int));
static tree component_ref_for_mem_expr PARAMS ((tree));
static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
return (hashval_t) INTVAL ((struct rtx_def *) x);
}
-/* Returns non-zero if the value represented by X (which is really a
+/* Returns nonzero if the value represented by X (which is really a
CONST_INT) is the same as that given by Y (which is really a
HOST_WIDE_INT *). */
const_double_htab_hash (x)
const void *x;
{
- hashval_t h = 0;
- size_t i;
rtx value = (rtx) x;
+ hashval_t h;
- for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
- h ^= XWINT (value, i);
+ if (GET_MODE (value) == VOIDmode)
+ h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
+ else
+ {
+ h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
+ /* MODE is used in the comparison, so it should be in the hash. */
+ h ^= GET_MODE (value);
+ }
return h;
}
-/* Returns non-zero if the value represented by X (really a ...)
+/* Returns nonzero if the value represented by X (really a ...)
is the same as that represented by Y (really a ...) */
static int
const_double_htab_eq (x, y)
const void *y;
{
rtx a = (rtx)x, b = (rtx)y;
- size_t i;
if (GET_MODE (a) != GET_MODE (b))
return 0;
- for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
- if (XWINT (a, i) != XWINT (b, i))
- return 0;
-
- return 1;
+ if (GET_MODE (a) == VOIDmode)
+ return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
+ && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
+ else
+ return real_identical (CONST_DOUBLE_REAL_VALUE (a),
+ CONST_DOUBLE_REAL_VALUE (b));
}
/* Returns a hash code for X (which is a really a mem_attrs *). */
^ (size_t) p->expr);
}
-/* Returns non-zero if the value represented by X (which is really a
+/* Returns nonzero if the value represented by X (which is really a
mem_attrs *) is the same as that given by Y (which is also really a
mem_attrs *). */
return *slot;
}
+/* Returns a hash code for X (which is a really a reg_attrs *). */
+
+static hashval_t
+reg_attrs_htab_hash (x)
+ const void *x;
+{
+ reg_attrs *p = (reg_attrs *) x;
+
+ return ((p->offset * 1000) ^ (long) p->decl);
+}
+
+/* Returns non-zero if the value represented by X (which is really a
+ reg_attrs *) is the same as that given by Y (which is also really a
+ reg_attrs *). */
+
+static int
+reg_attrs_htab_eq (x, y)
+ const void *x;
+ const void *y;
+{
+ reg_attrs *p = (reg_attrs *) x;
+ reg_attrs *q = (reg_attrs *) y;
+
+ return (p->decl == q->decl && p->offset == q->offset);
+}
+/* Allocate a new reg_attrs structure and insert it into the hash table if
+ one identical to it is not already in the table. We are doing this for
+ MEM of mode MODE. */
+
+static reg_attrs *
+get_reg_attrs (decl, offset)
+ tree decl;
+ int offset;
+{
+ reg_attrs attrs;
+ void **slot;
+
+ /* If everything is the default, we can just return zero. */
+ if (decl == 0 && offset == 0)
+ return 0;
+
+ attrs.decl = decl;
+ attrs.offset = offset;
+
+ slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
+ if (*slot == 0)
+ {
+ *slot = ggc_alloc (sizeof (reg_attrs));
+ memcpy (*slot, &attrs, sizeof (reg_attrs));
+ }
+
+ return *slot;
+}
+
/* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
don't attempt to share with the various global pieces of rtl (such as
frame_pointer_rtx). */
{
int width;
if (GET_MODE_CLASS (mode) != MODE_INT
- && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
+ && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
+ /* We can get a 0 for an error mark. */
+ && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
+ && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
abort ();
/* We clear out all bits that don't belong in MODE, unless they and
if (mode == Pmode && !reload_in_progress)
{
- if (regno == FRAME_POINTER_REGNUM)
+ if (regno == FRAME_POINTER_REGNUM
+ && (!reload_completed || frame_pointer_needed))
return frame_pointer_rtx;
#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
- if (regno == HARD_FRAME_POINTER_REGNUM)
+ if (regno == HARD_FRAME_POINTER_REGNUM
+ && (!reload_completed || frame_pointer_needed))
return hard_frame_pointer_rtx;
#endif
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
if (regno == RETURN_ADDRESS_POINTER_REGNUM)
return return_address_pointer_rtx;
#endif
- if (regno == PIC_OFFSET_TABLE_REGNUM
+ if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
&& fixed_regs[PIC_OFFSET_TABLE_REGNUM])
return pic_offset_table_rtx;
if (regno == STACK_POINTER_REGNUM)
return stack_pointer_rtx;
}
+#if 0
+ /* If the per-function register table has been set up, try to re-use
+ an existing entry in that table to avoid useless generation of RTL.
+
+ This code is disabled for now until we can fix the various backends
+ which depend on having non-shared hard registers in some cases. Long
+ term we want to re-enable this code as it can significantly cut down
+ on the amount of useless RTL that gets generated.
+
+ We'll also need to fix some code that runs after reload that wants to
+ set ORIGINAL_REGNO. */
+
+ if (cfun
+ && cfun->emit
+ && regno_reg_rtx
+ && regno < FIRST_PSEUDO_REGISTER
+ && reg_raw_mode[regno] == mode)
+ return regno_reg_rtx[regno];
+#endif
+
return gen_raw_REG (mode, regno);
}
which makes much better code. Besides, allocating DCmode
pseudos overstrains reload on some machines like the 386. */
rtx realpart, imagpart;
- int size = GET_MODE_UNIT_SIZE (mode);
- enum machine_mode partmode
- = mode_for_size (size * BITS_PER_UNIT,
- (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
- ? MODE_FLOAT : MODE_INT),
- 0);
+ enum machine_mode partmode = GET_MODE_INNER (mode);
realpart = gen_reg_rtx (partmode);
imagpart = gen_reg_rtx (partmode);
return gen_rtx_CONCAT (mode, realpart, imagpart);
}
- /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
+ /* Make sure regno_pointer_align, and regno_reg_rtx are large
enough to have an element for this pseudo reg number. */
if (reg_rtx_no == f->emit->regno_pointer_align_length)
int old_size = f->emit->regno_pointer_align_length;
char *new;
rtx *new1;
- tree *new2;
new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
memset (new + old_size, 0, old_size);
memset (new1 + old_size, 0, old_size * sizeof (rtx));
regno_reg_rtx = new1;
- new2 = (tree *) ggc_realloc (f->emit->regno_decl,
- old_size * 2 * sizeof (tree));
- memset (new2 + old_size, 0, old_size * sizeof (tree));
- f->emit->regno_decl = new2;
-
f->emit->regno_pointer_align_length = old_size * 2;
}
return val;
}
+/* Generate an register with same attributes as REG,
+ but offsetted by OFFSET. */
+
+rtx
+gen_rtx_REG_offset (reg, mode, regno, offset)
+ enum machine_mode mode;
+ unsigned int regno;
+ int offset;
+ rtx reg;
+{
+ rtx new = gen_rtx_REG (mode, regno);
+ REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
+ REG_OFFSET (reg) + offset);
+ return new;
+}
+
+/* Set the decl for MEM to DECL. */
+
+void
+set_reg_attrs_from_mem (reg, mem)
+ rtx reg;
+ rtx mem;
+{
+ if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
+ REG_ATTRS (reg)
+ = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
+}
+
+/* Set the register attributes for registers contained in PARM_RTX.
+ Use needed values from memory attributes of MEM. */
+
+void
+set_reg_attrs_for_parm (parm_rtx, mem)
+ rtx parm_rtx;
+ rtx mem;
+{
+ if (GET_CODE (parm_rtx) == REG)
+ set_reg_attrs_from_mem (parm_rtx, mem);
+ else if (GET_CODE (parm_rtx) == PARALLEL)
+ {
+ /* Check for a NULL entry in the first slot, used to indicate that the
+ parameter goes both on the stack and in registers. */
+ int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
+ for (; i < XVECLEN (parm_rtx, 0); i++)
+ {
+ rtx x = XVECEXP (parm_rtx, 0, i);
+ if (GET_CODE (XEXP (x, 0)) == REG)
+ REG_ATTRS (XEXP (x, 0))
+ = get_reg_attrs (MEM_EXPR (mem),
+ INTVAL (XEXP (x, 1)));
+ }
+ }
+}
+
+/* Assign the RTX X to declaration T. */
+void
+set_decl_rtl (t, x)
+ tree t;
+ rtx x;
+{
+ DECL_CHECK (t)->decl.rtl = x;
+
+ if (!x)
+ return;
+ /* For register, we maitain the reverse information too. */
+ if (GET_CODE (x) == REG)
+ REG_ATTRS (x) = get_reg_attrs (t, 0);
+ else if (GET_CODE (x) == SUBREG)
+ REG_ATTRS (SUBREG_REG (x))
+ = get_reg_attrs (t, -SUBREG_BYTE (x));
+ if (GET_CODE (x) == CONCAT)
+ {
+ if (REG_P (XEXP (x, 0)))
+ REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
+ if (REG_P (XEXP (x, 1)))
+ REG_ATTRS (XEXP (x, 1))
+ = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
+ }
+ if (GET_CODE (x) == PARALLEL)
+ {
+ int i;
+ for (i = 0; i < XVECLEN (x, 0); i++)
+ {
+ rtx y = XVECEXP (x, 0, i);
+ if (REG_P (XEXP (y, 0)))
+ REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
+ }
+ }
+}
+
/* Identify REG (which may be a CONCAT) as a user register. */
void
> ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
return 0;
+ /* Don't allow generating paradoxical FLOAT_MODE subregs. */
+ if (GET_MODE_CLASS (mode) == MODE_FLOAT
+ && GET_MODE (x) != VOIDmode && msize > xsize)
+ return 0;
+
offset = subreg_lowpart_offset (mode, GET_MODE (x));
if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
}
else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
- || GET_CODE (x) == CONCAT)
+ || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
+ else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+ || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+ && GET_MODE (x) == VOIDmode)
+ return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
/* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
from the low-order part of the constant. */
else if ((GET_MODE_CLASS (mode) == MODE_INT
&& GET_CODE (x) == CONST_INT)
{
REAL_VALUE_TYPE r;
- HOST_WIDE_INT i;
+ long i = INTVAL (x);
- i = INTVAL (x);
- r = REAL_VALUE_FROM_TARGET_SINGLE (i);
+ real_from_target (&r, &i, mode);
return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
}
else if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& GET_MODE (x) == VOIDmode)
{
REAL_VALUE_TYPE r;
- HOST_WIDE_INT i[2];
HOST_WIDE_INT low, high;
+ long i[2];
if (GET_CODE (x) == CONST_INT)
{
high = CONST_DOUBLE_HIGH (x);
}
-#if HOST_BITS_PER_WIDE_INT == 32
+ if (HOST_BITS_PER_WIDE_INT > 32)
+ high = low >> 31 >> 1;
+
/* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
target machine. */
if (WORDS_BIG_ENDIAN)
i[0] = high, i[1] = low;
else
i[0] = low, i[1] = high;
-#else
- i[0] = low;
-#endif
- r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
+ real_from_target (&r, i, mode);
return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
}
else if ((GET_MODE_CLASS (mode) == MODE_INT
{
/* The only additional case we can do is MEM. */
int offset = 0;
+
+ /* The following exposes the use of "x" to CSE. */
+ if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
+ && SCALAR_INT_MODE_P (GET_MODE (x))
+ && ! no_new_pseudos)
+ return gen_lowpart (mode, force_reg (GET_MODE (x), x));
+
if (WORDS_BIG_ENDIAN)
offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
- MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
return result;
}
-/* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
+/* Like gen_highpart, but accept mode of EXP operand in case EXP can
be VOIDmode constant. */
rtx
gen_highpart_mode (outermode, innermode, exp)
/* Given REF, a MEM, and T, either the type of X or the expression
corresponding to REF, set the memory attributes. OBJECTP is nonzero
- if we are making a new object of this type. */
+ if we are making a new object of this type. BITPOS is nonzero if
+ there is an offset outstanding on T that will be applied later. */
void
-set_mem_attributes (ref, t, objectp)
+set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
rtx ref;
tree t;
int objectp;
+ HOST_WIDE_INT bitpos;
{
HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
tree expr = MEM_EXPR (ref);
rtx offset = MEM_OFFSET (ref);
rtx size = MEM_SIZE (ref);
unsigned int align = MEM_ALIGN (ref);
+ HOST_WIDE_INT apply_bitpos = 0;
tree type;
/* It can happen that type_for_mode was given a mode for which there
{
expr = t;
offset = const0_rtx;
+ apply_bitpos = bitpos;
size = (DECL_SIZE_UNIT (t)
&& host_integerp (DECL_SIZE_UNIT (t), 1)
? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
{
expr = component_ref_for_mem_expr (t);
offset = const0_rtx;
+ apply_bitpos = bitpos;
/* ??? Any reason the field size would be different than
the size we got from the type? */
}
do
{
+ tree index = TREE_OPERAND (t, 1);
+ tree array = TREE_OPERAND (t, 0);
+ tree domain = TYPE_DOMAIN (TREE_TYPE (array));
+ tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
+ tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
+
+ /* We assume all arrays have sizes that are a multiple of a byte.
+ First subtract the lower bound, if any, in the type of the
+ index, then convert to sizetype and multiply by the size of the
+ array element. */
+ if (low_bound != 0 && ! integer_zerop (low_bound))
+ index = fold (build (MINUS_EXPR, TREE_TYPE (index),
+ index, low_bound));
+
+ /* If the index has a self-referential type, pass it to a
+ WITH_RECORD_EXPR; if the component size is, pass our
+ component to one. */
+ if (! TREE_CONSTANT (index)
+ && contains_placeholder_p (index))
+ index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
+ if (! TREE_CONSTANT (unit_size)
+ && contains_placeholder_p (unit_size))
+ unit_size = build (WITH_RECORD_EXPR, sizetype,
+ unit_size, array);
+
off_tree
= fold (build (PLUS_EXPR, sizetype,
fold (build (MULT_EXPR, sizetype,
- TREE_OPERAND (t, 1),
- TYPE_SIZE_UNIT (TREE_TYPE (t)))),
+ index,
+ unit_size)),
off_tree));
t = TREE_OPERAND (t, 0);
}
while (TREE_CODE (t) == ARRAY_REF);
- if (TREE_CODE (t) == COMPONENT_REF)
+ if (DECL_P (t))
+ {
+ expr = t;
+ offset = NULL;
+ if (host_integerp (off_tree, 1))
+ {
+ HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
+ HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
+ align = DECL_ALIGN (t);
+ if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
+ align = aoff;
+ offset = GEN_INT (ioff);
+ apply_bitpos = bitpos;
+ }
+ }
+ else if (TREE_CODE (t) == COMPONENT_REF)
{
expr = component_ref_for_mem_expr (t);
if (host_integerp (off_tree, 1))
- offset = GEN_INT (tree_low_cst (off_tree, 1));
+ {
+ offset = GEN_INT (tree_low_cst (off_tree, 1));
+ apply_bitpos = bitpos;
+ }
/* ??? Any reason the field size would be different than
the size we got from the type? */
}
+ else if (flag_argument_noalias > 1
+ && TREE_CODE (t) == INDIRECT_REF
+ && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
+ {
+ expr = t;
+ offset = NULL;
+ }
+ }
+
+ /* If this is a Fortran indirect argument reference, record the
+ parameter decl. */
+ else if (flag_argument_noalias > 1
+ && TREE_CODE (t) == INDIRECT_REF
+ && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
+ {
+ expr = t;
+ offset = NULL;
}
}
+ /* If we modified OFFSET based on T, then subtract the outstanding
+ bit position offset. Similarly, increase the size of the accessed
+ object to contain the negative offset. */
+ if (apply_bitpos)
+ {
+ offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
+ if (size)
+ size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
+ }
+
/* Now set the attributes we computed above. */
MEM_ATTRS (ref)
= get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
MEM_IN_STRUCT_P (ref) = 1;
}
+void
+set_mem_attributes (ref, t, objectp)
+ rtx ref;
+ tree t;
+ int objectp;
+{
+ set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
+}
+
+/* Set the decl for MEM to DECL. */
+
+void
+set_mem_attrs_from_reg (mem, reg)
+ rtx mem;
+ rtx reg;
+{
+ MEM_ATTRS (mem)
+ = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
+ GEN_INT (REG_OFFSET (reg)),
+ MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
+}
+
/* Set the alias set of MEM to SET. */
void
offset, MEM_SIZE (mem), MEM_ALIGN (mem),
GET_MODE (mem));
}
+
+/* Set the size of MEM to SIZE. */
+
+void
+set_mem_size (mem, size)
+ rtx mem, size;
+{
+ MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
+ MEM_OFFSET (mem), size, MEM_ALIGN (mem),
+ GET_MODE (mem));
+}
\f
/* Return a memory reference like MEMREF, but with its mode changed to MODE
and its address changed to ADDR. (VOIDmode means don't change the mode.
unsigned int memalign = MEM_ALIGN (memref);
/* ??? Prefer to create garbage instead of creating shared rtl.
- This may happen even if offset is non-zero -- consider
+ This may happen even if offset is nonzero -- consider
(plus (plus reg reg) const_int) -- so do this always. */
addr = copy_rtx (addr);
rtx
gen_label_rtx ()
{
- rtx label;
-
- label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
- NULL, label_num++, NULL, NULL);
-
- LABEL_NUSES (label) = 0;
- LABEL_ALTERNATE_NAME (label) = NULL;
- return label;
+ return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
+ NULL, label_num++, NULL);
}
\f
/* For procedure integration. */
/* Try splitting insns that can be split for better scheduling.
PAT is the pattern which might split.
TRIAL is the insn providing PAT.
- LAST is non-zero if we should return the last insn of the sequence produced.
+ LAST is nonzero if we should return the last insn of the sequence produced.
If this routine succeeds in splitting, it returns the first or last
replacement insn depending on the value of LAST. Otherwise, it
if (seq)
{
- /* SEQ can either be a SEQUENCE or the pattern of a single insn.
- The latter case will normally arise only when being done so that
- it, in turn, will be split (SFmode on the 29k is an example). */
- if (GET_CODE (seq) == SEQUENCE)
+ /* Sometimes there will be only one insn in that list, this case will
+ normally arise only when we want it in turn to be split (SFmode on
+ the 29k is an example). */
+ if (NEXT_INSN (seq) != NULL_RTX)
{
- int i, njumps = 0;
+ rtx insn_last, insn;
+ int njumps = 0;
/* Avoid infinite loop if any insn of the result matches
the original pattern. */
- for (i = 0; i < XVECLEN (seq, 0); i++)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
- && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
- return trial;
+ insn_last = seq;
+ while (1)
+ {
+ if (INSN_P (insn_last)
+ && rtx_equal_p (PATTERN (insn_last), pat))
+ return trial;
+ if (NEXT_INSN (insn_last) == NULL_RTX)
+ break;
+ insn_last = NEXT_INSN (insn_last);
+ }
/* Mark labels. */
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
- {
- rtx insn = XVECEXP (seq, 0, i);
- mark_jump_label (PATTERN (insn),
- XVECEXP (seq, 0, i), 0);
- njumps++;
- if (probability != -1
- && any_condjump_p (insn)
- && !find_reg_note (insn, REG_BR_PROB, 0))
- {
- /* We can preserve the REG_BR_PROB notes only if exactly
- one jump is created, otherwise the machine description
- is responsible for this step using
- split_branch_probability variable. */
- if (njumps != 1)
- abort ();
- REG_NOTES (insn)
- = gen_rtx_EXPR_LIST (REG_BR_PROB,
- GEN_INT (probability),
- REG_NOTES (insn));
- }
- }
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == JUMP_INSN)
+ {
+ mark_jump_label (PATTERN (insn), insn, 0);
+ njumps++;
+ if (probability != -1
+ && any_condjump_p (insn)
+ && !find_reg_note (insn, REG_BR_PROB, 0))
+ {
+ /* We can preserve the REG_BR_PROB notes only if exactly
+ one jump is created, otherwise the machine description
+ is responsible for this step using
+ split_branch_probability variable. */
+ if (njumps != 1)
+ abort ();
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_BR_PROB,
+ GEN_INT (probability),
+ REG_NOTES (insn));
+ }
+ }
+
+ insn = PREV_INSN (insn);
+ }
/* If we are splitting a CALL_INSN, look for the CALL_INSN
in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
if (GET_CODE (trial) == CALL_INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
- CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
- = CALL_INSN_FUNCTION_USAGE (trial);
+ {
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == CALL_INSN)
+ CALL_INSN_FUNCTION_USAGE (insn)
+ = CALL_INSN_FUNCTION_USAGE (trial);
+
+ insn = PREV_INSN (insn);
+ }
+ }
/* Copy notes, particularly those related to the CFG. */
for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
switch (REG_NOTE_KIND (note))
{
case REG_EH_REGION:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == CALL_INSN
|| (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn))))
= gen_rtx_EXPR_LIST (REG_EH_REGION,
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
case REG_NORETURN:
case REG_SETJMP:
case REG_ALWAYS_RETURN:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == CALL_INSN)
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
case REG_NON_LOCAL_GOTO:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == JUMP_INSN)
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
/* If there are LABELS inside the split insns increment the
usage count so we don't delete the label. */
if (GET_CODE (trial) == INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
- mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
+ {
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == INSN)
+ mark_label_nuses (PATTERN (insn));
+
+ insn = PREV_INSN (insn);
+ }
+ }
tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
tem = try_split (PATTERN (tem), tem, 1);
}
/* Avoid infinite loop if the result matches the original pattern. */
- else if (rtx_equal_p (seq, pat))
+ else if (rtx_equal_p (PATTERN (seq), pat))
return trial;
else
{
- PATTERN (trial) = seq;
+ PATTERN (trial) = PATTERN (seq);
INSN_CODE (trial) = -1;
- try_split (seq, trial, last);
+ try_split (PATTERN (trial), trial, last);
}
/* Return either the first or the last insn, depending on which was
return insn;
}
-/* Like `make_insn' but make a JUMP_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
static rtx
make_jump_insn_raw (pattern)
return insn;
}
-/* Like `make_insn' but make a CALL_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
static rtx
make_call_insn_raw (pattern)
}
\f
-/* Emit an insn of given code and pattern
- at a specified place within the doubly-linked list. */
+/* Emit insn(s) of given code and pattern
+ at a specified place within the doubly-linked list.
-/* Make an instruction with body PATTERN
- and output it before the instruction BEFORE. */
+ All of the emit_foo global entry points accept an object
+ X which is either an insn list or a PATTERN of a single
+ instruction.
-rtx
-emit_insn_before (pattern, before)
- rtx pattern, before;
-{
- rtx insn = before;
+ There are thus a few canonical ways to generate code and
+ emit it at a specific place in the instruction stream. For
+ example, consider the instruction named SPOT and the fact that
+ we would like to emit some instructions before SPOT. We might
+ do it like this:
- if (GET_CODE (pattern) == SEQUENCE)
- {
- int i;
+ start_sequence ();
+ ... emit the new instructions ...
+ insns_head = get_insns ();
+ end_sequence ();
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn_before (insn, before);
- }
- }
- else
- {
- insn = make_insn_raw (pattern);
- add_insn_before (insn, before);
- }
+ emit_insn_before (insns_head, SPOT);
- return insn;
-}
+ It used to be common to generate SEQUENCE rtl instead, but that
+ is a relic of the past which no longer occurs. The reason is that
+ SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
+ generated would almost certainly die right after it was created. */
-/* Make an instruction with body PATTERN and code JUMP_INSN
- and output it before the instruction BEFORE. */
+/* Make X be output before the instruction BEFORE. */
rtx
-emit_jump_insn_before (pattern, before)
- rtx pattern, before;
+emit_insn_before (x, before)
+ rtx x, before;
{
+ rtx last = before;
rtx insn;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
- {
- insn = make_jump_insn_raw (pattern);
- add_insn_before (insn, before);
- }
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
- return insn;
-}
+ if (x == NULL_RTX)
+ return last;
-/* Make an instruction with body PATTERN and code CALL_INSN
- and output it before the instruction BEFORE. */
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
-rtx
-emit_call_insn_before (pattern, before)
- rtx pattern, before;
-{
- rtx insn;
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
- {
- insn = make_call_insn_raw (pattern);
- add_insn_before (insn, before);
- PUT_CODE (insn, CALL_INSN);
+ default:
+ last = make_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
-/* Make an instruction with body PATTERN and code CALL_INSN
+/* Make an instruction with body X and code JUMP_INSN
and output it before the instruction BEFORE. */
rtx
-emit_call_insn_after (pattern, before)
- rtx pattern, before;
+emit_jump_insn_before (x, before)
+ rtx x, before;
{
- rtx insn;
+ rtx insn, last = NULL_RTX;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_after (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_call_insn_raw (pattern);
- add_insn_after (insn, before);
- PUT_CODE (insn, CALL_INSN);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
-/* Make an insn of code BARRIER
- and output it before the insn BEFORE. */
+/* Make an instruction with body X and code CALL_INSN
+ and output it before the instruction BEFORE. */
rtx
-emit_barrier_before (before)
- rtx before;
+emit_call_insn_before (x, before)
+ rtx x, before;
{
- rtx insn = rtx_alloc (BARRIER);
+ rtx last = NULL_RTX, insn;
- INSN_UID (insn) = cur_insn_uid++;
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
- add_insn_before (insn, before);
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_before (last, before);
+ break;
+ }
+
+ return last;
+}
+
+/* Make an insn of code BARRIER
+ and output it before the insn BEFORE. */
+
+rtx
+emit_barrier_before (before)
+ rtx before;
+{
+ rtx insn = rtx_alloc (BARRIER);
+
+ INSN_UID (insn) = cur_insn_uid++;
+
+ add_insn_before (insn, before);
return insn;
}
return note;
}
\f
-/* Make an insn of code INSN with body PATTERN
- and output it after the insn AFTER. */
+/* Helper for emit_insn_after, handles lists of instructions
+ efficiently. */
-rtx
-emit_insn_after (pattern, after)
- rtx pattern, after;
+static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
+
+static rtx
+emit_insn_after_1 (first, after)
+ rtx first, after;
{
- rtx insn = after;
+ rtx last;
+ rtx after_after;
+ basic_block bb;
- if (GET_CODE (pattern) == SEQUENCE)
+ if (GET_CODE (after) != BARRIER
+ && (bb = BLOCK_FOR_INSN (after)))
{
- int i;
-
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn_after (insn, after);
- after = insn;
- }
+ bb->flags |= BB_DIRTY;
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (bb->end == after)
+ bb->end = last;
}
else
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ continue;
+
+ after_after = NEXT_INSN (after);
+
+ NEXT_INSN (after) = first;
+ PREV_INSN (first) = after;
+ NEXT_INSN (last) = after_after;
+ if (after_after)
+ PREV_INSN (after_after) = last;
+
+ if (after == last_insn)
+ last_insn = last;
+ return last;
+}
+
+/* Make X be output after the insn AFTER. */
+
+rtx
+emit_insn_after (x, after)
+ rtx x, after;
+{
+ rtx last = after;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ if (x == NULL_RTX)
+ return last;
+
+ switch (GET_CODE (x))
{
- insn = make_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
}
/* Similar to emit_insn_after, except that line notes are to be inserted so
as to act as if this insn were at FROM. */
void
-emit_insn_after_with_line_notes (pattern, after, from)
- rtx pattern, after, from;
+emit_insn_after_with_line_notes (x, after, from)
+ rtx x, after, from;
{
rtx from_line = find_line_note (from);
rtx after_line = find_line_note (after);
- rtx insn = emit_insn_after (pattern, after);
+ rtx insn = emit_insn_after (x, after);
if (from_line)
emit_line_note_after (NOTE_SOURCE_FILE (from_line),
insn);
}
-/* Make an insn of code JUMP_INSN with body PATTERN
+/* Make an insn of code JUMP_INSN with body X
and output it after the insn AFTER. */
rtx
-emit_jump_insn_after (pattern, after)
- rtx pattern, after;
+emit_jump_insn_after (x, after)
+ rtx x, after;
{
- rtx insn;
+ rtx last;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_after (pattern, after);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_jump_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
+}
+
+/* Make an instruction with body X and code CALL_INSN
+ and output it after the instruction AFTER. */
+
+rtx
+emit_call_insn_after (x, after)
+ rtx x, after;
+{
+ rtx last;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_after (last, after);
+ break;
+ }
+
+ return last;
}
/* Make an insn of code BARRIER
tree scope;
{
rtx last = emit_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
- return last;
-}
-/* Like emit_insns_after, but set INSN_SCOPE according to SCOPE. */
-rtx
-emit_insns_after_scope (pattern, after, scope)
- rtx pattern, after;
- tree scope;
-{
- rtx last = emit_insns_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ if (active_insn_p (after))
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
tree scope;
{
rtx last = emit_jump_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ if (active_insn_p (after))
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
tree scope;
{
rtx last = emit_call_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ if (active_insn_p (after))
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
rtx first = PREV_INSN (before);
rtx last = emit_insn_before (pattern, before);
- for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
- INSN_SCOPE (first) = scope;
- return last;
-}
-
-/* Like emit_insns_before, but set INSN_SCOPE according to SCOPE. */
-rtx
-emit_insns_before_scope (pattern, before, scope)
- rtx pattern, before;
- tree scope;
-{
- rtx first = PREV_INSN (before);
- rtx last = emit_insns_before (pattern, before);
-
- for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
- INSN_SCOPE (first) = scope;
+ first = NEXT_INSN (first);
+ while (1)
+ {
+ if (active_insn_p (first))
+ INSN_SCOPE (first) = scope;
+ if (first == last)
+ break;
+ first = NEXT_INSN (first);
+ }
return last;
}
\f
-/* Make an insn of code INSN with pattern PATTERN
- and add it to the end of the doubly-linked list.
- If PATTERN is a SEQUENCE, take the elements of it
- and emit an insn for each element.
+/* Take X and emit it at the end of the doubly-linked
+ INSN list.
Returns the last insn emitted. */
rtx
-emit_insn (pattern)
- rtx pattern;
+emit_insn (x)
+ rtx x;
{
- rtx insn = last_insn;
+ rtx last = last_insn;
+ rtx insn;
- if (GET_CODE (pattern) == SEQUENCE)
- {
- int i;
+ if (x == NULL_RTX)
+ return last;
- for (i = 0; i < XVECLEN (pattern, 0); i++)
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
{
- insn = XVECEXP (pattern, 0, i);
+ rtx next = NEXT_INSN (insn);
add_insn (insn);
+ last = insn;
+ insn = next;
}
- }
- else
- {
- insn = make_insn_raw (pattern);
- add_insn (insn);
- }
-
- return insn;
-}
-
-/* Emit the insns in a chain starting with INSN.
- Return the last insn emitted. */
+ break;
-rtx
-emit_insns (insn)
- rtx insn;
-{
- rtx last = 0;
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- while (insn)
- {
- rtx next = NEXT_INSN (insn);
- add_insn (insn);
- last = insn;
- insn = next;
+ default:
+ last = make_insn_raw (x);
+ add_insn (last);
+ break;
}
return last;
}
-/* Emit the insns in a chain starting with INSN and place them in front of
- the insn BEFORE. Return the last insn emitted. */
+/* Make an insn of code JUMP_INSN with pattern X
+ and add it to the end of the doubly-linked list. */
rtx
-emit_insns_before (insn, before)
- rtx insn;
- rtx before;
+emit_jump_insn (x)
+ rtx x;
{
- rtx last = 0;
+ rtx last = NULL_RTX, insn;
- while (insn)
+ switch (GET_CODE (x))
{
- rtx next = NEXT_INSN (insn);
- add_insn_before (insn, before);
- last = insn;
- insn = next;
- }
-
- return last;
-}
-
-/* Emit the insns in a chain starting with FIRST and place them in back of
- the insn AFTER. Return the last insn emitted. */
-
-rtx
-emit_insns_after (first, after)
- rtx first;
- rtx after;
-{
- rtx last;
- rtx after_after;
- basic_block bb;
-
- if (!after)
- abort ();
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn (insn);
+ last = insn;
+ insn = next;
+ }
+ break;
- if (!first)
- return after;
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- if (GET_CODE (after) != BARRIER
- && (bb = BLOCK_FOR_INSN (after)))
- {
- bb->flags |= BB_DIRTY;
- for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
- if (GET_CODE (last) != BARRIER)
- set_block_for_insn (last, bb);
- if (GET_CODE (last) != BARRIER)
- set_block_for_insn (last, bb);
- if (bb->end == after)
- bb->end = last;
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn (last);
+ break;
}
- else
- for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
- continue;
-
- after_after = NEXT_INSN (after);
-
- NEXT_INSN (after) = first;
- PREV_INSN (first) = after;
- NEXT_INSN (last) = after_after;
- if (after_after)
- PREV_INSN (after_after) = last;
- if (after == last_insn)
- last_insn = last;
return last;
}
-/* Make an insn of code JUMP_INSN with pattern PATTERN
+/* Make an insn of code CALL_INSN with pattern X
and add it to the end of the doubly-linked list. */
rtx
-emit_jump_insn (pattern)
- rtx pattern;
+emit_call_insn (x)
+ rtx x;
{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
+ rtx insn;
+
+ switch (GET_CODE (x))
{
- rtx insn = make_jump_insn_raw (pattern);
- add_insn (insn);
- return insn;
- }
-}
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = emit_insn (x);
+ break;
-/* Make an insn of code CALL_INSN with pattern PATTERN
- and add it to the end of the doubly-linked list. */
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
-rtx
-emit_call_insn (pattern)
- rtx pattern;
-{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
- {
- rtx insn = make_call_insn_raw (pattern);
+ default:
+ insn = make_call_insn_raw (x);
add_insn (insn);
- PUT_CODE (insn, CALL_INSN);
- return insn;
+ break;
}
+
+ return insn;
}
/* Add the label LABEL to the end of the doubly-linked list. */
/* After emitting to a sequence, restore previous saved state.
To get the contents of the sequence just made, you must call
- `gen_sequence' *before* calling here.
+ `get_insns' *before* calling here.
If the compiler might have deferred popping arguments while
generating this sequence, and this sequence will not be immediately
inserted into the instruction stream, use do_pending_stack_adjust
- before calling gen_sequence. That will ensure that the deferred
+ before calling get_insns. That will ensure that the deferred
pops are inserted into this sequence, and not into some random
location in the instruction stream. See INHIBIT_DEFER_POP for more
information about deferred popping of arguments. */
{
return seq_stack != 0;
}
-
-/* Generate a SEQUENCE rtx containing the insns already emitted
- to the current sequence.
-
- This is how the gen_... function from a DEFINE_EXPAND
- constructs the SEQUENCE that it returns. */
-
-rtx
-gen_sequence ()
-{
- rtx result;
- rtx tem;
- int i;
- int len;
-
- /* Count the insns in the chain. */
- len = 0;
- for (tem = first_insn; tem; tem = NEXT_INSN (tem))
- len++;
-
- /* If only one insn, return it rather than a SEQUENCE.
- (Now that we cache SEQUENCE expressions, it isn't worth special-casing
- the case of an empty list.)
- We only return the pattern of an insn if its code is INSN and it
- has no notes. This ensures that no information gets lost. */
- if (len == 1
- && GET_CODE (first_insn) == INSN
- && ! RTX_FRAME_RELATED_P (first_insn)
- /* Don't throw away any reg notes. */
- && REG_NOTES (first_insn) == 0)
- return PATTERN (first_insn);
-
- result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
-
- for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
- XVECEXP (result, 0, i) = tem;
-
- return result;
-}
\f
/* Put the various virtual registers into REGNO_REG_RTX. */
* sizeof (unsigned char));
regno_reg_rtx
- = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
- * sizeof (rtx));
+ = (rtx *) ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
- f->emit->regno_decl
- = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
- * sizeof (tree));
+ /* Put copies of all the hard registers into regno_reg_rtx. */
+ memcpy (regno_reg_rtx,
+ static_regno_reg_rtx,
+ FIRST_PSEUDO_REGISTER * sizeof (rtx));
/* Put copies of all the virtual register rtx into regno_reg_rtx. */
init_virtual_regs (f->emit);
for (i = 0; i < units; ++i)
RTVEC_ELT (v, i) = CONST0_RTX (inner);
- tem = gen_rtx_CONST_VECTOR (mode, v);
+ tem = gen_rtx_raw_CONST_VECTOR (mode, v);
return tem;
}
+/* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
+ all elements are zero. */
+rtx
+gen_rtx_CONST_VECTOR (mode, v)
+ enum machine_mode mode;
+ rtvec v;
+{
+ rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
+ int i;
+
+ for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
+ if (RTVEC_ELT (v, i) != inner_zero)
+ return gen_rtx_raw_CONST_VECTOR (mode, v);
+ return CONST0_RTX (mode);
+}
+
/* Create some permanent unique rtl objects shared between all functions.
LINE_NUMBERS is nonzero if line numbers are to be generated. */
/* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
tables. */
- const_int_htab = htab_create (37, const_int_htab_hash,
- const_int_htab_eq, NULL);
+ const_int_htab = htab_create_ggc (37, const_int_htab_hash,
+ const_int_htab_eq, NULL);
- const_double_htab = htab_create (37, const_double_htab_hash,
- const_double_htab_eq, NULL);
+ const_double_htab = htab_create_ggc (37, const_double_htab_hash,
+ const_double_htab_eq, NULL);
- mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
- mem_attrs_htab_eq, NULL);
+ mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
+ mem_attrs_htab_eq, NULL);
+ reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
+ reg_attrs_htab_eq, NULL);
no_line_numbers = ! line_numbers;
gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
+ /* Initialize RTL for commonly used hard registers. These are
+ copied into regno_reg_rtx as we begin to compile each function. */
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
+
#ifdef INIT_EXPANDERS
/* This is to initialize {init|mark|free}_machine_status before the first
call to push_function_context_to. This is needed by the Chill front
tries to use these variables. */
for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
const_int_rtx[i + MAX_SAVED_CONST_INT] =
- gen_rtx_raw_CONST_INT (VOIDmode, i);
+ gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
&& STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
#endif
#endif
- if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
+ if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
}
\f
XEXP (note1, 0) = p;
XEXP (note2, 0) = new;
}
+ INSN_CODE (new) = INSN_CODE (insn);
return new;
}
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