-/* Emit RTL for the GNU C-Compiler expander.
+/* Emit RTL for the GCC expander.
Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of GCC.
/* Middle-to-low level generation of rtx code and insns.
- This file contains the functions `gen_rtx', `gen_reg_rtx'
- and `gen_label_rtx' that are the usual ways of creating rtl
- expressions for most purposes.
-
- It also has the functions for creating insns and linking
- them in the doubly-linked chain.
+ This file contains support functions for creating rtl expressions
+ and manipulating them in the doubly-linked chain of insns.
The patterns of the insns are created by machine-dependent
routines in insn-emit.c, which is generated automatically from
- the machine description. These routines use `gen_rtx' to make
- the individual rtx's of the pattern; what is machine dependent
- is the kind of rtx's they make and what arguments they use. */
+ the machine description. These routines make the individual rtx's
+ of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
+ which are automatically generated from rtl.def; what is machine
+ dependent is the kind of rtx's they make and what arguments they
+ use. */
#include "config.h"
#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
#include "toplev.h"
#include "rtl.h"
#include "tree.h"
#include "insn-config.h"
#include "recog.h"
#include "real.h"
-#include "obstack.h"
#include "bitmap.h"
#include "basic-block.h"
#include "ggc.h"
#include "debug.h"
+#include "langhooks.h"
/* Commonly used modes. */
/* This is *not* reset after each function. It gives each CODE_LABEL
in the entire compilation a unique label number. */
-static int label_num = 1;
+static GTY(()) int label_num = 1;
/* Highest label number in current function.
Zero means use the value of label_num instead.
static int last_label_num;
-/* Value label_num had when set_new_first_and_last_label_number was called.
+/* Value label_num had when set_new_last_label_num was called.
If label_num has not changed since then, last_label_num is valid. */
static int base_label_num;
/* Commonly used rtx's, so that we only need space for one copy.
These are initialized once for the entire compilation.
- All of these except perhaps the floating-point CONST_DOUBLEs
- are unique; no other rtx-object will be equal to any of these. */
+ All of these are unique; no other rtx-object will be equal to any
+ of these. */
rtx global_rtl[GR_MAX];
+/* Commonly used RTL for hard registers. These objects are not necessarily
+ unique, so we allocate them separately from global_rtl. They are
+ initialized once per compilation unit, then copied into regno_reg_rtx
+ at the beginning of each function. */
+static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
+
+rtx (*gen_lowpart) (enum machine_mode mode, rtx x) = gen_lowpart_general;
+
/* We record floating-point CONST_DOUBLEs in each floating-point mode for
the values of 0, 1, and 2. For the integer entries and VOIDmode, we
record a copy of const[012]_rtx. */
REAL_VALUE_TYPE dconst0;
REAL_VALUE_TYPE dconst1;
REAL_VALUE_TYPE dconst2;
+REAL_VALUE_TYPE dconst3;
+REAL_VALUE_TYPE dconst10;
REAL_VALUE_TYPE dconstm1;
+REAL_VALUE_TYPE dconstm2;
+REAL_VALUE_TYPE dconsthalf;
+REAL_VALUE_TYPE dconstthird;
+REAL_VALUE_TYPE dconstpi;
+REAL_VALUE_TYPE dconste;
/* All references to the following fixed hard registers go through
these unique rtl objects. On machines where the frame-pointer and
In an inline procedure, the stack and frame pointer rtxs may not be
used for anything else. */
-rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
-rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
/* A hash table storing CONST_INTs whose absolute value is greater
than MAX_SAVED_CONST_INT. */
-static htab_t const_int_htab;
-
-/* start_sequence and gen_sequence can make a lot of rtx expressions which are
- shortly thrown away. We use two mechanisms to prevent this waste:
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
+ htab_t const_int_htab;
- For sizes up to 5 elements, we keep a SEQUENCE and its associated
- rtvec for use by gen_sequence. One entry for each size is
- sufficient because most cases are calls to gen_sequence followed by
- immediately emitting the SEQUENCE. Reuse is safe since emitting a
- sequence is destructive on the insn in it anyway and hence can't be
- redone.
+/* A hash table storing memory attribute structures. */
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
+ htab_t mem_attrs_htab;
- We do not bother to save this cached data over nested function calls.
- Instead, we just reinitialize them. */
+/* A hash table storing register attribute structures. */
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
+ htab_t reg_attrs_htab;
-#define SEQUENCE_RESULT_SIZE 5
-
-static rtx sequence_result[SEQUENCE_RESULT_SIZE];
-
-/* During RTL generation, we also keep a list of free INSN rtl codes. */
-static rtx free_insn;
+/* A hash table storing all CONST_DOUBLEs. */
+static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
+ htab_t const_double_htab;
#define first_insn (cfun->emit->x_first_insn)
#define last_insn (cfun->emit->x_last_insn)
#define cur_insn_uid (cfun->emit->x_cur_insn_uid)
-#define last_linenum (cfun->emit->x_last_linenum)
-#define last_filename (cfun->emit->x_last_filename)
+#define last_location (cfun->emit->x_last_location)
#define first_label_num (cfun->emit->x_first_label_num)
-static rtx make_jump_insn_raw PARAMS ((rtx));
-static rtx make_call_insn_raw PARAMS ((rtx));
-static rtx find_line_note PARAMS ((rtx));
-static void mark_sequence_stack PARAMS ((struct sequence_stack *));
-static void unshare_all_rtl_1 PARAMS ((rtx));
-static void unshare_all_decls PARAMS ((tree));
-static void reset_used_decls PARAMS ((tree));
-static void mark_label_nuses PARAMS ((rtx));
-static hashval_t const_int_htab_hash PARAMS ((const void *));
-static int const_int_htab_eq PARAMS ((const void *,
- const void *));
-static int rtx_htab_mark_1 PARAMS ((void **, void *));
-static void rtx_htab_mark PARAMS ((void *));
+static rtx make_jump_insn_raw (rtx);
+static rtx make_call_insn_raw (rtx);
+static rtx find_line_note (rtx);
+static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
+static void unshare_all_decls (tree);
+static void reset_used_decls (tree);
+static void mark_label_nuses (rtx);
+static hashval_t const_int_htab_hash (const void *);
+static int const_int_htab_eq (const void *, const void *);
+static hashval_t const_double_htab_hash (const void *);
+static int const_double_htab_eq (const void *, const void *);
+static rtx lookup_const_double (rtx);
+static hashval_t mem_attrs_htab_hash (const void *);
+static int mem_attrs_htab_eq (const void *, const void *);
+static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
+ enum machine_mode);
+static hashval_t reg_attrs_htab_hash (const void *);
+static int reg_attrs_htab_eq (const void *, const void *);
+static reg_attrs *get_reg_attrs (tree, int);
+static tree component_ref_for_mem_expr (tree);
+static rtx gen_const_vector_0 (enum machine_mode);
+static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
+static void copy_rtx_if_shared_1 (rtx *orig);
/* Probability of the conditional branch currently proceeded by try_split.
Set to -1 otherwise. */
int split_branch_probability = -1;
-
\f
/* Returns a hash code for X (which is a really a CONST_INT). */
static hashval_t
-const_int_htab_hash (x)
- const void *x;
+const_int_htab_hash (const void *x)
{
- return (hashval_t) INTVAL ((const struct rtx_def *) x);
+ return (hashval_t) INTVAL ((rtx) x);
}
-/* Returns non-zero if the value represented by X (which is really a
+/* Returns nonzero if the value represented by X (which is really a
CONST_INT) is the same as that given by Y (which is really a
HOST_WIDE_INT *). */
static int
-const_int_htab_eq (x, y)
- const void *x;
- const void *y;
+const_int_htab_eq (const void *x, const void *y)
+{
+ return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
+}
+
+/* Returns a hash code for X (which is really a CONST_DOUBLE). */
+static hashval_t
+const_double_htab_hash (const void *x)
+{
+ rtx value = (rtx) x;
+ hashval_t h;
+
+ if (GET_MODE (value) == VOIDmode)
+ h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
+ else
+ {
+ h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
+ /* MODE is used in the comparison, so it should be in the hash. */
+ h ^= GET_MODE (value);
+ }
+ return h;
+}
+
+/* Returns nonzero if the value represented by X (really a ...)
+ is the same as that represented by Y (really a ...) */
+static int
+const_double_htab_eq (const void *x, const void *y)
+{
+ rtx a = (rtx)x, b = (rtx)y;
+
+ if (GET_MODE (a) != GET_MODE (b))
+ return 0;
+ if (GET_MODE (a) == VOIDmode)
+ return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
+ && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
+ else
+ return real_identical (CONST_DOUBLE_REAL_VALUE (a),
+ CONST_DOUBLE_REAL_VALUE (b));
+}
+
+/* Returns a hash code for X (which is a really a mem_attrs *). */
+
+static hashval_t
+mem_attrs_htab_hash (const void *x)
{
- return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
+ mem_attrs *p = (mem_attrs *) x;
+
+ return (p->alias ^ (p->align * 1000)
+ ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
+ ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
+ ^ (size_t) p->expr);
}
-/* Mark the hash-table element X (which is really a pointer to an
- rtx). */
+/* Returns nonzero if the value represented by X (which is really a
+ mem_attrs *) is the same as that given by Y (which is also really a
+ mem_attrs *). */
static int
-rtx_htab_mark_1 (x, data)
- void **x;
- void *data ATTRIBUTE_UNUSED;
+mem_attrs_htab_eq (const void *x, const void *y)
{
- ggc_mark_rtx (*x);
- return 1;
+ mem_attrs *p = (mem_attrs *) x;
+ mem_attrs *q = (mem_attrs *) y;
+
+ return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
+ && p->size == q->size && p->align == q->align);
}
-/* Mark all the elements of HTAB (which is really an htab_t full of
- rtxs). */
+/* Allocate a new mem_attrs structure and insert it into the hash table if
+ one identical to it is not already in the table. We are doing this for
+ MEM of mode MODE. */
-static void
-rtx_htab_mark (htab)
- void *htab;
+static mem_attrs *
+get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
+ unsigned int align, enum machine_mode mode)
+{
+ mem_attrs attrs;
+ void **slot;
+
+ /* If everything is the default, we can just return zero.
+ This must match what the corresponding MEM_* macros return when the
+ field is not present. */
+ if (alias == 0 && expr == 0 && offset == 0
+ && (size == 0
+ || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
+ && (STRICT_ALIGNMENT && mode != BLKmode
+ ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
+ return 0;
+
+ attrs.alias = alias;
+ attrs.expr = expr;
+ attrs.offset = offset;
+ attrs.size = size;
+ attrs.align = align;
+
+ slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
+ if (*slot == 0)
+ {
+ *slot = ggc_alloc (sizeof (mem_attrs));
+ memcpy (*slot, &attrs, sizeof (mem_attrs));
+ }
+
+ return *slot;
+}
+
+/* Returns a hash code for X (which is a really a reg_attrs *). */
+
+static hashval_t
+reg_attrs_htab_hash (const void *x)
+{
+ reg_attrs *p = (reg_attrs *) x;
+
+ return ((p->offset * 1000) ^ (long) p->decl);
+}
+
+/* Returns nonzero if the value represented by X (which is really a
+ reg_attrs *) is the same as that given by Y (which is also really a
+ reg_attrs *). */
+
+static int
+reg_attrs_htab_eq (const void *x, const void *y)
+{
+ reg_attrs *p = (reg_attrs *) x;
+ reg_attrs *q = (reg_attrs *) y;
+
+ return (p->decl == q->decl && p->offset == q->offset);
+}
+/* Allocate a new reg_attrs structure and insert it into the hash table if
+ one identical to it is not already in the table. We are doing this for
+ MEM of mode MODE. */
+
+static reg_attrs *
+get_reg_attrs (tree decl, int offset)
{
- htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
+ reg_attrs attrs;
+ void **slot;
+
+ /* If everything is the default, we can just return zero. */
+ if (decl == 0 && offset == 0)
+ return 0;
+
+ attrs.decl = decl;
+ attrs.offset = offset;
+
+ slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
+ if (*slot == 0)
+ {
+ *slot = ggc_alloc (sizeof (reg_attrs));
+ memcpy (*slot, &attrs, sizeof (reg_attrs));
+ }
+
+ return *slot;
}
/* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
frame_pointer_rtx). */
rtx
-gen_raw_REG (mode, regno)
- enum machine_mode mode;
- int regno;
+gen_raw_REG (enum machine_mode mode, int regno)
{
rtx x = gen_rtx_raw_REG (mode, regno);
ORIGINAL_REGNO (x) = regno;
special_rtx in gengenrtl.c as well. */
rtx
-gen_rtx_CONST_INT (mode, arg)
- enum machine_mode mode ATTRIBUTE_UNUSED;
- HOST_WIDE_INT arg;
+gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
{
void **slot;
return (rtx) *slot;
}
-/* CONST_DOUBLEs needs special handling because their length is known
- only at run-time. */
+rtx
+gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
+{
+ return GEN_INT (trunc_int_for_mode (c, mode));
+}
+
+/* CONST_DOUBLEs might be created from pairs of integers, or from
+ REAL_VALUE_TYPEs. Also, their length is known only at run time,
+ so we cannot use gen_rtx_raw_CONST_DOUBLE. */
+
+/* Determine whether REAL, a CONST_DOUBLE, already exists in the
+ hash table. If so, return its counterpart; otherwise add it
+ to the hash table and return it. */
+static rtx
+lookup_const_double (rtx real)
+{
+ void **slot = htab_find_slot (const_double_htab, real, INSERT);
+ if (*slot == 0)
+ *slot = real;
+
+ return (rtx) *slot;
+}
+
+/* Return a CONST_DOUBLE rtx for a floating-point value specified by
+ VALUE in mode MODE. */
+rtx
+const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
+{
+ rtx real = rtx_alloc (CONST_DOUBLE);
+ PUT_MODE (real, mode);
+
+ memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
+
+ return lookup_const_double (real);
+}
+
+/* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
+ of ints: I0 is the low-order word and I1 is the high-order word.
+ Do not use this routine for non-integer modes; convert to
+ REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
rtx
-gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
- enum machine_mode mode;
- rtx arg0;
- HOST_WIDE_INT arg1, arg2;
+immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
{
- rtx r = rtx_alloc (CONST_DOUBLE);
- int i;
+ rtx value;
+ unsigned int i;
+
+ if (mode != VOIDmode)
+ {
+ int width;
+ if (GET_MODE_CLASS (mode) != MODE_INT
+ && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
+ /* We can get a 0 for an error mark. */
+ && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
+ && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
+ abort ();
+
+ /* We clear out all bits that don't belong in MODE, unless they and
+ our sign bit are all one. So we get either a reasonable negative
+ value or a reasonable unsigned value for this mode. */
+ width = GET_MODE_BITSIZE (mode);
+ if (width < HOST_BITS_PER_WIDE_INT
+ && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
+ != ((HOST_WIDE_INT) (-1) << (width - 1))))
+ i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
+ else if (width == HOST_BITS_PER_WIDE_INT
+ && ! (i1 == ~0 && i0 < 0))
+ i1 = 0;
+ else if (width > 2 * HOST_BITS_PER_WIDE_INT)
+ /* We cannot represent this value as a constant. */
+ abort ();
+
+ /* If this would be an entire word for the target, but is not for
+ the host, then sign-extend on the host so that the number will
+ look the same way on the host that it would on the target.
+
+ For example, when building a 64 bit alpha hosted 32 bit sparc
+ targeted compiler, then we want the 32 bit unsigned value -1 to be
+ represented as a 64 bit value -1, and not as 0x00000000ffffffff.
+ The latter confuses the sparc backend. */
+
+ if (width < HOST_BITS_PER_WIDE_INT
+ && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
+ i0 |= ((HOST_WIDE_INT) (-1) << width);
+
+ /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
+ CONST_INT.
+
+ ??? Strictly speaking, this is wrong if we create a CONST_INT for
+ a large unsigned constant with the size of MODE being
+ HOST_BITS_PER_WIDE_INT and later try to interpret that constant
+ in a wider mode. In that case we will mis-interpret it as a
+ negative number.
+
+ Unfortunately, the only alternative is to make a CONST_DOUBLE for
+ any constant in any mode if it is an unsigned constant larger
+ than the maximum signed integer in an int on the host. However,
+ doing this will break everyone that always expects to see a
+ CONST_INT for SImode and smaller.
+
+ We have always been making CONST_INTs in this case, so nothing
+ new is being broken. */
+
+ if (width <= HOST_BITS_PER_WIDE_INT)
+ i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
+ }
- PUT_MODE (r, mode);
- XEXP (r, 0) = arg0;
- X0EXP (r, 1) = NULL_RTX;
- XWINT (r, 2) = arg1;
- XWINT (r, 3) = arg2;
+ /* If this integer fits in one word, return a CONST_INT. */
+ if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
+ return GEN_INT (i0);
- for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
- XWINT (r, i) = 0;
+ /* We use VOIDmode for integers. */
+ value = rtx_alloc (CONST_DOUBLE);
+ PUT_MODE (value, VOIDmode);
- return r;
+ CONST_DOUBLE_LOW (value) = i0;
+ CONST_DOUBLE_HIGH (value) = i1;
+
+ for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
+ XWINT (value, i) = 0;
+
+ return lookup_const_double (value);
}
rtx
-gen_rtx_REG (mode, regno)
- enum machine_mode mode;
- int regno;
+gen_rtx_REG (enum machine_mode mode, unsigned int regno)
{
/* In case the MD file explicitly references the frame pointer, have
all such references point to the same frame pointer. This is
if (mode == Pmode && !reload_in_progress)
{
- if (regno == FRAME_POINTER_REGNUM)
+ if (regno == FRAME_POINTER_REGNUM
+ && (!reload_completed || frame_pointer_needed))
return frame_pointer_rtx;
#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
- if (regno == HARD_FRAME_POINTER_REGNUM)
+ if (regno == HARD_FRAME_POINTER_REGNUM
+ && (!reload_completed || frame_pointer_needed))
return hard_frame_pointer_rtx;
#endif
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
if (regno == RETURN_ADDRESS_POINTER_REGNUM)
return return_address_pointer_rtx;
#endif
+ if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
+ && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
+ return pic_offset_table_rtx;
if (regno == STACK_POINTER_REGNUM)
return stack_pointer_rtx;
}
+#if 0
+ /* If the per-function register table has been set up, try to re-use
+ an existing entry in that table to avoid useless generation of RTL.
+
+ This code is disabled for now until we can fix the various backends
+ which depend on having non-shared hard registers in some cases. Long
+ term we want to re-enable this code as it can significantly cut down
+ on the amount of useless RTL that gets generated.
+
+ We'll also need to fix some code that runs after reload that wants to
+ set ORIGINAL_REGNO. */
+
+ if (cfun
+ && cfun->emit
+ && regno_reg_rtx
+ && regno < FIRST_PSEUDO_REGISTER
+ && reg_raw_mode[regno] == mode)
+ return regno_reg_rtx[regno];
+#endif
+
return gen_raw_REG (mode, regno);
}
rtx
-gen_rtx_MEM (mode, addr)
- enum machine_mode mode;
- rtx addr;
+gen_rtx_MEM (enum machine_mode mode, rtx addr)
{
rtx rt = gen_rtx_raw_MEM (mode, addr);
/* This field is not cleared by the mere allocation of the rtx, so
we clear it here. */
- MEM_ALIAS_SET (rt) = 0;
+ MEM_ATTRS (rt) = 0;
return rt;
}
rtx
-gen_rtx_SUBREG (mode, reg, offset)
- enum machine_mode mode;
- rtx reg;
- int offset;
+gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
{
/* This is the most common failure type.
Catch it early so we can see who does it. */
if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
abort ();
#endif
- return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
+ return gen_rtx_raw_SUBREG (mode, reg, offset);
}
-/* Generate a SUBREG representing the least-significant part
- * of REG if MODE is smaller than mode of REG, otherwise
- * paradoxical SUBREG. */
+/* Generate a SUBREG representing the least-significant part of REG if MODE
+ is smaller than mode of REG, otherwise paradoxical SUBREG. */
+
rtx
-gen_lowpart_SUBREG (mode, reg)
- enum machine_mode mode;
- rtx reg;
+gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
{
enum machine_mode inmode;
subreg_lowpart_offset (mode, inmode));
}
\f
-/* rtx gen_rtx (code, mode, [element1, ..., elementn])
-**
-** This routine generates an RTX of the size specified by
-** <code>, which is an RTX code. The RTX structure is initialized
-** from the arguments <element1> through <elementn>, which are
-** interpreted according to the specific RTX type's format. The
-** special machine mode associated with the rtx (if any) is specified
-** in <mode>.
-**
-** gen_rtx can be invoked in a way which resembles the lisp-like
-** rtx it will generate. For example, the following rtx structure:
-**
-** (plus:QI (mem:QI (reg:SI 1))
-** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
-**
-** ...would be generated by the following C code:
-**
-** gen_rtx (PLUS, QImode,
-** gen_rtx (MEM, QImode,
-** gen_rtx (REG, SImode, 1)),
-** gen_rtx (MEM, QImode,
-** gen_rtx (PLUS, SImode,
-** gen_rtx (REG, SImode, 2),
-** gen_rtx (REG, SImode, 3)))),
-*/
-
-/*VARARGS2*/
-rtx
-gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
-{
-#ifndef ANSI_PROTOTYPES
- enum rtx_code code;
- enum machine_mode mode;
-#endif
- va_list p;
- register int i; /* Array indices... */
- register const char *fmt; /* Current rtx's format... */
- register rtx rt_val; /* RTX to return to caller... */
-
- VA_START (p, mode);
-
-#ifndef ANSI_PROTOTYPES
- code = va_arg (p, enum rtx_code);
- mode = va_arg (p, enum machine_mode);
-#endif
-
- switch (code)
- {
- case CONST_INT:
- rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
- break;
-
- case CONST_DOUBLE:
- {
- rtx arg0 = va_arg (p, rtx);
- HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
- HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
- rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
- }
- break;
-
- case REG:
- rt_val = gen_rtx_REG (mode, va_arg (p, int));
- break;
-
- case MEM:
- rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
- break;
-
- default:
- rt_val = rtx_alloc (code); /* Allocate the storage space. */
- rt_val->mode = mode; /* Store the machine mode... */
-
- fmt = GET_RTX_FORMAT (code); /* Find the right format... */
- for (i = 0; i < GET_RTX_LENGTH (code); i++)
- {
- switch (*fmt++)
- {
- case '0': /* Unused field. */
- break;
-
- case 'i': /* An integer? */
- XINT (rt_val, i) = va_arg (p, int);
- break;
-
- case 'w': /* A wide integer? */
- XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
- break;
-
- case 's': /* A string? */
- XSTR (rt_val, i) = va_arg (p, char *);
- break;
-
- case 'e': /* An expression? */
- case 'u': /* An insn? Same except when printing. */
- XEXP (rt_val, i) = va_arg (p, rtx);
- break;
-
- case 'E': /* An RTX vector? */
- XVEC (rt_val, i) = va_arg (p, rtvec);
- break;
-
- case 'b': /* A bitmap? */
- XBITMAP (rt_val, i) = va_arg (p, bitmap);
- break;
-
- case 't': /* A tree? */
- XTREE (rt_val, i) = va_arg (p, tree);
- break;
-
- default:
- abort ();
- }
- }
- break;
- }
-
- va_end (p);
- return rt_val;
-}
-
/* gen_rtvec (n, [rt1, ..., rtn])
**
** This routine creates an rtvec and stores within it the
/*VARARGS1*/
rtvec
-gen_rtvec VPARAMS ((int n, ...))
+gen_rtvec (int n, ...)
{
-#ifndef ANSI_PROTOTYPES
- int n;
-#endif
- int i;
- va_list p;
+ int i, save_n;
rtx *vector;
+ va_list p;
- VA_START (p, n);
-
-#ifndef ANSI_PROTOTYPES
- n = va_arg (p, int);
-#endif
+ va_start (p, n);
if (n == 0)
return NULL_RTVEC; /* Don't allocate an empty rtvec... */
- vector = (rtx *) alloca (n * sizeof (rtx));
+ vector = alloca (n * sizeof (rtx));
for (i = 0; i < n; i++)
vector[i] = va_arg (p, rtx);
+
+ /* The definition of VA_* in K&R C causes `n' to go out of scope. */
+ save_n = n;
va_end (p);
- return gen_rtvec_v (n, vector);
+ return gen_rtvec_v (save_n, vector);
}
rtvec
-gen_rtvec_v (n, argp)
- int n;
- rtx *argp;
+gen_rtvec_v (int n, rtx *argp)
{
- register int i;
- register rtvec rt_val;
+ int i;
+ rtvec rt_val;
if (n == 0)
return NULL_RTVEC; /* Don't allocate an empty rtvec... */
return rt_val;
}
-
\f
/* Generate a REG rtx for a new pseudo register of mode MODE.
This pseudo is assigned the next sequential register number. */
rtx
-gen_reg_rtx (mode)
- enum machine_mode mode;
+gen_reg_rtx (enum machine_mode mode)
{
struct function *f = cfun;
- register rtx val;
+ rtx val;
/* Don't let anything called after initial flow analysis create new
registers. */
which makes much better code. Besides, allocating DCmode
pseudos overstrains reload on some machines like the 386. */
rtx realpart, imagpart;
- int size = GET_MODE_UNIT_SIZE (mode);
- enum machine_mode partmode
- = mode_for_size (size * BITS_PER_UNIT,
- (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
- ? MODE_FLOAT : MODE_INT),
- 0);
+ enum machine_mode partmode = GET_MODE_INNER (mode);
realpart = gen_reg_rtx (partmode);
imagpart = gen_reg_rtx (partmode);
return gen_rtx_CONCAT (mode, realpart, imagpart);
}
- /* Make sure regno_pointer_align and regno_reg_rtx are large enough
- to have an element for this pseudo reg number. */
+ /* Make sure regno_pointer_align, and regno_reg_rtx are large
+ enough to have an element for this pseudo reg number. */
if (reg_rtx_no == f->emit->regno_pointer_align_length)
{
int old_size = f->emit->regno_pointer_align_length;
- rtx *new1;
char *new;
- new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
+ rtx *new1;
+
+ new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
memset (new + old_size, 0, old_size);
f->emit->regno_pointer_align = (unsigned char *) new;
- new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
- old_size * 2 * sizeof (rtx));
+ new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
+ old_size * 2 * sizeof (rtx));
memset (new1 + old_size, 0, old_size * sizeof (rtx));
regno_reg_rtx = new1;
return val;
}
+/* Generate a register with same attributes as REG,
+ but offsetted by OFFSET. */
+
+rtx
+gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
+{
+ rtx new = gen_rtx_REG (mode, regno);
+ REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
+ REG_OFFSET (reg) + offset);
+ return new;
+}
+
+/* Set the decl for MEM to DECL. */
+
+void
+set_reg_attrs_from_mem (rtx reg, rtx mem)
+{
+ if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
+ REG_ATTRS (reg)
+ = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
+}
+
+/* Set the register attributes for registers contained in PARM_RTX.
+ Use needed values from memory attributes of MEM. */
+
+void
+set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
+{
+ if (GET_CODE (parm_rtx) == REG)
+ set_reg_attrs_from_mem (parm_rtx, mem);
+ else if (GET_CODE (parm_rtx) == PARALLEL)
+ {
+ /* Check for a NULL entry in the first slot, used to indicate that the
+ parameter goes both on the stack and in registers. */
+ int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
+ for (; i < XVECLEN (parm_rtx, 0); i++)
+ {
+ rtx x = XVECEXP (parm_rtx, 0, i);
+ if (GET_CODE (XEXP (x, 0)) == REG)
+ REG_ATTRS (XEXP (x, 0))
+ = get_reg_attrs (MEM_EXPR (mem),
+ INTVAL (XEXP (x, 1)));
+ }
+ }
+}
+
+/* Assign the RTX X to declaration T. */
+void
+set_decl_rtl (tree t, rtx x)
+{
+ DECL_CHECK (t)->decl.rtl = x;
+
+ if (!x)
+ return;
+ /* For register, we maintain the reverse information too. */
+ if (GET_CODE (x) == REG)
+ REG_ATTRS (x) = get_reg_attrs (t, 0);
+ else if (GET_CODE (x) == SUBREG)
+ REG_ATTRS (SUBREG_REG (x))
+ = get_reg_attrs (t, -SUBREG_BYTE (x));
+ if (GET_CODE (x) == CONCAT)
+ {
+ if (REG_P (XEXP (x, 0)))
+ REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
+ if (REG_P (XEXP (x, 1)))
+ REG_ATTRS (XEXP (x, 1))
+ = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
+ }
+ if (GET_CODE (x) == PARALLEL)
+ {
+ int i;
+ for (i = 0; i < XVECLEN (x, 0); i++)
+ {
+ rtx y = XVECEXP (x, 0, i);
+ if (REG_P (XEXP (y, 0)))
+ REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
+ }
+ }
+}
+
+/* Assign the RTX X to parameter declaration T. */
+void
+set_decl_incoming_rtl (tree t, rtx x)
+{
+ DECL_INCOMING_RTL (t) = x;
+
+ if (!x)
+ return;
+ /* For register, we maintain the reverse information too. */
+ if (GET_CODE (x) == REG)
+ REG_ATTRS (x) = get_reg_attrs (t, 0);
+ else if (GET_CODE (x) == SUBREG)
+ REG_ATTRS (SUBREG_REG (x))
+ = get_reg_attrs (t, -SUBREG_BYTE (x));
+ if (GET_CODE (x) == CONCAT)
+ {
+ if (REG_P (XEXP (x, 0)))
+ REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
+ if (REG_P (XEXP (x, 1)))
+ REG_ATTRS (XEXP (x, 1))
+ = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
+ }
+ if (GET_CODE (x) == PARALLEL)
+ {
+ int i, start;
+
+ /* Check for a NULL entry, used to indicate that the parameter goes
+ both on the stack and in registers. */
+ if (XEXP (XVECEXP (x, 0, 0), 0))
+ start = 0;
+ else
+ start = 1;
+
+ for (i = start; i < XVECLEN (x, 0); i++)
+ {
+ rtx y = XVECEXP (x, 0, i);
+ if (REG_P (XEXP (y, 0)))
+ REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
+ }
+ }
+}
+
/* Identify REG (which may be a CONCAT) as a user register. */
void
-mark_user_reg (reg)
- rtx reg;
+mark_user_reg (rtx reg)
{
if (GET_CODE (reg) == CONCAT)
{
as ALIGN, if nonzero. */
void
-mark_reg_pointer (reg, align)
- rtx reg;
- int align;
+mark_reg_pointer (rtx reg, int align)
{
if (! REG_POINTER (reg))
{
REGNO_POINTER_ALIGN (REGNO (reg)) = align;
}
else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
- /* We can no-longer be sure just how aligned this pointer is */
+ /* We can no-longer be sure just how aligned this pointer is. */
REGNO_POINTER_ALIGN (REGNO (reg)) = align;
}
/* Return 1 plus largest pseudo reg number used in the current function. */
int
-max_reg_num ()
+max_reg_num (void)
{
return reg_rtx_no;
}
/* Return 1 + the largest label number used so far in the current function. */
int
-max_label_num ()
+max_label_num (void)
{
if (last_label_num && label_num == base_label_num)
return last_label_num;
/* Return first label number used in this function (if any were used). */
int
-get_first_label_num ()
+get_first_label_num (void)
{
return first_label_num;
}
/* Return the final regno of X, which is a SUBREG of a hard
register. */
int
-subreg_hard_regno (x, check_mode)
- register rtx x;
- int check_mode;
+subreg_hard_regno (rtx x, int check_mode)
{
enum machine_mode mode = GET_MODE (x);
unsigned int byte_offset, base_regno, final_regno;
abort ();
if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
abort ();
-
+#ifdef ENABLE_CHECKING
+ if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
+ SUBREG_BYTE (x), mode))
+ abort ();
+#endif
/* Catch non-congruent offsets too. */
byte_offset = SUBREG_BYTE (x);
if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
If this is not a case we can handle, return 0. */
rtx
-gen_lowpart_common (mode, x)
- enum machine_mode mode;
- register rtx x;
+gen_lowpart_common (enum machine_mode mode, rtx x)
{
int msize = GET_MODE_SIZE (mode);
- int xsize = GET_MODE_SIZE (GET_MODE (x));
+ int xsize;
int offset = 0;
+ enum machine_mode innermode;
+
+ /* Unfortunately, this routine doesn't take a parameter for the mode of X,
+ so we have to make one up. Yuk. */
+ innermode = GET_MODE (x);
+ if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
+ innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
+ else if (innermode == VOIDmode)
+ innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
+
+ xsize = GET_MODE_SIZE (innermode);
+
+ if (innermode == VOIDmode || innermode == BLKmode)
+ abort ();
- if (GET_MODE (x) == mode)
+ if (innermode == mode)
return x;
/* MODE must occupy no more words than the mode of X. */
- if (GET_MODE (x) != VOIDmode
- && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
- > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
+ if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
+ > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
+ return 0;
+
+ /* Don't allow generating paradoxical FLOAT_MODE subregs. */
+ if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
return 0;
- offset = subreg_lowpart_offset (mode, GET_MODE (x));
+ offset = subreg_lowpart_offset (mode, innermode);
if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
&& (GET_MODE_CLASS (mode) == MODE_INT
if (GET_MODE (XEXP (x, 0)) == mode)
return XEXP (x, 0);
- else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
+ else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
return gen_lowpart_common (mode, XEXP (x, 0));
- else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
+ else if (msize < xsize)
return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
}
else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
- || GET_CODE (x) == CONCAT)
- return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
- /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
- from the low-order part of the constant. */
- else if ((GET_MODE_CLASS (mode) == MODE_INT
- || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
- && GET_MODE (x) == VOIDmode
- && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
- {
- /* If MODE is twice the host word size, X is already the desired
- representation. Otherwise, if MODE is wider than a word, we can't
- do this. If MODE is exactly a word, return just one CONST_INT. */
-
- if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
- return x;
- else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
- return 0;
- else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
- return (GET_CODE (x) == CONST_INT ? x
- : GEN_INT (CONST_DOUBLE_LOW (x)));
- else
- {
- /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
- HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
- : CONST_DOUBLE_LOW (x));
+ || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
+ || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
+ return simplify_gen_subreg (mode, x, innermode, offset);
- /* Sign extend to HOST_WIDE_INT. */
- val = trunc_int_for_mode (val, mode);
+ /* Otherwise, we can't do this. */
+ return 0;
+}
+\f
+/* Return the constant real or imaginary part (which has mode MODE)
+ of a complex value X. The IMAGPART_P argument determines whether
+ the real or complex component should be returned. This function
+ returns NULL_RTX if the component isn't a constant. */
- return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
- : GEN_INT (val));
- }
- }
+static rtx
+gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
+{
+ tree decl, part;
-#ifndef REAL_ARITHMETIC
- /* If X is an integral constant but we want it in floating-point, it
- must be the case that we have a union of an integer and a floating-point
- value. If the machine-parameters allow it, simulate that union here
- and return the result. The two-word and single-word cases are
- different. */
-
- else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_SIZE (mode) == UNITS_PER_WORD
- && GET_CODE (x) == CONST_INT
- && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
+ if (GET_CODE (x) == MEM
+ && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
{
- union {HOST_WIDE_INT i; float d; } u;
-
- u.i = INTVAL (x);
- return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
+ decl = SYMBOL_REF_DECL (XEXP (x, 0));
+ if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
+ {
+ part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
+ if (TREE_CODE (part) == REAL_CST
+ || TREE_CODE (part) == INTEGER_CST)
+ return expand_expr (part, NULL_RTX, mode, 0);
+ }
}
- else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
- && GET_MODE (x) == VOIDmode
- && (sizeof (double) * HOST_BITS_PER_CHAR
- == 2 * HOST_BITS_PER_WIDE_INT))
- {
- union {HOST_WIDE_INT i[2]; double d; } u;
- HOST_WIDE_INT low, high;
+ return NULL_RTX;
+}
- if (GET_CODE (x) == CONST_INT)
- low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
- else
- low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
+/* Return the real part (which has mode MODE) of a complex value X.
+ This always comes at the low address in memory. */
-#ifdef HOST_WORDS_BIG_ENDIAN
- u.i[0] = high, u.i[1] = low;
-#else
- u.i[0] = low, u.i[1] = high;
-#endif
+rtx
+gen_realpart (enum machine_mode mode, rtx x)
+{
+ rtx part;
- return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
- }
+ /* Handle complex constants. */
+ part = gen_complex_constant_part (mode, x, 0);
+ if (part != NULL_RTX)
+ return part;
- /* Similarly, if this is converting a floating-point value into a
- single-word integer. Only do this is the host and target parameters are
- compatible. */
-
- else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && (GET_MODE_CLASS (mode) == MODE_INT
- || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
- && GET_CODE (x) == CONST_DOUBLE
- && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
- return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
-
- /* Similarly, if this is converting a floating-point value into a
- two-word integer, we can do this one word at a time and make an
- integer. Only do this is the host and target parameters are
- compatible. */
-
- else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && (GET_MODE_CLASS (mode) == MODE_INT
- || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
- && GET_CODE (x) == CONST_DOUBLE
- && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
- {
- rtx lowpart, highpart;
-
- lowpart = constant_subword (x,
- (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
- GET_MODE (x));
- highpart = constant_subword (x,
- (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
- GET_MODE (x));
- if (lowpart && GET_CODE (lowpart) == CONST_INT
- && highpart && GET_CODE (highpart) == CONST_INT)
- return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
- }
-#else /* ifndef REAL_ARITHMETIC */
-
- /* When we have a FP emulator, we can handle all conversions between
- FP and integer operands. This simplifies reload because it
- doesn't have to deal with constructs like (subreg:DI
- (const_double:SF ...)) or (subreg:DF (const_int ...)). */
- /* Single-precision floats are always 32-bits and double-precision
- floats are always 64-bits. */
-
- else if (GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == 32
- && GET_CODE (x) == CONST_INT)
- {
- REAL_VALUE_TYPE r;
- HOST_WIDE_INT i;
-
- i = INTVAL (x);
- r = REAL_VALUE_FROM_TARGET_SINGLE (i);
- return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
- }
- else if (GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == 64
- && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
- && GET_MODE (x) == VOIDmode)
- {
- REAL_VALUE_TYPE r;
- HOST_WIDE_INT i[2];
- HOST_WIDE_INT low, high;
-
- if (GET_CODE (x) == CONST_INT)
- {
- low = INTVAL (x);
- high = low >> (HOST_BITS_PER_WIDE_INT - 1);
- }
- else
- {
- low = CONST_DOUBLE_LOW (x);
- high = CONST_DOUBLE_HIGH (x);
- }
-
- /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
- target machine. */
- if (WORDS_BIG_ENDIAN)
- i[0] = high, i[1] = low;
- else
- i[0] = low, i[1] = high;
-
- r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
- return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
- }
- else if ((GET_MODE_CLASS (mode) == MODE_INT
- || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
- && GET_CODE (x) == CONST_DOUBLE
- && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
- {
- REAL_VALUE_TYPE r;
- long i[4]; /* Only the low 32 bits of each 'long' are used. */
- int endian = WORDS_BIG_ENDIAN ? 1 : 0;
-
- REAL_VALUE_FROM_CONST_DOUBLE (r, x);
- switch (GET_MODE_BITSIZE (GET_MODE (x)))
- {
- case 32:
- REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
- i[1 - endian] = 0;
- break;
- case 64:
- REAL_VALUE_TO_TARGET_DOUBLE (r, i);
- break;
- case 96:
- REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
- i[3-3*endian] = 0;
- break;
- case 128:
- REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
- break;
- default:
- abort ();
- }
-
- /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
- and return it. */
-#if HOST_BITS_PER_WIDE_INT == 32
- return immed_double_const (i[endian], i[1 - endian], mode);
-#else
- {
- int c;
-
- if (HOST_BITS_PER_WIDE_INT != 64)
- abort ();
-
- for (c = 0; c < 4; c++)
- i[c] &= ~ (0L);
-
- switch (GET_MODE_BITSIZE (GET_MODE (x)))
- {
- case 32:
- case 64:
- return immed_double_const (((unsigned long) i[endian]) |
- (((HOST_WIDE_INT) i[1-endian]) << 32),
- 0, mode);
- case 96:
- case 128:
- return immed_double_const (((unsigned long) i[endian*3]) |
- (((HOST_WIDE_INT) i[1+endian]) << 32),
- ((unsigned long) i[2-endian]) |
- (((HOST_WIDE_INT) i[3-endian*3]) << 32),
- mode);
- default:
- abort ();
- }
- }
-#endif
- }
-#endif /* ifndef REAL_ARITHMETIC */
-
- /* Otherwise, we can't do this. */
- return 0;
-}
-\f
-/* Return the real part (which has mode MODE) of a complex value X.
- This always comes at the low address in memory. */
-
-rtx
-gen_realpart (mode, x)
- enum machine_mode mode;
- register rtx x;
-{
if (WORDS_BIG_ENDIAN
&& GET_MODE_BITSIZE (mode) < BITS_PER_WORD
&& REG_P (x)
&& REGNO (x) < FIRST_PSEUDO_REGISTER)
internal_error
- ("Can't access real part of complex value in hard register");
+ ("can't access real part of complex value in hard register");
else if (WORDS_BIG_ENDIAN)
return gen_highpart (mode, x);
else
This always comes at the high address in memory. */
rtx
-gen_imagpart (mode, x)
- enum machine_mode mode;
- register rtx x;
+gen_imagpart (enum machine_mode mode, rtx x)
{
+ rtx part;
+
+ /* Handle complex constants. */
+ part = gen_complex_constant_part (mode, x, 1);
+ if (part != NULL_RTX)
+ return part;
+
if (WORDS_BIG_ENDIAN)
return gen_lowpart (mode, x);
else if (! WORDS_BIG_ENDIAN
else
return gen_highpart (mode, x);
}
-
-/* Return 1 iff X, assumed to be a SUBREG,
- refers to the real part of the complex value in its containing reg.
- Complex values are always stored with the real part in the first word,
- regardless of WORDS_BIG_ENDIAN. */
-
-int
-subreg_realpart_p (x)
- rtx x;
-{
- if (GET_CODE (x) != SUBREG)
- abort ();
-
- return ((unsigned int) SUBREG_BYTE (x)
- < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
-}
\f
/* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
If X is a MEM whose address is a QUEUED, the value may be so also. */
rtx
-gen_lowpart (mode, x)
- enum machine_mode mode;
- register rtx x;
+gen_lowpart_general (enum machine_mode mode, rtx x)
{
rtx result = gen_lowpart_common (mode, x);
else if (GET_CODE (x) == MEM)
{
/* The only additional case we can do is MEM. */
- register int offset = 0;
+ int offset = 0;
+
+ /* The following exposes the use of "x" to CSE. */
+ if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
+ && SCALAR_INT_MODE_P (GET_MODE (x))
+ && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
+ GET_MODE_BITSIZE (GET_MODE (x)))
+ && ! no_new_pseudos)
+ return gen_lowpart (mode, force_reg (GET_MODE (x), x));
+
if (WORDS_BIG_ENDIAN)
offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
- MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
This is used to access the imaginary part of a complex number. */
rtx
-gen_highpart (mode, x)
- enum machine_mode mode;
- register rtx x;
+gen_highpart (enum machine_mode mode, rtx x)
{
unsigned int msize = GET_MODE_SIZE (mode);
rtx result;
/* This case loses if X is a subreg. To catch bugs early,
complain if an invalid MODE is used even in other cases. */
if (msize > UNITS_PER_WORD
- && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
+ && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
abort ();
result = simplify_gen_subreg (mode, x, GET_MODE (x),
/* simplify_gen_subreg is not guaranteed to return a valid operand for
the target if we have a MEM. gen_highpart must return a valid operand,
emitting code if necessary to do so. */
- if (GET_CODE (result) == MEM)
+ if (result != NULL_RTX && GET_CODE (result) == MEM)
result = validize_mem (result);
if (!result)
return result;
}
-/* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
+/* Like gen_highpart, but accept mode of EXP operand in case EXP can
be VOIDmode constant. */
rtx
-gen_highpart_mode (outermode, innermode, exp)
- enum machine_mode outermode, innermode;
- rtx exp;
+gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
{
if (GET_MODE (exp) != VOIDmode)
{
return simplify_gen_subreg (outermode, exp, innermode,
subreg_highpart_offset (outermode, innermode));
}
+
/* Return offset in bytes to get OUTERMODE low part
of the value in mode INNERMODE stored in memory in target format. */
unsigned int
-subreg_lowpart_offset (outermode, innermode)
- enum machine_mode outermode, innermode;
+subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
{
unsigned int offset = 0;
int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
/* Return offset in bytes to get OUTERMODE high part
of the value in mode INNERMODE stored in memory in target format. */
unsigned int
-subreg_highpart_offset (outermode, innermode)
- enum machine_mode outermode, innermode;
+subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
{
unsigned int offset = 0;
int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
- abort ();
+ abort ();
if (difference > 0)
{
If X is not a SUBREG, always return 1 (it is its own low part!). */
int
-subreg_lowpart_p (x)
- rtx x;
+subreg_lowpart_p (rtx x)
{
if (GET_CODE (x) != SUBREG)
return 1;
== SUBREG_BYTE (x));
}
\f
-
-/* Helper routine for all the constant cases of operand_subword.
- Some places invoke this directly. */
-
-rtx
-constant_subword (op, offset, mode)
- rtx op;
- int offset;
- enum machine_mode mode;
-{
- int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
- HOST_WIDE_INT val;
-
- /* If OP is already an integer word, return it. */
- if (GET_MODE_CLASS (mode) == MODE_INT
- && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
- return op;
-
-#ifdef REAL_ARITHMETIC
- /* The output is some bits, the width of the target machine's word.
- A wider-word host can surely hold them in a CONST_INT. A narrower-word
- host can't. */
- if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == 64
- && GET_CODE (op) == CONST_DOUBLE)
- {
- long k[2];
- REAL_VALUE_TYPE rv;
-
- REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
- REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
-
- /* We handle 32-bit and >= 64-bit words here. Note that the order in
- which the words are written depends on the word endianness.
- ??? This is a potential portability problem and should
- be fixed at some point.
-
- We must excercise caution with the sign bit. By definition there
- are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
- Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
- So we explicitly mask and sign-extend as necessary. */
- if (BITS_PER_WORD == 32)
- {
- val = k[offset];
- val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
- return GEN_INT (val);
- }
-#if HOST_BITS_PER_WIDE_INT >= 64
- else if (BITS_PER_WORD >= 64 && offset == 0)
- {
- val = k[! WORDS_BIG_ENDIAN];
- val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
- val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
- return GEN_INT (val);
- }
-#endif
- else if (BITS_PER_WORD == 16)
- {
- val = k[offset >> 1];
- if ((offset & 1) == ! WORDS_BIG_ENDIAN)
- val >>= 16;
- val = ((val & 0xffff) ^ 0x8000) - 0x8000;
- return GEN_INT (val);
- }
- else
- abort ();
- }
- else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) > 64
- && GET_CODE (op) == CONST_DOUBLE)
- {
- long k[4];
- REAL_VALUE_TYPE rv;
-
- REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
- REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
-
- if (BITS_PER_WORD == 32)
- {
- val = k[offset];
- val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
- return GEN_INT (val);
- }
-#if HOST_BITS_PER_WIDE_INT >= 64
- else if (BITS_PER_WORD >= 64 && offset <= 1)
- {
- val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
- val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
- val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
- return GEN_INT (val);
- }
-#endif
- else
- abort ();
- }
-#else /* no REAL_ARITHMETIC */
- if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
- && GET_CODE (op) == CONST_DOUBLE)
- {
- /* The constant is stored in the host's word-ordering,
- but we want to access it in the target's word-ordering. Some
- compilers don't like a conditional inside macro args, so we have two
- copies of the return. */
-#ifdef HOST_WORDS_BIG_ENDIAN
- return GEN_INT (offset == WORDS_BIG_ENDIAN
- ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
-#else
- return GEN_INT (offset != WORDS_BIG_ENDIAN
- ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
-#endif
- }
-#endif /* no REAL_ARITHMETIC */
-
- /* Single word float is a little harder, since single- and double-word
- values often do not have the same high-order bits. We have already
- verified that we want the only defined word of the single-word value. */
-#ifdef REAL_ARITHMETIC
- if (GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_BITSIZE (mode) == 32
- && GET_CODE (op) == CONST_DOUBLE)
- {
- long l;
- REAL_VALUE_TYPE rv;
-
- REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
- REAL_VALUE_TO_TARGET_SINGLE (rv, l);
-
- /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
- val = l;
- val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
-
- if (BITS_PER_WORD == 16)
- {
- if ((offset & 1) == ! WORDS_BIG_ENDIAN)
- val >>= 16;
- val = ((val & 0xffff) ^ 0x8000) - 0x8000;
- }
-
- return GEN_INT (val);
- }
-#else
- if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_SIZE (mode) == UNITS_PER_WORD
- && GET_CODE (op) == CONST_DOUBLE)
- {
- double d;
- union {float f; HOST_WIDE_INT i; } u;
-
- REAL_VALUE_FROM_CONST_DOUBLE (d, op);
-
- u.f = d;
- return GEN_INT (u.i);
- }
- if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
- && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
- || flag_pretend_float)
- && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
- && GET_MODE_CLASS (mode) == MODE_FLOAT
- && GET_MODE_SIZE (mode) == UNITS_PER_WORD
- && GET_CODE (op) == CONST_DOUBLE)
- {
- double d;
- union {double d; HOST_WIDE_INT i; } u;
-
- REAL_VALUE_FROM_CONST_DOUBLE (d, op);
-
- u.d = d;
- return GEN_INT (u.i);
- }
-#endif /* no REAL_ARITHMETIC */
-
- /* The only remaining cases that we can handle are integers.
- Convert to proper endianness now since these cases need it.
- At this point, offset == 0 means the low-order word.
-
- We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
- in general. However, if OP is (const_int 0), we can just return
- it for any word. */
-
- if (op == const0_rtx)
- return op;
-
- if (GET_MODE_CLASS (mode) != MODE_INT
- || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
- || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
- return 0;
-
- if (WORDS_BIG_ENDIAN)
- offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
-
- /* Find out which word on the host machine this value is in and get
- it from the constant. */
- val = (offset / size_ratio == 0
- ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
- : (GET_CODE (op) == CONST_INT
- ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
-
- /* Get the value we want into the low bits of val. */
- if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
- val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
-
- val = trunc_int_for_mode (val, word_mode);
-
- return GEN_INT (val);
-}
-
/* Return subword OFFSET of operand OP.
The word number, OFFSET, is interpreted as the word number starting
at the low-order address. OFFSET 0 is the low-order word if not
*/
rtx
-operand_subword (op, offset, validate_address, mode)
- rtx op;
- unsigned int offset;
- int validate_address;
- enum machine_mode mode;
+operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
{
if (mode == VOIDmode)
mode = GET_MODE (op);
MODE is the mode of OP, in case it is CONST_INT. */
rtx
-operand_subword_force (op, offset, mode)
- rtx op;
- unsigned int offset;
- enum machine_mode mode;
+operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
{
rtx result = operand_subword (op, offset, 1, mode);
A test instruction is changed into a compare of 0 against the operand. */
void
-reverse_comparison (insn)
- rtx insn;
+reverse_comparison (rtx insn)
{
rtx body = PATTERN (insn);
rtx comp;
}
}
\f
-/* Return a memory reference like MEMREF, but with its mode changed
- to MODE and its address changed to ADDR.
- (VOIDmode means don't change the mode.
- NULL for ADDR means don't change the address.)
- VALIDATE is nonzero if the returned memory location is required to be
- valid. */
+/* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
+ or (2) a component ref of something variable. Represent the later with
+ a NULL expression. */
-rtx
-change_address_1 (memref, mode, addr, validate)
- rtx memref;
- enum machine_mode mode;
- rtx addr;
- int validate;
+static tree
+component_ref_for_mem_expr (tree ref)
+{
+ tree inner = TREE_OPERAND (ref, 0);
+
+ if (TREE_CODE (inner) == COMPONENT_REF)
+ inner = component_ref_for_mem_expr (inner);
+ else
+ {
+ /* Now remove any conversions: they don't change what the underlying
+ object is. Likewise for SAVE_EXPR. */
+ while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
+ || TREE_CODE (inner) == NON_LVALUE_EXPR
+ || TREE_CODE (inner) == VIEW_CONVERT_EXPR
+ || TREE_CODE (inner) == SAVE_EXPR)
+ inner = TREE_OPERAND (inner, 0);
+
+ if (! DECL_P (inner))
+ inner = NULL_TREE;
+ }
+
+ if (inner == TREE_OPERAND (ref, 0))
+ return ref;
+ else
+ return build (COMPONENT_REF, TREE_TYPE (ref), inner,
+ TREE_OPERAND (ref, 1));
+}
+
+/* Returns 1 if both MEM_EXPR can be considered equal
+ and 0 otherwise. */
+
+int
+mem_expr_equal_p (tree expr1, tree expr2)
+{
+ if (expr1 == expr2)
+ return 1;
+
+ if (! expr1 || ! expr2)
+ return 0;
+
+ if (TREE_CODE (expr1) != TREE_CODE (expr2))
+ return 0;
+
+ if (TREE_CODE (expr1) == COMPONENT_REF)
+ return
+ mem_expr_equal_p (TREE_OPERAND (expr1, 0),
+ TREE_OPERAND (expr2, 0))
+ && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
+ TREE_OPERAND (expr2, 1));
+
+ if (TREE_CODE (expr1) == INDIRECT_REF)
+ return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
+ TREE_OPERAND (expr2, 0));
+
+ /* Decls with different pointers can't be equal. */
+ if (DECL_P (expr1))
+ return 0;
+
+ abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
+ have been resolved here. */
+}
+
+/* Given REF, a MEM, and T, either the type of X or the expression
+ corresponding to REF, set the memory attributes. OBJECTP is nonzero
+ if we are making a new object of this type. BITPOS is nonzero if
+ there is an offset outstanding on T that will be applied later. */
+
+void
+set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
+ HOST_WIDE_INT bitpos)
+{
+ HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
+ tree expr = MEM_EXPR (ref);
+ rtx offset = MEM_OFFSET (ref);
+ rtx size = MEM_SIZE (ref);
+ unsigned int align = MEM_ALIGN (ref);
+ HOST_WIDE_INT apply_bitpos = 0;
+ tree type;
+
+ /* It can happen that type_for_mode was given a mode for which there
+ is no language-level type. In which case it returns NULL, which
+ we can see here. */
+ if (t == NULL_TREE)
+ return;
+
+ type = TYPE_P (t) ? t : TREE_TYPE (t);
+ if (type == error_mark_node)
+ return;
+
+ /* If we have already set DECL_RTL = ref, get_alias_set will get the
+ wrong answer, as it assumes that DECL_RTL already has the right alias
+ info. Callers should not set DECL_RTL until after the call to
+ set_mem_attributes. */
+ if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
+ abort ();
+
+ /* Get the alias set from the expression or type (perhaps using a
+ front-end routine) and use it. */
+ alias = get_alias_set (t);
+
+ MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
+ MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
+ RTX_UNCHANGING_P (ref)
+ |= ((lang_hooks.honor_readonly
+ && (TYPE_READONLY (type) || (t != type && TREE_READONLY (t))))
+ || (! TYPE_P (t) && TREE_CONSTANT (t)));
+ MEM_POINTER (ref) = POINTER_TYPE_P (type);
+
+ /* If we are making an object of this type, or if this is a DECL, we know
+ that it is a scalar if the type is not an aggregate. */
+ if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
+ MEM_SCALAR_P (ref) = 1;
+
+ /* We can set the alignment from the type if we are making an object,
+ this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
+ if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
+ align = MAX (align, TYPE_ALIGN (type));
+
+ /* If the size is known, we can set that. */
+ if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
+ size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
+
+ /* If T is not a type, we may be able to deduce some more information about
+ the expression. */
+ if (! TYPE_P (t))
+ {
+ maybe_set_unchanging (ref, t);
+ if (TREE_THIS_VOLATILE (t))
+ MEM_VOLATILE_P (ref) = 1;
+
+ /* Now remove any conversions: they don't change what the underlying
+ object is. Likewise for SAVE_EXPR. */
+ while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
+ || TREE_CODE (t) == NON_LVALUE_EXPR
+ || TREE_CODE (t) == VIEW_CONVERT_EXPR
+ || TREE_CODE (t) == SAVE_EXPR)
+ t = TREE_OPERAND (t, 0);
+
+ /* If this expression can't be addressed (e.g., it contains a reference
+ to a non-addressable field), show we don't change its alias set. */
+ if (! can_address_p (t))
+ MEM_KEEP_ALIAS_SET_P (ref) = 1;
+
+ /* If this is a decl, set the attributes of the MEM from it. */
+ if (DECL_P (t))
+ {
+ expr = t;
+ offset = const0_rtx;
+ apply_bitpos = bitpos;
+ size = (DECL_SIZE_UNIT (t)
+ && host_integerp (DECL_SIZE_UNIT (t), 1)
+ ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
+ align = DECL_ALIGN (t);
+ }
+
+ /* If this is a constant, we know the alignment. */
+ else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
+ {
+ align = TYPE_ALIGN (type);
+#ifdef CONSTANT_ALIGNMENT
+ align = CONSTANT_ALIGNMENT (t, align);
+#endif
+ }
+
+ /* If this is a field reference and not a bit-field, record it. */
+ /* ??? There is some information that can be gleened from bit-fields,
+ such as the word offset in the structure that might be modified.
+ But skip it for now. */
+ else if (TREE_CODE (t) == COMPONENT_REF
+ && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
+ {
+ expr = component_ref_for_mem_expr (t);
+ offset = const0_rtx;
+ apply_bitpos = bitpos;
+ /* ??? Any reason the field size would be different than
+ the size we got from the type? */
+ }
+
+ /* If this is an array reference, look for an outer field reference. */
+ else if (TREE_CODE (t) == ARRAY_REF)
+ {
+ tree off_tree = size_zero_node;
+ /* We can't modify t, because we use it at the end of the
+ function. */
+ tree t2 = t;
+
+ do
+ {
+ tree index = TREE_OPERAND (t2, 1);
+ tree array = TREE_OPERAND (t2, 0);
+ tree domain = TYPE_DOMAIN (TREE_TYPE (array));
+ tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
+ tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
+
+ /* We assume all arrays have sizes that are a multiple of a byte.
+ First subtract the lower bound, if any, in the type of the
+ index, then convert to sizetype and multiply by the size of the
+ array element. */
+ if (low_bound != 0 && ! integer_zerop (low_bound))
+ index = fold (build (MINUS_EXPR, TREE_TYPE (index),
+ index, low_bound));
+
+ /* If the index has a self-referential type, instantiate it;
+ likewise for the component size. */
+ index = SUBSTITUTE_PLACEHOLDER_IN_EXPR (index, t2);
+ unit_size = SUBSTITUTE_PLACEHOLDER_IN_EXPR (unit_size, array);
+ off_tree
+ = fold (build (PLUS_EXPR, sizetype,
+ fold (build (MULT_EXPR, sizetype,
+ index, unit_size)),
+ off_tree));
+ t2 = TREE_OPERAND (t2, 0);
+ }
+ while (TREE_CODE (t2) == ARRAY_REF);
+
+ if (DECL_P (t2))
+ {
+ expr = t2;
+ offset = NULL;
+ if (host_integerp (off_tree, 1))
+ {
+ HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
+ HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
+ align = DECL_ALIGN (t2);
+ if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
+ align = aoff;
+ offset = GEN_INT (ioff);
+ apply_bitpos = bitpos;
+ }
+ }
+ else if (TREE_CODE (t2) == COMPONENT_REF)
+ {
+ expr = component_ref_for_mem_expr (t2);
+ if (host_integerp (off_tree, 1))
+ {
+ offset = GEN_INT (tree_low_cst (off_tree, 1));
+ apply_bitpos = bitpos;
+ }
+ /* ??? Any reason the field size would be different than
+ the size we got from the type? */
+ }
+ else if (flag_argument_noalias > 1
+ && TREE_CODE (t2) == INDIRECT_REF
+ && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
+ {
+ expr = t2;
+ offset = NULL;
+ }
+ }
+
+ /* If this is a Fortran indirect argument reference, record the
+ parameter decl. */
+ else if (flag_argument_noalias > 1
+ && TREE_CODE (t) == INDIRECT_REF
+ && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
+ {
+ expr = t;
+ offset = NULL;
+ }
+ }
+
+ /* If we modified OFFSET based on T, then subtract the outstanding
+ bit position offset. Similarly, increase the size of the accessed
+ object to contain the negative offset. */
+ if (apply_bitpos)
+ {
+ offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
+ if (size)
+ size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
+ }
+
+ /* Now set the attributes we computed above. */
+ MEM_ATTRS (ref)
+ = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
+
+ /* If this is already known to be a scalar or aggregate, we are done. */
+ if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
+ return;
+
+ /* If it is a reference into an aggregate, this is part of an aggregate.
+ Otherwise we don't know. */
+ else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
+ || TREE_CODE (t) == ARRAY_RANGE_REF
+ || TREE_CODE (t) == BIT_FIELD_REF)
+ MEM_IN_STRUCT_P (ref) = 1;
+}
+
+void
+set_mem_attributes (rtx ref, tree t, int objectp)
+{
+ set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
+}
+
+/* Set the decl for MEM to DECL. */
+
+void
+set_mem_attrs_from_reg (rtx mem, rtx reg)
+{
+ MEM_ATTRS (mem)
+ = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
+ GEN_INT (REG_OFFSET (reg)),
+ MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
+}
+
+/* Set the alias set of MEM to SET. */
+
+void
+set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
+{
+#ifdef ENABLE_CHECKING
+ /* If the new and old alias sets don't conflict, something is wrong. */
+ if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
+ abort ();
+#endif
+
+ MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
+ MEM_SIZE (mem), MEM_ALIGN (mem),
+ GET_MODE (mem));
+}
+
+/* Set the alignment of MEM to ALIGN bits. */
+
+void
+set_mem_align (rtx mem, unsigned int align)
+{
+ MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
+ MEM_OFFSET (mem), MEM_SIZE (mem), align,
+ GET_MODE (mem));
+}
+
+/* Set the expr for MEM to EXPR. */
+
+void
+set_mem_expr (rtx mem, tree expr)
+{
+ MEM_ATTRS (mem)
+ = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
+ MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
+}
+
+/* Set the offset of MEM to OFFSET. */
+
+void
+set_mem_offset (rtx mem, rtx offset)
+{
+ MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
+ offset, MEM_SIZE (mem), MEM_ALIGN (mem),
+ GET_MODE (mem));
+}
+
+/* Set the size of MEM to SIZE. */
+
+void
+set_mem_size (rtx mem, rtx size)
+{
+ MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
+ MEM_OFFSET (mem), size, MEM_ALIGN (mem),
+ GET_MODE (mem));
+}
+\f
+/* Return a memory reference like MEMREF, but with its mode changed to MODE
+ and its address changed to ADDR. (VOIDmode means don't change the mode.
+ NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
+ returned memory location is required to be valid. The memory
+ attributes are not changed. */
+
+static rtx
+change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
{
rtx new;
mode = GET_MODE (memref);
if (addr == 0)
addr = XEXP (memref, 0);
+ if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
+ && (!validate || memory_address_p (mode, addr)))
+ return memref;
if (validate)
{
return new;
}
+/* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
+ way we are changing MEMREF, so we only preserve the alias set. */
+
+rtx
+change_address (rtx memref, enum machine_mode mode, rtx addr)
+{
+ rtx new = change_address_1 (memref, mode, addr, 1), size;
+ enum machine_mode mmode = GET_MODE (new);
+ unsigned int align;
+
+ size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
+ align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
+
+ /* If there are no changes, just return the original memory reference. */
+ if (new == memref)
+ {
+ if (MEM_ATTRS (memref) == 0
+ || (MEM_EXPR (memref) == NULL
+ && MEM_OFFSET (memref) == NULL
+ && MEM_SIZE (memref) == size
+ && MEM_ALIGN (memref) == align))
+ return new;
+
+ new = gen_rtx_MEM (mmode, XEXP (memref, 0));
+ MEM_COPY_ATTRIBUTES (new, memref);
+ }
+
+ MEM_ATTRS (new)
+ = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
+
+ return new;
+}
+
/* Return a memory reference like MEMREF, but with its mode changed
- to MODE and its address offset by OFFSET bytes. */
+ to MODE and its address offset by OFFSET bytes. If VALIDATE is
+ nonzero, the memory address is forced to be valid.
+ If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
+ and caller is responsible for adjusting MEMREF base register. */
rtx
-adjust_address (memref, mode, offset)
- rtx memref;
- enum machine_mode mode;
- HOST_WIDE_INT offset;
+adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
+ int validate, int adjust)
{
- /* For now, this is just a wrapper for change_address, but eventually
- will do memref tracking. */
rtx addr = XEXP (memref, 0);
+ rtx new;
+ rtx memoffset = MEM_OFFSET (memref);
+ rtx size = 0;
+ unsigned int memalign = MEM_ALIGN (memref);
+
+ /* If there are no changes, just return the original memory reference. */
+ if (mode == GET_MODE (memref) && !offset
+ && (!validate || memory_address_p (mode, addr)))
+ return memref;
- /* ??? Prefer to create garbage instead of creating shared rtl. */
+ /* ??? Prefer to create garbage instead of creating shared rtl.
+ This may happen even if offset is nonzero -- consider
+ (plus (plus reg reg) const_int) -- so do this always. */
addr = copy_rtx (addr);
- /* If MEMREF is a LO_SUM and the offset is within the alignment of the
- object, we can merge it into the LO_SUM. */
- if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
- && offset >= 0
- && (unsigned HOST_WIDE_INT) offset
- < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
- addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
- plus_constant (XEXP (addr, 1), offset));
- else
- addr = plus_constant (addr, offset);
+ if (adjust)
+ {
+ /* If MEMREF is a LO_SUM and the offset is within the alignment of the
+ object, we can merge it into the LO_SUM. */
+ if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
+ && offset >= 0
+ && (unsigned HOST_WIDE_INT) offset
+ < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
+ addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
+ plus_constant (XEXP (addr, 1), offset));
+ else
+ addr = plus_constant (addr, offset);
+ }
+
+ new = change_address_1 (memref, mode, addr, validate);
+
+ /* Compute the new values of the memory attributes due to this adjustment.
+ We add the offsets and update the alignment. */
+ if (memoffset)
+ memoffset = GEN_INT (offset + INTVAL (memoffset));
+
+ /* Compute the new alignment by taking the MIN of the alignment and the
+ lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
+ if zero. */
+ if (offset != 0)
+ memalign
+ = MIN (memalign,
+ (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
+
+ /* We can compute the size in a number of ways. */
+ if (GET_MODE (new) != BLKmode)
+ size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
+ else if (MEM_SIZE (memref))
+ size = plus_constant (MEM_SIZE (memref), -offset);
+
+ MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
+ memoffset, size, memalign, GET_MODE (new));
- return change_address (memref, mode, addr);
+ /* At some point, we should validate that this offset is within the object,
+ if all the appropriate values are known. */
+ return new;
}
-/* Likewise, but the reference is not required to be valid. */
+/* Return a memory reference like MEMREF, but with its mode changed
+ to MODE and its address changed to ADDR, which is assumed to be
+ MEMREF offseted by OFFSET bytes. If VALIDATE is
+ nonzero, the memory address is forced to be valid. */
rtx
-adjust_address_nv (memref, mode, offset)
- rtx memref;
- enum machine_mode mode;
- HOST_WIDE_INT offset;
+adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
+ HOST_WIDE_INT offset, int validate)
{
- /* For now, this is just a wrapper for change_address, but eventually
- will do memref tracking. */
- rtx addr = XEXP (memref, 0);
+ memref = change_address_1 (memref, VOIDmode, addr, validate);
+ return adjust_address_1 (memref, mode, offset, validate, 0);
+}
- /* If MEMREF is a LO_SUM and the offset is within the size of the
- object, we can merge it into the LO_SUM. */
- if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
- && offset >= 0
- && (unsigned HOST_WIDE_INT) offset
- < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
- addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
- plus_constant (XEXP (addr, 1), offset));
- else
- addr = plus_constant (addr, offset);
+/* Return a memory reference like MEMREF, but whose address is changed by
+ adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
+ known to be in OFFSET (possibly 1). */
- return change_address_1 (memref, mode, addr, 0);
+rtx
+offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
+{
+ rtx new, addr = XEXP (memref, 0);
+
+ new = simplify_gen_binary (PLUS, Pmode, addr, offset);
+
+ /* At this point we don't know _why_ the address is invalid. It
+ could have secondary memory references, multiplies or anything.
+
+ However, if we did go and rearrange things, we can wind up not
+ being able to recognize the magic around pic_offset_table_rtx.
+ This stuff is fragile, and is yet another example of why it is
+ bad to expose PIC machinery too early. */
+ if (! memory_address_p (GET_MODE (memref), new)
+ && GET_CODE (addr) == PLUS
+ && XEXP (addr, 0) == pic_offset_table_rtx)
+ {
+ addr = force_reg (GET_MODE (addr), addr);
+ new = simplify_gen_binary (PLUS, Pmode, addr, offset);
+ }
+
+ update_temp_slot_address (XEXP (memref, 0), new);
+ new = change_address_1 (memref, VOIDmode, new, 1);
+
+ /* If there are no changes, just return the original memory reference. */
+ if (new == memref)
+ return new;
+
+ /* Update the alignment to reflect the offset. Reset the offset, which
+ we don't know. */
+ MEM_ATTRS (new)
+ = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
+ MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
+ GET_MODE (new));
+ return new;
}
/* Return a memory reference like MEMREF, but with its address changed to
by putting something into a register. */
rtx
-replace_equiv_address (memref, addr)
- rtx memref;
- rtx addr;
+replace_equiv_address (rtx memref, rtx addr)
{
- /* For now, this is just a wrapper for change_address, but eventually
- will do memref tracking. */
- return change_address (memref, VOIDmode, addr);
+ /* change_address_1 copies the memory attribute structure without change
+ and that's exactly what we want here. */
+ update_temp_slot_address (XEXP (memref, 0), addr);
+ return change_address_1 (memref, VOIDmode, addr, 1);
}
+
/* Likewise, but the reference is not required to be valid. */
rtx
-replace_equiv_address_nv (memref, addr)
- rtx memref;
- rtx addr;
+replace_equiv_address_nv (rtx memref, rtx addr)
{
- /* For now, this is just a wrapper for change_address, but eventually
- will do memref tracking. */
return change_address_1 (memref, VOIDmode, addr, 0);
}
-\f
-/* Return a newly created CODE_LABEL rtx with a unique label number. */
+
+/* Return a memory reference like MEMREF, but with its mode widened to
+ MODE and offset by OFFSET. This would be used by targets that e.g.
+ cannot issue QImode memory operations and have to use SImode memory
+ operations plus masking logic. */
rtx
-gen_label_rtx ()
+widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
{
- register rtx label;
+ rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
+ tree expr = MEM_EXPR (new);
+ rtx memoffset = MEM_OFFSET (new);
+ unsigned int size = GET_MODE_SIZE (mode);
- label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
- NULL_RTX, label_num++, NULL, NULL);
+ /* If there are no changes, just return the original memory reference. */
+ if (new == memref)
+ return new;
- LABEL_NUSES (label) = 0;
- LABEL_ALTERNATE_NAME (label) = NULL;
- return label;
+ /* If we don't know what offset we were at within the expression, then
+ we can't know if we've overstepped the bounds. */
+ if (! memoffset)
+ expr = NULL_TREE;
+
+ while (expr)
+ {
+ if (TREE_CODE (expr) == COMPONENT_REF)
+ {
+ tree field = TREE_OPERAND (expr, 1);
+
+ if (! DECL_SIZE_UNIT (field))
+ {
+ expr = NULL_TREE;
+ break;
+ }
+
+ /* Is the field at least as large as the access? If so, ok,
+ otherwise strip back to the containing structure. */
+ if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
+ && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
+ && INTVAL (memoffset) >= 0)
+ break;
+
+ if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
+ {
+ expr = NULL_TREE;
+ break;
+ }
+
+ expr = TREE_OPERAND (expr, 0);
+ memoffset = (GEN_INT (INTVAL (memoffset)
+ + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
+ + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
+ / BITS_PER_UNIT)));
+ }
+ /* Similarly for the decl. */
+ else if (DECL_P (expr)
+ && DECL_SIZE_UNIT (expr)
+ && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
+ && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
+ && (! memoffset || INTVAL (memoffset) >= 0))
+ break;
+ else
+ {
+ /* The widened memory access overflows the expression, which means
+ that it could alias another expression. Zap it. */
+ expr = NULL_TREE;
+ break;
+ }
+ }
+
+ if (! expr)
+ memoffset = NULL_RTX;
+
+ /* The widened memory may alias other stuff, so zap the alias set. */
+ /* ??? Maybe use get_alias_set on any remaining expression. */
+
+ MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
+ MEM_ALIGN (new), mode);
+
+ return new;
+}
+\f
+/* Return a newly created CODE_LABEL rtx with a unique label number. */
+
+rtx
+gen_label_rtx (void)
+{
+ return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
+ NULL, label_num++, NULL);
}
\f
/* For procedure integration. */
Used for an inline-procedure after copying the insn chain. */
void
-set_new_first_and_last_insn (first, last)
- rtx first, last;
+set_new_first_and_last_insn (rtx first, rtx last)
{
rtx insn;
cur_insn_uid++;
}
-/* Set the range of label numbers found in the current function.
- This is used when belatedly compiling an inline function. */
-
-void
-set_new_first_and_last_label_num (first, last)
- int first, last;
-{
- base_label_num = label_num;
- first_label_num = first;
- last_label_num = last;
-}
-
/* Set the last label number found in the current function.
This is used when belatedly compiling an inline function. */
void
-set_new_last_label_num (last)
- int last;
+set_new_last_label_num (int last)
{
base_label_num = label_num;
last_label_num = last;
This is used after a nested function. */
void
-restore_emit_status (p)
- struct function *p ATTRIBUTE_UNUSED;
+restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
{
last_label_num = 0;
- clear_emit_caches ();
-}
-
-/* Clear out all parts of the state in F that can safely be discarded
- after the function has been compiled, to let garbage collection
- reclaim the memory. */
-
-void
-free_emit_status (f)
- struct function *f;
-{
- free (f->emit->x_regno_reg_rtx);
- free (f->emit->regno_pointer_align);
- free (f->emit);
- f->emit = NULL;
}
\f
/* Go through all the RTL insn bodies and copy any invalid shared
structure. This routine should only be called once. */
void
-unshare_all_rtl (fndecl, insn)
- tree fndecl;
- rtx insn;
+unshare_all_rtl (tree fndecl, rtx insn)
{
tree decl;
/* Make sure that virtual stack slots are not shared. */
unshare_all_decls (DECL_INITIAL (fndecl));
- /* Unshare just about everything else. */
- unshare_all_rtl_1 (insn);
+ /* Unshare just about everything else. */
+ unshare_all_rtl_in_chain (insn);
+
+ /* Make sure the addresses of stack slots found outside the insn chain
+ (such as, in DECL_RTL of a variable) are not shared
+ with the insn chain.
+
+ This special care is necessary when the stack slot MEM does not
+ actually appear in the insn chain. If it does appear, its address
+ is unshared from all else at that point. */
+ stack_slot_list = copy_rtx_if_shared (stack_slot_list);
+}
+
+/* Go through all the RTL insn bodies and copy any invalid shared
+ structure, again. This is a fairly expensive thing to do so it
+ should be done sparingly. */
+
+void
+unshare_all_rtl_again (rtx insn)
+{
+ rtx p;
+ tree decl;
+
+ for (p = insn; p; p = NEXT_INSN (p))
+ if (INSN_P (p))
+ {
+ reset_used_flags (PATTERN (p));
+ reset_used_flags (REG_NOTES (p));
+ reset_used_flags (LOG_LINKS (p));
+ }
+
+ /* Make sure that virtual stack slots are not shared. */
+ reset_used_decls (DECL_INITIAL (cfun->decl));
+
+ /* Make sure that virtual parameters are not shared. */
+ for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
+ reset_used_flags (DECL_RTL (decl));
+
+ reset_used_flags (stack_slot_list);
+
+ unshare_all_rtl (cfun->decl, insn);
+}
+
+/* Check that ORIG is not marked when it should not be and mark ORIG as in use,
+ Recursively does the same for subexpressions. */
+
+static void
+verify_rtx_sharing (rtx orig, rtx insn)
+{
+ rtx x = orig;
+ int i;
+ enum rtx_code code;
+ const char *format_ptr;
+
+ if (x == 0)
+ return;
+
+ code = GET_CODE (x);
+
+ /* These types may be freely shared. */
+
+ switch (code)
+ {
+ case REG:
+ case QUEUED:
+ case CONST_INT:
+ case CONST_DOUBLE:
+ case CONST_VECTOR:
+ case SYMBOL_REF:
+ case LABEL_REF:
+ case CODE_LABEL:
+ case PC:
+ case CC0:
+ case SCRATCH:
+ return;
+ /* SCRATCH must be shared because they represent distinct values. */
+ case CLOBBER:
+ if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
+ return;
+ break;
+
+ case CONST:
+ /* CONST can be shared if it contains a SYMBOL_REF. If it contains
+ a LABEL_REF, it isn't sharable. */
+ if (GET_CODE (XEXP (x, 0)) == PLUS
+ && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
+ && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
+ return;
+ break;
+
+ case MEM:
+ /* A MEM is allowed to be shared if its address is constant. */
+ if (CONSTANT_ADDRESS_P (XEXP (x, 0))
+ || reload_completed || reload_in_progress)
+ return;
+
+ break;
+
+ default:
+ break;
+ }
+
+ /* This rtx may not be shared. If it has already been seen,
+ replace it with a copy of itself. */
+
+ if (RTX_FLAG (x, used))
+ {
+ error ("Invalid rtl sharing found in the insn");
+ debug_rtx (insn);
+ error ("Shared rtx");
+ debug_rtx (x);
+ abort ();
+ }
+ RTX_FLAG (x, used) = 1;
+
+ /* Now scan the subexpressions recursively. */
+
+ format_ptr = GET_RTX_FORMAT (code);
+
+ for (i = 0; i < GET_RTX_LENGTH (code); i++)
+ {
+ switch (*format_ptr++)
+ {
+ case 'e':
+ verify_rtx_sharing (XEXP (x, i), insn);
+ break;
- /* Make sure the addresses of stack slots found outside the insn chain
- (such as, in DECL_RTL of a variable) are not shared
- with the insn chain.
+ case 'E':
+ if (XVEC (x, i) != NULL)
+ {
+ int j;
+ int len = XVECLEN (x, i);
- This special care is necessary when the stack slot MEM does not
- actually appear in the insn chain. If it does appear, its address
- is unshared from all else at that point. */
- stack_slot_list = copy_rtx_if_shared (stack_slot_list);
+ for (j = 0; j < len; j++)
+ {
+ /* We allow sharing of ASM_OPERANDS inside single instruction. */
+ if (j && GET_CODE (XVECEXP (x, i, j)) == SET
+ && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
+ verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
+ else
+ verify_rtx_sharing (XVECEXP (x, i, j), insn);
+ }
+ }
+ break;
+ }
+ }
+ return;
}
-/* Go through all the RTL insn bodies and copy any invalid shared
- structure, again. This is a fairly expensive thing to do so it
- should be done sparingly. */
+/* Go through all the RTL insn bodies and check that there is no unexpected
+ sharing in between the subexpressions. */
void
-unshare_all_rtl_again (insn)
- rtx insn;
+verify_rtl_sharing (void)
{
rtx p;
- tree decl;
- for (p = insn; p; p = NEXT_INSN (p))
+ for (p = get_insns (); p; p = NEXT_INSN (p))
if (INSN_P (p))
{
reset_used_flags (PATTERN (p));
reset_used_flags (LOG_LINKS (p));
}
- /* Make sure that virtual stack slots are not shared. */
- reset_used_decls (DECL_INITIAL (cfun->decl));
-
- /* Make sure that virtual parameters are not shared. */
- for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
- reset_used_flags (DECL_RTL (decl));
-
- reset_used_flags (stack_slot_list);
-
- unshare_all_rtl (cfun->decl, insn);
+ for (p = get_insns (); p; p = NEXT_INSN (p))
+ if (INSN_P (p))
+ {
+ verify_rtx_sharing (PATTERN (p), p);
+ verify_rtx_sharing (REG_NOTES (p), p);
+ verify_rtx_sharing (LOG_LINKS (p), p);
+ }
}
/* Go through all the RTL insn bodies and copy any invalid shared structure.
Assumes the mark bits are cleared at entry. */
-static void
-unshare_all_rtl_1 (insn)
- rtx insn;
+void
+unshare_all_rtl_in_chain (rtx insn)
{
for (; insn; insn = NEXT_INSN (insn))
if (INSN_P (insn))
/* Go through all virtual stack slots of a function and copy any
shared structure. */
static void
-unshare_all_decls (blk)
- tree blk;
+unshare_all_decls (tree blk)
{
tree t;
/* Go through all virtual stack slots of a function and mark them as
not shared. */
static void
-reset_used_decls (blk)
- tree blk;
+reset_used_decls (tree blk)
{
tree t;
reset_used_decls (t);
}
+/* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
+ placed in the result directly, rather than being copied. MAY_SHARE is
+ either a MEM of an EXPR_LIST of MEMs. */
+
+rtx
+copy_most_rtx (rtx orig, rtx may_share)
+{
+ rtx copy;
+ int i, j;
+ RTX_CODE code;
+ const char *format_ptr;
+
+ if (orig == may_share
+ || (GET_CODE (may_share) == EXPR_LIST
+ && in_expr_list_p (may_share, orig)))
+ return orig;
+
+ code = GET_CODE (orig);
+
+ switch (code)
+ {
+ case REG:
+ case QUEUED:
+ case CONST_INT:
+ case CONST_DOUBLE:
+ case CONST_VECTOR:
+ case SYMBOL_REF:
+ case CODE_LABEL:
+ case PC:
+ case CC0:
+ return orig;
+ default:
+ break;
+ }
+
+ copy = rtx_alloc (code);
+ PUT_MODE (copy, GET_MODE (orig));
+ RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
+ RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
+ RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
+ RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
+ RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
+
+ format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
+
+ for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
+ {
+ switch (*format_ptr++)
+ {
+ case 'e':
+ XEXP (copy, i) = XEXP (orig, i);
+ if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
+ XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
+ break;
+
+ case 'u':
+ XEXP (copy, i) = XEXP (orig, i);
+ break;
+
+ case 'E':
+ case 'V':
+ XVEC (copy, i) = XVEC (orig, i);
+ if (XVEC (orig, i) != NULL)
+ {
+ XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
+ for (j = 0; j < XVECLEN (copy, i); j++)
+ XVECEXP (copy, i, j)
+ = copy_most_rtx (XVECEXP (orig, i, j), may_share);
+ }
+ break;
+
+ case 'w':
+ XWINT (copy, i) = XWINT (orig, i);
+ break;
+
+ case 'n':
+ case 'i':
+ XINT (copy, i) = XINT (orig, i);
+ break;
+
+ case 't':
+ XTREE (copy, i) = XTREE (orig, i);
+ break;
+
+ case 's':
+ case 'S':
+ XSTR (copy, i) = XSTR (orig, i);
+ break;
+
+ case '0':
+ X0ANY (copy, i) = X0ANY (orig, i);
+ break;
+
+ default:
+ abort ();
+ }
+ }
+ return copy;
+}
+
/* Mark ORIG as in use, and return a copy of it if it was already in use.
- Recursively does the same for subexpressions. */
+ Recursively does the same for subexpressions. Uses
+ copy_rtx_if_shared_1 to reduce stack space. */
rtx
-copy_rtx_if_shared (orig)
- rtx orig;
+copy_rtx_if_shared (rtx orig)
+{
+ copy_rtx_if_shared_1 (&orig);
+ return orig;
+}
+
+/* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
+ use. Recursively does the same for subexpressions. */
+
+static void
+copy_rtx_if_shared_1 (rtx *orig1)
{
- register rtx x = orig;
- register int i;
- register enum rtx_code code;
- register const char *format_ptr;
+ rtx x;
+ int i;
+ enum rtx_code code;
+ rtx *last_ptr;
+ const char *format_ptr;
int copied = 0;
+ int length;
+
+ /* Repeat is used to turn tail-recursion into iteration. */
+repeat:
+ x = *orig1;
if (x == 0)
- return 0;
+ return;
code = GET_CODE (x);
case QUEUED:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case SYMBOL_REF:
+ case LABEL_REF:
case CODE_LABEL:
case PC:
case CC0:
case SCRATCH:
/* SCRATCH must be shared because they represent distinct values. */
- return x;
+ return;
+ case CLOBBER:
+ if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
+ return;
+ break;
case CONST:
/* CONST can be shared if it contains a SYMBOL_REF. If it contains
if (GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
- return x;
+ return;
break;
case INSN:
case NOTE:
case BARRIER:
/* The chain of insns is not being copied. */
- return x;
-
- case MEM:
- /* A MEM is allowed to be shared if its address is constant.
-
- We used to allow sharing of MEMs which referenced
- virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
- that can lose. instantiate_virtual_regs will not unshare
- the MEMs, and combine may change the structure of the address
- because it looks safe and profitable in one context, but
- in some other context it creates unrecognizable RTL. */
- if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
- return x;
-
- break;
+ return;
default:
break;
/* This rtx may not be shared. If it has already been seen,
replace it with a copy of itself. */
- if (x->used)
+ if (RTX_FLAG (x, used))
{
- register rtx copy;
+ rtx copy;
copy = rtx_alloc (code);
- memcpy (copy, x,
- (sizeof (*copy) - sizeof (copy->fld)
- + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
+ memcpy (copy, x, RTX_SIZE (code));
x = copy;
copied = 1;
}
- x->used = 1;
+ RTX_FLAG (x, used) = 1;
/* Now scan the subexpressions recursively.
We can store any replaced subexpressions directly into X
must be copied if X was copied. */
format_ptr = GET_RTX_FORMAT (code);
-
- for (i = 0; i < GET_RTX_LENGTH (code); i++)
+ length = GET_RTX_LENGTH (code);
+ last_ptr = NULL;
+
+ for (i = 0; i < length; i++)
{
switch (*format_ptr++)
{
case 'e':
- XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
+ if (last_ptr)
+ copy_rtx_if_shared_1 (last_ptr);
+ last_ptr = &XEXP (x, i);
break;
case 'E':
if (XVEC (x, i) != NULL)
{
- register int j;
+ int j;
int len = XVECLEN (x, i);
-
+
+ /* Copy the vector iff I copied the rtx and the length
+ is nonzero. */
if (copied && len > 0)
XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
+
+ /* Call recursively on all inside the vector. */
for (j = 0; j < len; j++)
- XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
+ {
+ if (last_ptr)
+ copy_rtx_if_shared_1 (last_ptr);
+ last_ptr = &XVECEXP (x, i, j);
+ }
}
break;
}
}
- return x;
+ *orig1 = x;
+ if (last_ptr)
+ {
+ orig1 = last_ptr;
+ goto repeat;
+ }
+ return;
}
/* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
to look for shared sub-parts. */
void
-reset_used_flags (x)
- rtx x;
+reset_used_flags (rtx x)
{
- register int i, j;
- register enum rtx_code code;
- register const char *format_ptr;
+ int i, j;
+ enum rtx_code code;
+ const char *format_ptr;
+ int length;
+ /* Repeat is used to turn tail-recursion into iteration. */
+repeat:
if (x == 0)
return;
case QUEUED:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case SYMBOL_REF:
case CODE_LABEL:
case PC:
break;
}
- x->used = 0;
+ RTX_FLAG (x, used) = 0;
format_ptr = GET_RTX_FORMAT (code);
- for (i = 0; i < GET_RTX_LENGTH (code); i++)
+ length = GET_RTX_LENGTH (code);
+
+ for (i = 0; i < length; i++)
{
switch (*format_ptr++)
{
case 'e':
+ if (i == length-1)
+ {
+ x = XEXP (x, i);
+ goto repeat;
+ }
reset_used_flags (XEXP (x, i));
break;
}
}
}
+
+/* Set all the USED bits in X to allow copy_rtx_if_shared to be used
+ to look for shared sub-parts. */
+
+void
+set_used_flags (rtx x)
+{
+ int i, j;
+ enum rtx_code code;
+ const char *format_ptr;
+
+ if (x == 0)
+ return;
+
+ code = GET_CODE (x);
+
+ /* These types may be freely shared so we needn't do any resetting
+ for them. */
+
+ switch (code)
+ {
+ case REG:
+ case QUEUED:
+ case CONST_INT:
+ case CONST_DOUBLE:
+ case CONST_VECTOR:
+ case SYMBOL_REF:
+ case CODE_LABEL:
+ case PC:
+ case CC0:
+ return;
+
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case NOTE:
+ case LABEL_REF:
+ case BARRIER:
+ /* The chain of insns is not being copied. */
+ return;
+
+ default:
+ break;
+ }
+
+ RTX_FLAG (x, used) = 1;
+
+ format_ptr = GET_RTX_FORMAT (code);
+ for (i = 0; i < GET_RTX_LENGTH (code); i++)
+ {
+ switch (*format_ptr++)
+ {
+ case 'e':
+ set_used_flags (XEXP (x, i));
+ break;
+
+ case 'E':
+ for (j = 0; j < XVECLEN (x, i); j++)
+ set_used_flags (XVECEXP (x, i, j));
+ break;
+ }
+ }
+}
\f
/* Copy X if necessary so that it won't be altered by changes in OTHER.
Return X or the rtx for the pseudo reg the value of X was copied into.
OTHER must be valid as a SET_DEST. */
rtx
-make_safe_from (x, other)
- rtx x, other;
+make_safe_from (rtx x, rtx other)
{
while (1)
switch (GET_CODE (other))
/* Return the first insn of the current sequence or current function. */
rtx
-get_insns ()
+get_insns (void)
{
return first_insn;
}
+/* Specify a new insn as the first in the chain. */
+
+void
+set_first_insn (rtx insn)
+{
+ if (PREV_INSN (insn) != 0)
+ abort ();
+ first_insn = insn;
+}
+
/* Return the last insn emitted in current sequence or current function. */
rtx
-get_last_insn ()
+get_last_insn (void)
{
return last_insn;
}
/* Specify a new insn as the last in the chain. */
void
-set_last_insn (insn)
- rtx insn;
+set_last_insn (rtx insn)
{
if (NEXT_INSN (insn) != 0)
abort ();
/* Return the last insn emitted, even if it is in a sequence now pushed. */
rtx
-get_last_insn_anywhere ()
+get_last_insn_anywhere (void)
{
struct sequence_stack *stack;
if (last_insn)
return 0;
}
+/* Return the first nonnote insn emitted in current sequence or current
+ function. This routine looks inside SEQUENCEs. */
+
+rtx
+get_first_nonnote_insn (void)
+{
+ rtx insn = first_insn;
+
+ while (insn)
+ {
+ insn = next_insn (insn);
+ if (insn == 0 || GET_CODE (insn) != NOTE)
+ break;
+ }
+
+ return insn;
+}
+
+/* Return the last nonnote insn emitted in current sequence or current
+ function. This routine looks inside SEQUENCEs. */
+
+rtx
+get_last_nonnote_insn (void)
+{
+ rtx insn = last_insn;
+
+ while (insn)
+ {
+ insn = previous_insn (insn);
+ if (insn == 0 || GET_CODE (insn) != NOTE)
+ break;
+ }
+
+ return insn;
+}
+
/* Return a number larger than any instruction's uid in this function. */
int
-get_max_uid ()
+get_max_uid (void)
{
return cur_insn_uid;
}
/* Renumber instructions so that no instruction UIDs are wasted. */
void
-renumber_insns (stream)
- FILE *stream;
+renumber_insns (FILE *stream)
{
rtx insn;
of the sequence. */
rtx
-next_insn (insn)
- rtx insn;
+next_insn (rtx insn)
{
if (insn)
{
of the sequence. */
rtx
-previous_insn (insn)
- rtx insn;
+previous_insn (rtx insn)
{
if (insn)
{
look inside SEQUENCEs. */
rtx
-next_nonnote_insn (insn)
- rtx insn;
+next_nonnote_insn (rtx insn)
{
while (insn)
{
not look inside SEQUENCEs. */
rtx
-prev_nonnote_insn (insn)
- rtx insn;
+prev_nonnote_insn (rtx insn)
{
while (insn)
{
SEQUENCEs. */
rtx
-next_real_insn (insn)
- rtx insn;
+next_real_insn (rtx insn)
{
while (insn)
{
SEQUENCEs. */
rtx
-prev_real_insn (insn)
- rtx insn;
+prev_real_insn (rtx insn)
{
while (insn)
{
return insn;
}
+/* Return the last CALL_INSN in the current list, or 0 if there is none.
+ This routine does not look inside SEQUENCEs. */
+
+rtx
+last_call_insn (void)
+{
+ rtx insn;
+
+ for (insn = get_last_insn ();
+ insn && GET_CODE (insn) != CALL_INSN;
+ insn = PREV_INSN (insn))
+ ;
+
+ return insn;
+}
+
/* Find the next insn after INSN that really does something. This routine
does not look inside SEQUENCEs. Until reload has completed, this is the
same as next_real_insn. */
int
-active_insn_p (insn)
- rtx insn;
+active_insn_p (rtx insn)
{
return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
|| (GET_CODE (insn) == INSN
}
rtx
-next_active_insn (insn)
- rtx insn;
+next_active_insn (rtx insn)
{
while (insn)
{
same as prev_real_insn. */
rtx
-prev_active_insn (insn)
- rtx insn;
+prev_active_insn (rtx insn)
{
while (insn)
{
/* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
rtx
-next_label (insn)
- rtx insn;
+next_label (rtx insn)
{
while (insn)
{
/* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
rtx
-prev_label (insn)
- rtx insn;
+prev_label (rtx insn)
{
while (insn)
{
and REG_CC_USER notes so we can find it. */
void
-link_cc0_insns (insn)
- rtx insn;
+link_cc0_insns (rtx insn)
{
rtx user = next_nonnote_insn (insn);
Return 0 if we can't find the insn. */
rtx
-next_cc0_user (insn)
- rtx insn;
+next_cc0_user (rtx insn)
{
rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
note, it is the previous insn. */
rtx
-prev_cc0_setter (insn)
- rtx insn;
+prev_cc0_setter (rtx insn)
{
rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
/* Increment the label uses for all labels present in rtx. */
static void
-mark_label_nuses(x)
- rtx x;
+mark_label_nuses (rtx x)
{
- register enum rtx_code code;
- register int i, j;
- register const char *fmt;
+ enum rtx_code code;
+ int i, j;
+ const char *fmt;
code = GET_CODE (x);
- if (code == LABEL_REF)
+ if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
LABEL_NUSES (XEXP (x, 0))++;
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
- mark_label_nuses (XEXP (x, i));
+ mark_label_nuses (XEXP (x, i));
else if (fmt[i] == 'E')
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+ for (j = XVECLEN (x, i) - 1; j >= 0; j--)
mark_label_nuses (XVECEXP (x, i, j));
}
}
/* Try splitting insns that can be split for better scheduling.
PAT is the pattern which might split.
TRIAL is the insn providing PAT.
- LAST is non-zero if we should return the last insn of the sequence produced.
+ LAST is nonzero if we should return the last insn of the sequence produced.
If this routine succeeds in splitting, it returns the first or last
replacement insn depending on the value of LAST. Otherwise, it
returns TRIAL. If the insn to be returned can be split, it will be. */
rtx
-try_split (pat, trial, last)
- rtx pat, trial;
- int last;
+try_split (rtx pat, rtx trial, int last)
{
rtx before = PREV_INSN (trial);
rtx after = NEXT_INSN (trial);
rtx tem;
rtx note, seq;
int probability;
+ rtx insn_last, insn;
+ int njumps = 0;
if (any_condjump_p (trial)
&& (note = find_reg_note (trial, REG_BR_PROB, 0)))
after = NEXT_INSN (after);
}
- if (seq)
+ if (!seq)
+ return trial;
+
+ /* Avoid infinite loop if any insn of the result matches
+ the original pattern. */
+ insn_last = seq;
+ while (1)
+ {
+ if (INSN_P (insn_last)
+ && rtx_equal_p (PATTERN (insn_last), pat))
+ return trial;
+ if (!NEXT_INSN (insn_last))
+ break;
+ insn_last = NEXT_INSN (insn_last);
+ }
+
+ /* Mark labels. */
+ for (insn = insn_last; insn ; insn = PREV_INSN (insn))
+ {
+ if (GET_CODE (insn) == JUMP_INSN)
+ {
+ mark_jump_label (PATTERN (insn), insn, 0);
+ njumps++;
+ if (probability != -1
+ && any_condjump_p (insn)
+ && !find_reg_note (insn, REG_BR_PROB, 0))
+ {
+ /* We can preserve the REG_BR_PROB notes only if exactly
+ one jump is created, otherwise the machine description
+ is responsible for this step using
+ split_branch_probability variable. */
+ if (njumps != 1)
+ abort ();
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_BR_PROB,
+ GEN_INT (probability),
+ REG_NOTES (insn));
+ }
+ }
+ }
+
+ /* If we are splitting a CALL_INSN, look for the CALL_INSN
+ in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
+ if (GET_CODE (trial) == CALL_INSN)
+ {
+ for (insn = insn_last; insn ; insn = PREV_INSN (insn))
+ if (GET_CODE (insn) == CALL_INSN)
+ {
+ rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
+ while (*p)
+ p = &XEXP (*p, 1);
+ *p = CALL_INSN_FUNCTION_USAGE (trial);
+ SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
+ }
+ }
+
+ /* Copy notes, particularly those related to the CFG. */
+ for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
{
- /* SEQ can either be a SEQUENCE or the pattern of a single insn.
- The latter case will normally arise only when being done so that
- it, in turn, will be split (SFmode on the 29k is an example). */
- if (GET_CODE (seq) == SEQUENCE)
+ switch (REG_NOTE_KIND (note))
{
- int i, njumps = 0;
- rtx eh_note;
-
- /* Avoid infinite loop if any insn of the result matches
- the original pattern. */
- for (i = 0; i < XVECLEN (seq, 0); i++)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
- && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
- return trial;
-
- /* Mark labels. */
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
- {
- rtx insn = XVECEXP (seq, 0, i);
- mark_jump_label (PATTERN (insn),
- XVECEXP (seq, 0, i), 0);
- njumps++;
- if (probability != -1
- && any_condjump_p (insn)
- && !find_reg_note (insn, REG_BR_PROB, 0))
- {
- /* We can preserve the REG_BR_PROB notes only if exactly
- one jump is created, otherwise the machinde description
- is responsible for this step using
- split_branch_probability variable. */
- if (njumps != 1)
- abort ();
- REG_NOTES (insn)
- = gen_rtx_EXPR_LIST (REG_BR_PROB,
- GEN_INT (probability),
- REG_NOTES (insn));
- }
- }
- /* If we are splitting a CALL_INSN, look for the CALL_INSN
- in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
- if (GET_CODE (trial) == CALL_INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
- CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
- = CALL_INSN_FUNCTION_USAGE (trial);
-
- /* Copy EH notes. */
- if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
- for (i = 0; i < XVECLEN (seq, 0); i++)
- {
- rtx insn = XVECEXP (seq, 0, i);
- if (GET_CODE (insn) == CALL_INSN
- || (flag_non_call_exceptions
- && may_trap_p (PATTERN (insn))))
- REG_NOTES (insn)
- = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
- REG_NOTES (insn));
- }
-
- /* If there are LABELS inside the split insns increment the
- usage count so we don't delete the label. */
- if (GET_CODE (trial) == INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
- mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
-
- tem = emit_insn_after (seq, before);
-
- delete_insn (trial);
- if (has_barrier)
- emit_barrier_after (tem);
-
- /* Recursively call try_split for each new insn created; by the
- time control returns here that insn will be fully split, so
- set LAST and continue from the insn after the one returned.
- We can't use next_active_insn here since AFTER may be a note.
- Ignore deleted insns, which can be occur if not optimizing. */
- for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
- if (! INSN_DELETED_P (tem) && INSN_P (tem))
- tem = try_split (PATTERN (tem), tem, 1);
+ case REG_EH_REGION:
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == CALL_INSN
+ || (flag_non_call_exceptions
+ && may_trap_p (PATTERN (insn))))
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_EH_REGION,
+ XEXP (note, 0),
+ REG_NOTES (insn));
+ insn = PREV_INSN (insn);
+ }
+ break;
+
+ case REG_NORETURN:
+ case REG_SETJMP:
+ case REG_ALWAYS_RETURN:
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == CALL_INSN)
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
+ XEXP (note, 0),
+ REG_NOTES (insn));
+ insn = PREV_INSN (insn);
+ }
+ break;
+
+ case REG_NON_LOCAL_GOTO:
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == JUMP_INSN)
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
+ XEXP (note, 0),
+ REG_NOTES (insn));
+ insn = PREV_INSN (insn);
+ }
+ break;
+
+ default:
+ break;
}
- /* Avoid infinite loop if the result matches the original pattern. */
- else if (rtx_equal_p (seq, pat))
- return trial;
- else
+ }
+
+ /* If there are LABELS inside the split insns increment the
+ usage count so we don't delete the label. */
+ if (GET_CODE (trial) == INSN)
+ {
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- PATTERN (trial) = seq;
- INSN_CODE (trial) = -1;
- try_split (seq, trial, last);
- }
+ if (GET_CODE (insn) == INSN)
+ mark_label_nuses (PATTERN (insn));
- /* Return either the first or the last insn, depending on which was
- requested. */
- return last
- ? (after ? PREV_INSN (after) : last_insn)
- : NEXT_INSN (before);
+ insn = PREV_INSN (insn);
+ }
}
- return trial;
+ tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
+
+ delete_insn (trial);
+ if (has_barrier)
+ emit_barrier_after (tem);
+
+ /* Recursively call try_split for each new insn created; by the
+ time control returns here that insn will be fully split, so
+ set LAST and continue from the insn after the one returned.
+ We can't use next_active_insn here since AFTER may be a note.
+ Ignore deleted insns, which can be occur if not optimizing. */
+ for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
+ if (! INSN_DELETED_P (tem) && INSN_P (tem))
+ tem = try_split (PATTERN (tem), tem, 1);
+
+ /* Return either the first or the last insn, depending on which was
+ requested. */
+ return last
+ ? (after ? PREV_INSN (after) : last_insn)
+ : NEXT_INSN (before);
}
\f
/* Make and return an INSN rtx, initializing all its slots.
Store PATTERN in the pattern slots. */
rtx
-make_insn_raw (pattern)
- rtx pattern;
+make_insn_raw (rtx pattern)
{
- register rtx insn;
+ rtx insn;
insn = rtx_alloc (INSN);
INSN_CODE (insn) = -1;
LOG_LINKS (insn) = NULL;
REG_NOTES (insn) = NULL;
+ INSN_LOCATOR (insn) = 0;
+ BLOCK_FOR_INSN (insn) = NULL;
#ifdef ENABLE_RTL_CHECKING
if (insn
return insn;
}
-/* Like `make_insn' but make a JUMP_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
static rtx
-make_jump_insn_raw (pattern)
- rtx pattern;
+make_jump_insn_raw (rtx pattern)
{
- register rtx insn;
+ rtx insn;
insn = rtx_alloc (JUMP_INSN);
INSN_UID (insn) = cur_insn_uid++;
LOG_LINKS (insn) = NULL;
REG_NOTES (insn) = NULL;
JUMP_LABEL (insn) = NULL;
+ INSN_LOCATOR (insn) = 0;
+ BLOCK_FOR_INSN (insn) = NULL;
return insn;
}
-/* Like `make_insn' but make a CALL_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
static rtx
-make_call_insn_raw (pattern)
- rtx pattern;
+make_call_insn_raw (rtx pattern)
{
- register rtx insn;
+ rtx insn;
insn = rtx_alloc (CALL_INSN);
INSN_UID (insn) = cur_insn_uid++;
LOG_LINKS (insn) = NULL;
REG_NOTES (insn) = NULL;
CALL_INSN_FUNCTION_USAGE (insn) = NULL;
+ INSN_LOCATOR (insn) = 0;
+ BLOCK_FOR_INSN (insn) = NULL;
return insn;
}
INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
void
-add_insn (insn)
- register rtx insn;
+add_insn (rtx insn)
{
PREV_INSN (insn) = last_insn;
NEXT_INSN (insn) = 0;
SEQUENCE. */
void
-add_insn_after (insn, after)
- rtx insn, after;
+add_insn_after (rtx insn, rtx after)
{
rtx next = NEXT_INSN (after);
+ basic_block bb;
if (optimize && INSN_DELETED_P (after))
abort ();
abort ();
}
+ if (GET_CODE (after) != BARRIER
+ && GET_CODE (insn) != BARRIER
+ && (bb = BLOCK_FOR_INSN (after)))
+ {
+ set_block_for_insn (insn, bb);
+ if (INSN_P (insn))
+ bb->flags |= BB_DIRTY;
+ /* Should not happen as first in the BB is always
+ either NOTE or LABEL. */
+ if (BB_END (bb) == after
+ /* Avoid clobbering of structure when creating new BB. */
+ && GET_CODE (insn) != BARRIER
+ && (GET_CODE (insn) != NOTE
+ || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
+ BB_END (bb) = insn;
+ }
+
NEXT_INSN (after) = insn;
if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
{
SEQUENCE. */
void
-add_insn_before (insn, before)
- rtx insn, before;
+add_insn_before (rtx insn, rtx before)
{
rtx prev = PREV_INSN (before);
+ basic_block bb;
if (optimize && INSN_DELETED_P (before))
abort ();
abort ();
}
+ if (GET_CODE (before) != BARRIER
+ && GET_CODE (insn) != BARRIER
+ && (bb = BLOCK_FOR_INSN (before)))
+ {
+ set_block_for_insn (insn, bb);
+ if (INSN_P (insn))
+ bb->flags |= BB_DIRTY;
+ /* Should not happen as first in the BB is always
+ either NOTE or LABEl. */
+ if (BB_HEAD (bb) == insn
+ /* Avoid clobbering of structure when creating new BB. */
+ && GET_CODE (insn) != BARRIER
+ && (GET_CODE (insn) != NOTE
+ || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
+ abort ();
+ }
+
PREV_INSN (before) = insn;
if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
/* Remove an insn from its doubly-linked list. This function knows how
to handle sequences. */
void
-remove_insn (insn)
- rtx insn;
+remove_insn (rtx insn)
{
rtx next = NEXT_INSN (insn);
rtx prev = PREV_INSN (insn);
+ basic_block bb;
+
if (prev)
{
NEXT_INSN (prev) = next;
if (stack == 0)
abort ();
}
+ if (GET_CODE (insn) != BARRIER
+ && (bb = BLOCK_FOR_INSN (insn)))
+ {
+ if (INSN_P (insn))
+ bb->flags |= BB_DIRTY;
+ if (BB_HEAD (bb) == insn)
+ {
+ /* Never ever delete the basic block note without deleting whole
+ basic block. */
+ if (GET_CODE (insn) == NOTE)
+ abort ();
+ BB_HEAD (bb) = next;
+ }
+ if (BB_END (bb) == insn)
+ BB_END (bb) = prev;
+ }
+}
+
+/* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
+
+void
+add_function_usage_to (rtx call_insn, rtx call_fusage)
+{
+ if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
+ abort ();
+
+ /* Put the register usage information on the CALL. If there is already
+ some usage information, put ours at the end. */
+ if (CALL_INSN_FUNCTION_USAGE (call_insn))
+ {
+ rtx link;
+
+ for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
+ link = XEXP (link, 1))
+ ;
+
+ XEXP (link, 1) = call_fusage;
+ }
+ else
+ CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
}
/* Delete all insns made since FROM.
FROM becomes the new last instruction. */
void
-delete_insns_since (from)
- rtx from;
+delete_insns_since (rtx from)
{
if (from == 0)
first_insn = 0;
called after delay-slot filling has been done. */
void
-reorder_insns (from, to, after)
- rtx from, to, after;
+reorder_insns_nobb (rtx from, rtx to, rtx after)
{
/* Splice this bunch out of where it is now. */
if (PREV_INSN (from))
last_insn = to;
}
+/* Same as function above, but take care to update BB boundaries. */
+void
+reorder_insns (rtx from, rtx to, rtx after)
+{
+ rtx prev = PREV_INSN (from);
+ basic_block bb, bb2;
+
+ reorder_insns_nobb (from, to, after);
+
+ if (GET_CODE (after) != BARRIER
+ && (bb = BLOCK_FOR_INSN (after)))
+ {
+ rtx x;
+ bb->flags |= BB_DIRTY;
+
+ if (GET_CODE (from) != BARRIER
+ && (bb2 = BLOCK_FOR_INSN (from)))
+ {
+ if (BB_END (bb2) == to)
+ BB_END (bb2) = prev;
+ bb2->flags |= BB_DIRTY;
+ }
+
+ if (BB_END (bb) == after)
+ BB_END (bb) = to;
+
+ for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
+ set_block_for_insn (x, bb);
+ }
+}
+
/* Return the line note insn preceding INSN. */
static rtx
-find_line_note (insn)
- rtx insn;
+find_line_note (rtx insn)
{
if (no_line_numbers)
return 0;
for (; insn; insn = PREV_INSN (insn))
if (GET_CODE (insn) == NOTE
- && NOTE_LINE_NUMBER (insn) >= 0)
+ && NOTE_LINE_NUMBER (insn) >= 0)
break;
return insn;
}
-/* Like reorder_insns, but inserts line notes to preserve the line numbers
- of the moved insns when debugging. This may insert a note between AFTER
- and FROM, and another one after TO. */
-
-void
-reorder_insns_with_line_notes (from, to, after)
- rtx from, to, after;
-{
- rtx from_line = find_line_note (from);
- rtx after_line = find_line_note (after);
-
- reorder_insns (from, to, after);
-
- if (from_line == after_line)
- return;
-
- if (from_line)
- emit_line_note_after (NOTE_SOURCE_FILE (from_line),
- NOTE_LINE_NUMBER (from_line),
- after);
- if (after_line)
- emit_line_note_after (NOTE_SOURCE_FILE (after_line),
- NOTE_LINE_NUMBER (after_line),
- to);
-}
-
/* Remove unnecessary notes from the instruction stream. */
void
-remove_unnecessary_notes ()
+remove_unnecessary_notes (void)
{
rtx block_stack = NULL_RTX;
rtx eh_stack = NULL_RTX;
switch (NOTE_LINE_NUMBER (insn))
{
case NOTE_INSN_DELETED:
+ case NOTE_INSN_LOOP_END_TOP_COND:
remove_insn (insn);
break;
then there is no PC range in the generated code that will
actually be in this block, so there's no point in
remembering the existence of the block. */
- for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
+ for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
{
/* This block contains a real instruction. Note that we
don't include labels; if the only thing in the block
}
\f
-/* Emit an insn of given code and pattern
- at a specified place within the doubly-linked list. */
+/* Emit insn(s) of given code and pattern
+ at a specified place within the doubly-linked list.
-/* Make an instruction with body PATTERN
- and output it before the instruction BEFORE. */
+ All of the emit_foo global entry points accept an object
+ X which is either an insn list or a PATTERN of a single
+ instruction.
+
+ There are thus a few canonical ways to generate code and
+ emit it at a specific place in the instruction stream. For
+ example, consider the instruction named SPOT and the fact that
+ we would like to emit some instructions before SPOT. We might
+ do it like this:
+
+ start_sequence ();
+ ... emit the new instructions ...
+ insns_head = get_insns ();
+ end_sequence ();
+
+ emit_insn_before (insns_head, SPOT);
+
+ It used to be common to generate SEQUENCE rtl instead, but that
+ is a relic of the past which no longer occurs. The reason is that
+ SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
+ generated would almost certainly die right after it was created. */
+
+/* Make X be output before the instruction BEFORE. */
rtx
-emit_insn_before (pattern, before)
- register rtx pattern, before;
+emit_insn_before (rtx x, rtx before)
{
- register rtx insn = before;
+ rtx last = before;
+ rtx insn;
- if (GET_CODE (pattern) == SEQUENCE)
- {
- register int i;
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
- for (i = 0; i < XVECLEN (pattern, 0); i++)
+ if (x == NULL_RTX)
+ return last;
+
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
{
- insn = XVECEXP (pattern, 0, i);
+ rtx next = NEXT_INSN (insn);
add_insn_before (insn, before);
+ last = insn;
+ insn = next;
}
- }
- else
- {
- insn = make_insn_raw (pattern);
- add_insn_before (insn, before);
- }
+ break;
- return insn;
-}
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
-/* Similar to emit_insn_before, but update basic block boundaries as well. */
+ default:
+ last = make_insn_raw (x);
+ add_insn_before (last, before);
+ break;
+ }
-rtx
-emit_block_insn_before (pattern, before, block)
- rtx pattern, before;
- basic_block block;
-{
- rtx prev = PREV_INSN (before);
- rtx r = emit_insn_before (pattern, before);
- if (block && block->head == before)
- block->head = NEXT_INSN (prev);
- return r;
+ return last;
}
-/* Make an instruction with body PATTERN and code JUMP_INSN
+/* Make an instruction with body X and code JUMP_INSN
and output it before the instruction BEFORE. */
rtx
-emit_jump_insn_before (pattern, before)
- register rtx pattern, before;
+emit_jump_insn_before (rtx x, rtx before)
{
- register rtx insn;
+ rtx insn, last = NULL_RTX;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_jump_insn_raw (pattern);
- add_insn_before (insn, before);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
-/* Make an instruction with body PATTERN and code CALL_INSN
+/* Make an instruction with body X and code CALL_INSN
and output it before the instruction BEFORE. */
rtx
-emit_call_insn_before (pattern, before)
- register rtx pattern, before;
+emit_call_insn_before (rtx x, rtx before)
{
- register rtx insn;
+ rtx last = NULL_RTX, insn;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_call_insn_raw (pattern);
- add_insn_before (insn, before);
- PUT_CODE (insn, CALL_INSN);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
/* Make an insn of code BARRIER
and output it before the insn BEFORE. */
rtx
-emit_barrier_before (before)
- register rtx before;
+emit_barrier_before (rtx before)
{
- register rtx insn = rtx_alloc (BARRIER);
+ rtx insn = rtx_alloc (BARRIER);
INSN_UID (insn) = cur_insn_uid++;
/* Emit the label LABEL before the insn BEFORE. */
rtx
-emit_label_before (label, before)
- rtx label, before;
+emit_label_before (rtx label, rtx before)
{
/* This can be called twice for the same label as a result of the
confusion that follows a syntax error! So make it harmless. */
/* Emit a note of subtype SUBTYPE before the insn BEFORE. */
rtx
-emit_note_before (subtype, before)
- int subtype;
- rtx before;
+emit_note_before (int subtype, rtx before)
{
- register rtx note = rtx_alloc (NOTE);
+ rtx note = rtx_alloc (NOTE);
INSN_UID (note) = cur_insn_uid++;
NOTE_SOURCE_FILE (note) = 0;
NOTE_LINE_NUMBER (note) = subtype;
+ BLOCK_FOR_INSN (note) = NULL;
add_insn_before (note, before);
return note;
}
\f
-/* Make an insn of code INSN with body PATTERN
- and output it after the insn AFTER. */
+/* Helper for emit_insn_after, handles lists of instructions
+ efficiently. */
-rtx
-emit_insn_after (pattern, after)
- register rtx pattern, after;
+static rtx emit_insn_after_1 (rtx, rtx);
+
+static rtx
+emit_insn_after_1 (rtx first, rtx after)
{
- register rtx insn = after;
+ rtx last;
+ rtx after_after;
+ basic_block bb;
- if (GET_CODE (pattern) == SEQUENCE)
+ if (GET_CODE (after) != BARRIER
+ && (bb = BLOCK_FOR_INSN (after)))
{
- register int i;
-
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn_after (insn, after);
- after = insn;
- }
+ bb->flags |= BB_DIRTY;
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (BB_END (bb) == after)
+ BB_END (bb) = last;
}
else
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ continue;
+
+ after_after = NEXT_INSN (after);
+
+ NEXT_INSN (after) = first;
+ PREV_INSN (first) = after;
+ NEXT_INSN (last) = after_after;
+ if (after_after)
+ PREV_INSN (after_after) = last;
+
+ if (after == last_insn)
+ last_insn = last;
+ return last;
+}
+
+/* Make X be output after the insn AFTER. */
+
+rtx
+emit_insn_after (rtx x, rtx after)
+{
+ rtx last = after;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ if (x == NULL_RTX)
+ return last;
+
+ switch (GET_CODE (x))
{
- insn = make_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
}
/* Similar to emit_insn_after, except that line notes are to be inserted so
as to act as if this insn were at FROM. */
void
-emit_insn_after_with_line_notes (pattern, after, from)
- rtx pattern, after, from;
+emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
{
rtx from_line = find_line_note (from);
rtx after_line = find_line_note (after);
- rtx insn = emit_insn_after (pattern, after);
+ rtx insn = emit_insn_after (x, after);
if (from_line)
- emit_line_note_after (NOTE_SOURCE_FILE (from_line),
- NOTE_LINE_NUMBER (from_line),
- after);
+ emit_note_copy_after (from_line, after);
if (after_line)
- emit_line_note_after (NOTE_SOURCE_FILE (after_line),
- NOTE_LINE_NUMBER (after_line),
- insn);
+ emit_note_copy_after (after_line, insn);
}
-/* Similar to emit_insn_after, but update basic block boundaries as well. */
+/* Make an insn of code JUMP_INSN with body X
+ and output it after the insn AFTER. */
rtx
-emit_block_insn_after (pattern, after, block)
- rtx pattern, after;
- basic_block block;
+emit_jump_insn_after (rtx x, rtx after)
{
- rtx r = emit_insn_after (pattern, after);
- if (block && block->end == after)
- block->end = r;
- return r;
+ rtx last;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_after (last, after);
+ break;
+ }
+
+ return last;
}
-/* Make an insn of code JUMP_INSN with body PATTERN
- and output it after the insn AFTER. */
+/* Make an instruction with body X and code CALL_INSN
+ and output it after the instruction AFTER. */
rtx
-emit_jump_insn_after (pattern, after)
- register rtx pattern, after;
+emit_call_insn_after (rtx x, rtx after)
{
- register rtx insn;
+ rtx last;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_after (pattern, after);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_jump_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
}
/* Make an insn of code BARRIER
and output it after the insn AFTER. */
rtx
-emit_barrier_after (after)
- register rtx after;
+emit_barrier_after (rtx after)
{
- register rtx insn = rtx_alloc (BARRIER);
+ rtx insn = rtx_alloc (BARRIER);
INSN_UID (insn) = cur_insn_uid++;
/* Emit the label LABEL after the insn AFTER. */
rtx
-emit_label_after (label, after)
- rtx label, after;
+emit_label_after (rtx label, rtx after)
{
/* This can be called twice for the same label
as a result of the confusion that follows a syntax error!
/* Emit a note of subtype SUBTYPE after the insn AFTER. */
rtx
-emit_note_after (subtype, after)
- int subtype;
- rtx after;
+emit_note_after (int subtype, rtx after)
{
- register rtx note = rtx_alloc (NOTE);
+ rtx note = rtx_alloc (NOTE);
INSN_UID (note) = cur_insn_uid++;
NOTE_SOURCE_FILE (note) = 0;
NOTE_LINE_NUMBER (note) = subtype;
+ BLOCK_FOR_INSN (note) = NULL;
add_insn_after (note, after);
return note;
}
-/* Emit a line note for FILE and LINE after the insn AFTER. */
+/* Emit a copy of note ORIG after the insn AFTER. */
rtx
-emit_line_note_after (file, line, after)
- const char *file;
- int line;
- rtx after;
+emit_note_copy_after (rtx orig, rtx after)
{
- register rtx note;
+ rtx note;
- if (no_line_numbers && line > 0)
+ if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
{
cur_insn_uid++;
return 0;
}
- note = rtx_alloc (NOTE);
+ note = rtx_alloc (NOTE);
INSN_UID (note) = cur_insn_uid++;
- NOTE_SOURCE_FILE (note) = file;
- NOTE_LINE_NUMBER (note) = line;
+ NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
+ NOTE_DATA (note) = NOTE_DATA (orig);
+ BLOCK_FOR_INSN (note) = NULL;
add_insn_after (note, after);
return note;
}
\f
-/* Make an insn of code INSN with pattern PATTERN
- and add it to the end of the doubly-linked list.
- If PATTERN is a SEQUENCE, take the elements of it
- and emit an insn for each element.
+/* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
+rtx
+emit_insn_after_setloc (rtx pattern, rtx after, int loc)
+{
+ rtx last = emit_insn_after (pattern, after);
- Returns the last insn emitted. */
+ if (pattern == NULL_RTX)
+ return last;
+
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ if (active_insn_p (after))
+ INSN_LOCATOR (after) = loc;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
+ return last;
+}
+/* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
rtx
-emit_insn (pattern)
- rtx pattern;
+emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
{
- rtx insn = last_insn;
+ rtx last = emit_jump_insn_after (pattern, after);
- if (GET_CODE (pattern) == SEQUENCE)
- {
- register int i;
+ if (pattern == NULL_RTX)
+ return last;
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn (insn);
- }
- }
- else
+ after = NEXT_INSN (after);
+ while (1)
{
- insn = make_insn_raw (pattern);
- add_insn (insn);
+ if (active_insn_p (after))
+ INSN_LOCATOR (after) = loc;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
}
-
- return insn;
+ return last;
}
-/* Emit the insns in a chain starting with INSN.
- Return the last insn emitted. */
-
+/* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
rtx
-emit_insns (insn)
- rtx insn;
+emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
{
- rtx last = 0;
+ rtx last = emit_call_insn_after (pattern, after);
- while (insn)
+ if (pattern == NULL_RTX)
+ return last;
+
+ after = NEXT_INSN (after);
+ while (1)
{
- rtx next = NEXT_INSN (insn);
- add_insn (insn);
- last = insn;
- insn = next;
+ if (active_insn_p (after))
+ INSN_LOCATOR (after) = loc;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
}
-
return last;
}
-/* Emit the insns in a chain starting with INSN and place them in front of
- the insn BEFORE. Return the last insn emitted. */
-
+/* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
rtx
-emit_insns_before (insn, before)
- rtx insn;
- rtx before;
+emit_insn_before_setloc (rtx pattern, rtx before, int loc)
{
- rtx last = 0;
+ rtx first = PREV_INSN (before);
+ rtx last = emit_insn_before (pattern, before);
- while (insn)
+ if (pattern == NULL_RTX)
+ return last;
+
+ first = NEXT_INSN (first);
+ while (1)
{
- rtx next = NEXT_INSN (insn);
- add_insn_before (insn, before);
- last = insn;
- insn = next;
+ if (active_insn_p (first))
+ INSN_LOCATOR (first) = loc;
+ if (first == last)
+ break;
+ first = NEXT_INSN (first);
}
-
return last;
}
+\f
+/* Take X and emit it at the end of the doubly-linked
+ INSN list.
-/* Emit the insns in a chain starting with FIRST and place them in back of
- the insn AFTER. Return the last insn emitted. */
+ Returns the last insn emitted. */
rtx
-emit_insns_after (first, after)
- register rtx first;
- register rtx after;
+emit_insn (rtx x)
{
- register rtx last;
- register rtx after_after;
-
- if (!after)
- abort ();
+ rtx last = last_insn;
+ rtx insn;
- if (!first)
- return first;
+ if (x == NULL_RTX)
+ return last;
- for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
- continue;
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn (insn);
+ last = insn;
+ insn = next;
+ }
+ break;
- after_after = NEXT_INSN (after);
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- NEXT_INSN (after) = first;
- PREV_INSN (first) = after;
- NEXT_INSN (last) = after_after;
- if (after_after)
- PREV_INSN (after_after) = last;
+ default:
+ last = make_insn_raw (x);
+ add_insn (last);
+ break;
+ }
- if (after == last_insn)
- last_insn = last;
return last;
}
-/* Make an insn of code JUMP_INSN with pattern PATTERN
+/* Make an insn of code JUMP_INSN with pattern X
and add it to the end of the doubly-linked list. */
rtx
-emit_jump_insn (pattern)
- rtx pattern;
+emit_jump_insn (rtx x)
{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
+ rtx last = NULL_RTX, insn;
+
+ switch (GET_CODE (x))
{
- register rtx insn = make_jump_insn_raw (pattern);
- add_insn (insn);
- return insn;
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn (insn);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn (last);
+ break;
}
+
+ return last;
}
-/* Make an insn of code CALL_INSN with pattern PATTERN
+/* Make an insn of code CALL_INSN with pattern X
and add it to the end of the doubly-linked list. */
rtx
-emit_call_insn (pattern)
- rtx pattern;
+emit_call_insn (rtx x)
{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
+ rtx insn;
+
+ switch (GET_CODE (x))
{
- register rtx insn = make_call_insn_raw (pattern);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = emit_insn (x);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ insn = make_call_insn_raw (x);
add_insn (insn);
- PUT_CODE (insn, CALL_INSN);
- return insn;
+ break;
}
+
+ return insn;
}
/* Add the label LABEL to the end of the doubly-linked list. */
rtx
-emit_label (label)
- rtx label;
+emit_label (rtx label)
{
/* This can be called twice for the same label
as a result of the confusion that follows a syntax error!
and add it to the end of the doubly-linked list. */
rtx
-emit_barrier ()
+emit_barrier (void)
{
- register rtx barrier = rtx_alloc (BARRIER);
+ rtx barrier = rtx_alloc (BARRIER);
INSN_UID (barrier) = cur_insn_uid++;
add_insn (barrier);
return barrier;
}
-/* Make an insn of code NOTE
- with data-fields specified by FILE and LINE
- and add it to the end of the doubly-linked list,
- but only if line-numbers are desired for debugging info. */
+/* Make line numbering NOTE insn for LOCATION add it to the end
+ of the doubly-linked list, but only if line-numbers are desired for
+ debugging info and it doesn't match the previous one. */
rtx
-emit_line_note (file, line)
- const char *file;
- int line;
-{
- set_file_and_line_for_stmt (file, line);
-
-#if 0
+emit_line_note (location_t location)
+{
+ rtx note;
+
+ set_file_and_line_for_stmt (location);
+
+ if (location.file && last_location.file
+ && !strcmp (location.file, last_location.file)
+ && location.line == last_location.line)
+ return NULL_RTX;
+ last_location = location;
+
if (no_line_numbers)
- return 0;
-#endif
+ {
+ cur_insn_uid++;
+ return NULL_RTX;
+ }
- return emit_note (file, line);
+ note = emit_note (location.line);
+ NOTE_SOURCE_FILE (note) = location.file;
+
+ return note;
}
-/* Make an insn of code NOTE
- with data-fields specified by FILE and LINE
- and add it to the end of the doubly-linked list.
- If it is a line-number NOTE, omit it if it matches the previous one. */
+/* Emit a copy of note ORIG. */
rtx
-emit_note (file, line)
- const char *file;
- int line;
+emit_note_copy (rtx orig)
{
- register rtx note;
-
- if (line > 0)
- {
- if (file && last_filename && !strcmp (file, last_filename)
- && line == last_linenum)
- return 0;
- last_filename = file;
- last_linenum = line;
- }
-
- if (no_line_numbers && line > 0)
+ rtx note;
+
+ if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
{
cur_insn_uid++;
- return 0;
+ return NULL_RTX;
}
-
+
note = rtx_alloc (NOTE);
+
INSN_UID (note) = cur_insn_uid++;
- NOTE_SOURCE_FILE (note) = file;
- NOTE_LINE_NUMBER (note) = line;
+ NOTE_DATA (note) = NOTE_DATA (orig);
+ NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
+ BLOCK_FOR_INSN (note) = NULL;
add_insn (note);
+
return note;
}
-/* Emit a NOTE, and don't omit it even if LINE is the previous note. */
+/* Make an insn of code NOTE or type NOTE_NO
+ and add it to the end of the doubly-linked list. */
rtx
-emit_line_note_force (file, line)
- const char *file;
- int line;
+emit_note (int note_no)
{
- last_linenum = -1;
- return emit_line_note (file, line);
+ rtx note;
+
+ note = rtx_alloc (NOTE);
+ INSN_UID (note) = cur_insn_uid++;
+ NOTE_LINE_NUMBER (note) = note_no;
+ memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
+ BLOCK_FOR_INSN (note) = NULL;
+ add_insn (note);
+ return note;
}
/* Cause next statement to emit a line note even if the line number
- has not changed. This is used at the beginning of a function. */
+ has not changed. */
void
-force_next_line_note ()
+force_next_line_note (void)
{
- last_linenum = -1;
+ last_location.line = -1;
}
/* Place a note of KIND on insn INSN with DATUM as the datum. If a
note of this type already exists, remove it first. */
-void
-set_unique_reg_note (insn, kind, datum)
- rtx insn;
- enum reg_note kind;
- rtx datum;
+rtx
+set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
{
rtx note = find_reg_note (insn, kind, NULL_RTX);
- /* First remove the note if there already is one. */
+ switch (kind)
+ {
+ case REG_EQUAL:
+ case REG_EQUIV:
+ /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
+ has multiple sets (some callers assume single_set
+ means the insn only has one set, when in fact it
+ means the insn only has one * useful * set). */
+ if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
+ {
+ if (note)
+ abort ();
+ return NULL_RTX;
+ }
+
+ /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
+ It serves no useful purpose and breaks eliminate_regs. */
+ if (GET_CODE (datum) == ASM_OPERANDS)
+ return NULL_RTX;
+ break;
+
+ default:
+ break;
+ }
+
if (note)
- remove_note (insn, note);
+ {
+ XEXP (note, 0) = datum;
+ return note;
+ }
REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
+ return REG_NOTES (insn);
}
\f
/* Return an indication of which type of insn should have X as a body.
The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
enum rtx_code
-classify_insn (x)
- rtx x;
+classify_insn (rtx x)
{
if (GET_CODE (x) == CODE_LABEL)
return CODE_LABEL;
}
if (GET_CODE (x) == PARALLEL)
{
- register int j;
+ int j;
for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
return CALL_INSN;
If X is a label, it is simply added into the insn chain. */
rtx
-emit (x)
- rtx x;
+emit (rtx x)
{
enum rtx_code code = classify_insn (x);
return emit_insn (x);
else if (code == JUMP_INSN)
{
- register rtx insn = emit_jump_insn (x);
+ rtx insn = emit_jump_insn (x);
if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
return emit_barrier ();
return insn;
abort ();
}
\f
+/* Space for free sequence stack entries. */
+static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
+
/* Begin emitting insns to a sequence which can be packaged in an
RTL_EXPR. If this sequence will contain something that might cause
the compiler to pop arguments to function calls (because those
emitted in the middle of this sequence. */
void
-start_sequence ()
+start_sequence (void)
{
struct sequence_stack *tem;
- tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
+ if (free_sequence_stack != NULL)
+ {
+ tem = free_sequence_stack;
+ free_sequence_stack = tem->next;
+ }
+ else
+ tem = ggc_alloc (sizeof (struct sequence_stack));
tem->next = seq_stack;
tem->first = first_insn;
information about how to use this function. */
void
-start_sequence_for_rtl_expr (t)
- tree t;
+start_sequence_for_rtl_expr (tree t)
{
start_sequence ();
start_sequence for more information about how to use this function. */
void
-push_to_sequence (first)
- rtx first;
+push_to_sequence (rtx first)
{
rtx last;
/* Set up the insn chain from a chain stort in FIRST to LAST. */
void
-push_to_full_sequence (first, last)
- rtx first, last;
+push_to_full_sequence (rtx first, rtx last)
{
start_sequence ();
first_insn = first;
as the current sequence, saving the previously current one. */
void
-push_topmost_sequence ()
+push_topmost_sequence (void)
{
struct sequence_stack *stack, *top = NULL;
insn chain, and restore the previous saved state. */
void
-pop_topmost_sequence ()
+pop_topmost_sequence (void)
{
struct sequence_stack *stack, *top = NULL;
/* After emitting to a sequence, restore previous saved state.
To get the contents of the sequence just made, you must call
- `gen_sequence' *before* calling here.
+ `get_insns' *before* calling here.
If the compiler might have deferred popping arguments while
generating this sequence, and this sequence will not be immediately
inserted into the instruction stream, use do_pending_stack_adjust
- before calling gen_sequence. That will ensure that the deferred
+ before calling get_insns. That will ensure that the deferred
pops are inserted into this sequence, and not into some random
location in the instruction stream. See INHIBIT_DEFER_POP for more
information about deferred popping of arguments. */
void
-end_sequence ()
+end_sequence (void)
{
struct sequence_stack *tem = seq_stack;
seq_rtl_expr = tem->sequence_rtl_expr;
seq_stack = tem->next;
- free (tem);
-}
-
-/* This works like end_sequence, but records the old sequence in FIRST
- and LAST. */
-
-void
-end_full_sequence (first, last)
- rtx *first, *last;
-{
- *first = first_insn;
- *last = last_insn;
- end_sequence();
+ memset (tem, 0, sizeof (*tem));
+ tem->next = free_sequence_stack;
+ free_sequence_stack = tem;
}
/* Return 1 if currently emitting into a sequence. */
int
-in_sequence_p ()
+in_sequence_p (void)
{
return seq_stack != 0;
}
-
-/* Generate a SEQUENCE rtx containing the insns already emitted
- to the current sequence.
-
- This is how the gen_... function from a DEFINE_EXPAND
- constructs the SEQUENCE that it returns. */
-
-rtx
-gen_sequence ()
-{
- rtx result;
- rtx tem;
- int i;
- int len;
-
- /* Count the insns in the chain. */
- len = 0;
- for (tem = first_insn; tem; tem = NEXT_INSN (tem))
- len++;
-
- /* If only one insn, return it rather than a SEQUENCE.
- (Now that we cache SEQUENCE expressions, it isn't worth special-casing
- the case of an empty list.)
- We only return the pattern of an insn if its code is INSN and it
- has no notes. This ensures that no information gets lost. */
- if (len == 1
- && ! RTX_FRAME_RELATED_P (first_insn)
- && GET_CODE (first_insn) == INSN
- /* Don't throw away any reg notes. */
- && REG_NOTES (first_insn) == 0)
- return PATTERN (first_insn);
-
- result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
-
- for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
- XVECEXP (result, 0, i) = tem;
-
- return result;
-}
\f
/* Put the various virtual registers into REGNO_REG_RTX. */
void
-init_virtual_regs (es)
- struct emit_status *es;
+init_virtual_regs (struct emit_status *es)
{
rtx *ptr = es->x_regno_reg_rtx;
ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
}
-void
-clear_emit_caches ()
-{
- int i;
-
- /* Clear the start_sequence/gen_sequence cache. */
- for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
- sequence_result[i] = 0;
- free_insn = 0;
-}
\f
/* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
SCRATCHes. */
rtx
-copy_insn_1 (orig)
- register rtx orig;
+copy_insn_1 (rtx orig)
{
- register rtx copy;
- register int i, j;
- register RTX_CODE code;
- register const char *format_ptr;
+ rtx copy;
+ int i, j;
+ RTX_CODE code;
+ const char *format_ptr;
code = GET_CODE (orig);
case QUEUED:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case SYMBOL_REF:
case CODE_LABEL:
case PC:
case CC0:
case ADDRESSOF:
return orig;
+ case CLOBBER:
+ if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
+ return orig;
+ break;
case SCRATCH:
for (i = 0; i < copy_insn_n_scratches; i++)
all fields need copying, and then clear the fields that should
not be copied. That is the sensible default behavior, and forces
us to explicitly document why we are *not* copying a flag. */
- memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
+ memcpy (copy, orig, RTX_HDR_SIZE);
/* We do not copy the USED flag, which is used as a mark bit during
walks over the RTL. */
- copy->used = 0;
+ RTX_FLAG (copy, used) = 0;
/* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
- if (GET_RTX_CLASS (code) == 'i')
+ if (INSN_P (orig))
{
- copy->jump = 0;
- copy->call = 0;
- copy->frame_related = 0;
+ RTX_FLAG (copy, jump) = 0;
+ RTX_FLAG (copy, call) = 0;
+ RTX_FLAG (copy, frame_related) = 0;
}
format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
{
- copy->fld[i] = orig->fld[i];
+ copy->u.fld[i] = orig->u.fld[i];
switch (*format_ptr++)
{
case 'e':
INSN doesn't really have to be a full INSN; it could be just the
pattern. */
rtx
-copy_insn (insn)
- rtx insn;
+copy_insn (rtx insn)
{
copy_insn_n_scratches = 0;
orig_asm_operands_vector = 0;
before generating rtl for each function. */
void
-init_emit ()
+init_emit (void)
{
struct function *f = cfun;
- f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
+ f->emit = ggc_alloc (sizeof (struct emit_status));
first_insn = NULL;
last_insn = NULL;
seq_rtl_expr = NULL;
cur_insn_uid = 1;
reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
- last_linenum = 0;
- last_filename = 0;
+ last_location.line = 0;
+ last_location.file = 0;
first_label_num = label_num;
last_label_num = 0;
seq_stack = NULL;
- clear_emit_caches ();
-
/* Init the tables that describe all the pseudo regs. */
f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
f->emit->regno_pointer_align
- = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
- sizeof (unsigned char));
+ = ggc_alloc_cleared (f->emit->regno_pointer_align_length
+ * sizeof (unsigned char));
regno_reg_rtx
- = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
- sizeof (rtx));
+ = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
+
+ /* Put copies of all the hard registers into regno_reg_rtx. */
+ memcpy (regno_reg_rtx,
+ static_regno_reg_rtx,
+ FIRST_PSEUDO_REGISTER * sizeof (rtx));
/* Put copies of all the virtual register rtx into regno_reg_rtx. */
init_virtual_regs (f->emit);
#endif
}
-/* Mark SS for GC. */
+/* Generate the constant 0. */
-static void
-mark_sequence_stack (ss)
- struct sequence_stack *ss;
+static rtx
+gen_const_vector_0 (enum machine_mode mode)
{
- while (ss)
- {
- ggc_mark_rtx (ss->first);
- ggc_mark_tree (ss->sequence_rtl_expr);
- ss = ss->next;
- }
-}
+ rtx tem;
+ rtvec v;
+ int units, i;
+ enum machine_mode inner;
-/* Mark ES for GC. */
+ units = GET_MODE_NUNITS (mode);
+ inner = GET_MODE_INNER (mode);
-void
-mark_emit_status (es)
- struct emit_status *es;
-{
- rtx *r;
- int i;
+ v = rtvec_alloc (units);
- if (es == 0)
- return;
+ /* We need to call this function after we to set CONST0_RTX first. */
+ if (!CONST0_RTX (inner))
+ abort ();
+
+ for (i = 0; i < units; ++i)
+ RTVEC_ELT (v, i) = CONST0_RTX (inner);
- for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
- i > 0; --i, ++r)
- ggc_mark_rtx (*r);
+ tem = gen_rtx_raw_CONST_VECTOR (mode, v);
+ return tem;
+}
+
+/* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
+ all elements are zero. */
+rtx
+gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
+{
+ rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
+ int i;
- mark_sequence_stack (es->sequence_stack);
- ggc_mark_tree (es->sequence_rtl_expr);
- ggc_mark_rtx (es->x_first_insn);
+ for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
+ if (RTVEC_ELT (v, i) != inner_zero)
+ return gen_rtx_raw_CONST_VECTOR (mode, v);
+ return CONST0_RTX (mode);
}
/* Create some permanent unique rtl objects shared between all functions.
LINE_NUMBERS is nonzero if line numbers are to be generated. */
void
-init_emit_once (line_numbers)
- int line_numbers;
+init_emit_once (int line_numbers)
{
int i;
enum machine_mode mode;
enum machine_mode double_mode;
- /* Initialize the CONST_INT hash table. */
- const_int_htab = htab_create (37, const_int_htab_hash,
- const_int_htab_eq, NULL);
- ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
- rtx_htab_mark);
+ /* We need reg_raw_mode, so initialize the modes now. */
+ init_reg_modes_once ();
+
+ /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
+ tables. */
+ const_int_htab = htab_create_ggc (37, const_int_htab_hash,
+ const_int_htab_eq, NULL);
+
+ const_double_htab = htab_create_ggc (37, const_double_htab_hash,
+ const_double_htab_eq, NULL);
+
+ mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
+ mem_attrs_htab_eq, NULL);
+ reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
+ reg_attrs_htab_eq, NULL);
no_line_numbers = ! line_numbers;
This must be done at runtime because the register number field
is in a union and some compilers can't initialize unions. */
- pc_rtx = gen_rtx (PC, VOIDmode);
- cc0_rtx = gen_rtx (CC0, VOIDmode);
+ pc_rtx = gen_rtx_PC (VOIDmode);
+ cc0_rtx = gen_rtx_CC0 (VOIDmode);
stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
if (hard_frame_pointer_rtx == 0)
gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
- /* These rtx must be roots if GC is enabled. */
- ggc_add_rtx_root (global_rtl, GR_MAX);
+ /* Initialize RTL for commonly used hard registers. These are
+ copied into regno_reg_rtx as we begin to compile each function. */
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
#ifdef INIT_EXPANDERS
/* This is to initialize {init|mark|free}_machine_status before the first
call to push_function_context_to. This is needed by the Chill front
- end which calls push_function_context_to before the first cal to
+ end which calls push_function_context_to before the first call to
init_function_start. */
INIT_EXPANDERS;
#endif
/* Create the unique rtx's for certain rtx codes and operand values. */
- /* Don't use gen_rtx here since gen_rtx in this case
+ /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
tries to use these variables. */
for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
const_int_rtx[i + MAX_SAVED_CONST_INT] =
- gen_rtx_raw_CONST_INT (VOIDmode, i);
- ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
+ gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
&& STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
else
const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
- dconst0 = REAL_VALUE_ATOF ("0", double_mode);
- dconst1 = REAL_VALUE_ATOF ("1", double_mode);
- dconst2 = REAL_VALUE_ATOF ("2", double_mode);
- dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
+ REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
+ REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
+ REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
+ REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
+ REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
+ REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
+ REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
- for (i = 0; i <= 2; i++)
- {
- for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
- mode = GET_MODE_WIDER_MODE (mode))
- {
- rtx tem = rtx_alloc (CONST_DOUBLE);
- union real_extract u;
+ dconsthalf = dconst1;
+ SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
- /* Zero any holes in a structure. */
- memset ((char *) &u, 0, sizeof u);
- u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
+ real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
- /* Avoid trailing garbage in the rtx. */
- if (sizeof (u) < sizeof (HOST_WIDE_INT))
- CONST_DOUBLE_LOW (tem) = 0;
- if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
- CONST_DOUBLE_HIGH (tem) = 0;
+ /* Initialize mathematical constants for constant folding builtins.
+ These constants need to be given to at least 160 bits precision. */
+ real_from_string (&dconstpi,
+ "3.1415926535897932384626433832795028841971693993751058209749445923078");
+ real_from_string (&dconste,
+ "2.7182818284590452353602874713526624977572470936999595749669676277241");
- memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
- CONST_DOUBLE_MEM (tem) = cc0_rtx;
- CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
- PUT_MODE (tem, mode);
+ for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
+ {
+ REAL_VALUE_TYPE *r =
+ (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
- const_tiny_rtx[i][(int) mode] = tem;
- }
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[i][(int) mode] =
+ CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
const_tiny_rtx[i][(int) mode] = GEN_INT (i);
}
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
+
for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
const_tiny_rtx[0][i] = const0_rtx;
if (STORE_FLAG_VALUE == 1)
const_tiny_rtx[1][(int) BImode] = const1_rtx;
- /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
- `(rtx *) const_tiny_rtx'. The former has bounds that only cover
- `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
- ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
- ggc_add_rtx_root (&const_true_rtx, 1);
-
#ifdef RETURN_ADDRESS_POINTER_REGNUM
return_address_pointer_rtx
= gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
#endif
-#ifdef STRUCT_VALUE
- struct_value_rtx = STRUCT_VALUE;
-#else
- struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
-#endif
-
-#ifdef STRUCT_VALUE_INCOMING
- struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
-#else
-#ifdef STRUCT_VALUE_INCOMING_REGNUM
- struct_value_incoming_rtx
- = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
-#else
- struct_value_incoming_rtx = struct_value_rtx;
-#endif
-#endif
-
#ifdef STATIC_CHAIN_REGNUM
static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
#endif
#endif
- if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
- pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
-
- ggc_add_rtx_root (&pic_offset_table_rtx, 1);
- ggc_add_rtx_root (&struct_value_rtx, 1);
- ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
- ggc_add_rtx_root (&static_chain_rtx, 1);
- ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
- ggc_add_rtx_root (&return_address_pointer_rtx, 1);
+ if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
+ pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
}
\f
/* Query and clear/ restore no_line_numbers. This is used by the
warnings about unreachable code. */
int
-force_line_numbers ()
+force_line_numbers (void)
{
int old = no_line_numbers;
}
void
-restore_line_number_status (old_value)
- int old_value;
+restore_line_number_status (int old_value)
{
no_line_numbers = old_value;
}
+
+/* Produce exact duplicate of insn INSN after AFTER.
+ Care updating of libcall regions if present. */
+
+rtx
+emit_copy_of_insn_after (rtx insn, rtx after)
+{
+ rtx new;
+ rtx note1, note2, link;
+
+ switch (GET_CODE (insn))
+ {
+ case INSN:
+ new = emit_insn_after (copy_insn (PATTERN (insn)), after);
+ break;
+
+ case JUMP_INSN:
+ new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
+ break;
+
+ case CALL_INSN:
+ new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
+ if (CALL_INSN_FUNCTION_USAGE (insn))
+ CALL_INSN_FUNCTION_USAGE (new)
+ = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
+ SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
+ CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
+ break;
+
+ default:
+ abort ();
+ }
+
+ /* Update LABEL_NUSES. */
+ mark_jump_label (PATTERN (new), new, 0);
+
+ INSN_LOCATOR (new) = INSN_LOCATOR (insn);
+
+ /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
+ make them. */
+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
+ if (REG_NOTE_KIND (link) != REG_LABEL)
+ {
+ if (GET_CODE (link) == EXPR_LIST)
+ REG_NOTES (new)
+ = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
+ XEXP (link, 0),
+ REG_NOTES (new)));
+ else
+ REG_NOTES (new)
+ = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
+ XEXP (link, 0),
+ REG_NOTES (new)));
+ }
+
+ /* Fix the libcall sequences. */
+ if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
+ {
+ rtx p = new;
+ while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
+ p = PREV_INSN (p);
+ XEXP (note1, 0) = p;
+ XEXP (note2, 0) = new;
+ }
+ INSN_CODE (new) = INSN_CODE (insn);
+ return new;
+}
+
+static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
+rtx
+gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
+{
+ if (hard_reg_clobbers[mode][regno])
+ return hard_reg_clobbers[mode][regno];
+ else
+ return (hard_reg_clobbers[mode][regno] =
+ gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
+}
+
+#include "gt-emit-rtl.h"
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