} while (0)
#endif
-#ifndef ASM_STABD_OP
-#define ASM_STABD_OP "\t.stabd\t"
-#endif
-
/* This is how to output an element of a case-vector that is absolute.
Some targets don't use this, but we have to define it anyway. */
# endif
#endif
-/* This determines whether this target supports hidden visibility.
- This is a weaker condition than HAVE_GAS_HIDDEN, which probes for
- specific assembler syntax. */
-#ifndef TARGET_SUPPORTS_HIDDEN
-# ifdef HAVE_GAS_HIDDEN
-# define TARGET_SUPPORTS_HIDDEN 1
-# else
-# define TARGET_SUPPORTS_HIDDEN 0
-# endif
-#endif
-
/* Determines whether we may use common symbols to represent one-only
semantics (a.k.a. "vague linkage"). */
#ifndef USE_COMMON_FOR_ONE_ONLY
#endif
#endif
+/* On many systems, different EH table encodings are used under
+ difference circumstances. Some will require runtime relocations;
+ some will not. For those that do not require runtime relocations,
+ we would like to make the table read-only. However, since the
+ read-only tables may need to be combined with read-write tables
+ that do require runtime relocation, it is not safe to make the
+ tables read-only unless the linker will merge read-only and
+ read-write sections into a single read-write section. If your
+ linker does not have this ability, but your system is such that no
+ encoding used with non-PIC code will ever require a runtime
+ relocation, then you can define EH_TABLES_CAN_BE_READ_ONLY to 1 in
+ your target configuration file. */
+#ifndef EH_TABLES_CAN_BE_READ_ONLY
+#ifdef HAVE_LD_RO_RW_SECTION_MIXING
+#define EH_TABLES_CAN_BE_READ_ONLY 1
+#else
+#define EH_TABLES_CAN_BE_READ_ONLY 0
+#endif
+#endif
+
/* If we have named section and we support weak symbols, then use the
.jcr section for recording java classes which need to be registered
at program start-up time. */
#endif
#endif
-/* By default, we generate a label at the beginning and end of the
- text section, and compute the size of the text section by
- subtracting the two. However, on some platforms that doesn't
- work, and we use the section itself, rather than a label at the
- beginning of it, to indicate the start of the section. On such
- platforms, define this to zero. */
-#ifndef DWARF2_GENERATE_TEXT_SECTION_LABEL
-#define DWARF2_GENERATE_TEXT_SECTION_LABEL 1
-#endif
-
/* Number of hardware registers that go into the DWARF-2 unwind info.
If not defined, equals FIRST_PSEUDO_REGISTER */
#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
#endif
+/* Some macros can be defined by the backend in either a mode-dependent
+ or mode-independent form. The compiler proper should only use the
+ mode-dependent form, providing VOIDmode when the mode is unknown.
+ We can't poison the macros because the backend may reference them. */
+
+#ifndef REGNO_MODE_OK_FOR_BASE_P
+#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
+#endif
+
+#ifndef REG_MODE_OK_FOR_BASE_P
+#define REG_MODE_OK_FOR_BASE_P(REG, MODE) REG_OK_FOR_BASE_P (REG)
+#endif
+
/* Determine the register class for registers suitable to be the base
address register in a MEM. Allow the choice to be dependent upon
the mode of the memory access. */
#define MODE_BASE_REG_CLASS(MODE) BASE_REG_CLASS
#endif
+/* Some machines require a different base register class if the index
+ is a register. By default, assume that a base register is acceptable. */
+#ifndef MODE_BASE_REG_REG_CLASS
+#define MODE_BASE_REG_REG_CLASS(MODE) MODE_BASE_REG_CLASS(MODE)
+#endif
+
+#ifndef REGNO_MODE_OK_FOR_REG_BASE_P
+#define REGNO_MODE_OK_FOR_REG_BASE_P(REGNO, MODE) REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE)
+#endif
+
+#ifndef REG_MODE_OK_FOR_REG_BASE_P
+#define REG_MODE_OK_FOR_REG_BASE_P(REGNO, MODE) REG_MODE_OK_FOR_BASE_P (REGNO, MODE)
+#endif
+
#ifndef LARGEST_EXPONENT_IS_NORMAL
#define LARGEST_EXPONENT_IS_NORMAL(SIZE) 0
#endif
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