#include "system.h"
#include "coretypes.h"
#include "tm.h"
+#include "diagnostic-core.h"
#include "toplev.h"
#include "rtl.h"
#include "tm_p.h"
first_def = df_bb_regno_first_def_find (g->bb, regno);
gcc_assert (first_def);
- if (bitmap_bit_p (bb_info->gen, DF_REF_ID (first_def)))
+ if (bitmap_bit_p (&bb_info->gen, DF_REF_ID (first_def)))
return;
}
}
#ifdef ENABLE_CHECKING
if (DF_REF_ID (last_def) != DF_REF_ID (first_def))
- gcc_assert (!bitmap_bit_p (bb_info->gen, DF_REF_ID (first_def)));
+ gcc_assert (!bitmap_bit_p (&bb_info->gen, DF_REF_ID (first_def)));
#endif
/* Create inter-loop true dependences and anti dependences. */
rd_bb_info = DF_RD_BB_INFO (g->bb);
/* Find inter-loop register output, true and anti deps. */
- EXECUTE_IF_SET_IN_BITMAP (rd_bb_info->gen, 0, rd_num, bi)
+ EXECUTE_IF_SET_IN_BITMAP (&rd_bb_info->gen, 0, rd_num, bi)
{
df_ref rd = DF_DEFS_GET (rd_num);
}
+static int
+walk_mems_2 (rtx *x, rtx mem)
+{
+ if (MEM_P (*x))
+ {
+ if (may_alias_p (*x, mem))
+ return 1;
+
+ return -1;
+ }
+ return 0;
+}
+
+static int
+walk_mems_1 (rtx *x, rtx *pat)
+{
+ if (MEM_P (*x))
+ {
+ /* Visit all MEMs in *PAT and check indepedence. */
+ if (for_each_rtx (pat, (rtx_function) walk_mems_2, *x))
+ /* Indicate that dependence was determined and stop traversal. */
+ return 1;
+
+ return -1;
+ }
+ return 0;
+}
+
+/* Return 1 if two specified instructions have mem expr with conflict alias sets*/
+static int
+insns_may_alias_p (rtx insn1, rtx insn2)
+{
+ /* For each pair of MEMs in INSN1 and INSN2 check their independence. */
+ return for_each_rtx (&PATTERN (insn1), (rtx_function) walk_mems_1,
+ &PATTERN (insn2));
+}
+
/* Given two nodes, analyze their RTL insns and add inter-loop mem deps
to ddg G. */
static void
add_inter_loop_mem_dep (ddg_ptr g, ddg_node_ptr from, ddg_node_ptr to)
{
- if (!insn_alias_sets_conflict_p (from->insn, to->insn))
+ if (!insns_may_alias_p (from->insn, to->insn))
/* Do not create edge if memory references have disjoint alias sets. */
return;
if (mem_write_insn_p (from->insn))
{
if (mem_read_insn_p (to->insn))
- create_ddg_dep_no_link (g, from, to, TRUE_DEP, MEM_DEP, 1);
+ create_ddg_dep_no_link (g, from, to,
+ DEBUG_INSN_P (to->insn)
+ ? ANTI_DEP : TRUE_DEP, MEM_DEP, 1);
else if (from->cuid != to->cuid)
- create_ddg_dep_no_link (g, from, to, OUTPUT_DEP, MEM_DEP, 1);
+ create_ddg_dep_no_link (g, from, to,
+ DEBUG_INSN_P (to->insn)
+ ? ANTI_DEP : OUTPUT_DEP, MEM_DEP, 1);
}
else
{
return;
else if (from->cuid != to->cuid)
{
- create_ddg_dep_no_link (g, from, to, ANTI_DEP, MEM_DEP, 1);
- create_ddg_dep_no_link (g, to, from, TRUE_DEP, MEM_DEP, 1);
+ create_ddg_dep_no_link (g, from, to, ANTI_DEP, MEM_DEP, 1);
+ if (DEBUG_INSN_P (from->insn) || DEBUG_INSN_P (to->insn))
+ create_ddg_dep_no_link (g, to, from, ANTI_DEP, MEM_DEP, 1);
+ else
+ create_ddg_dep_no_link (g, to, from, TRUE_DEP, MEM_DEP, 1);
}
}
{
int i;
/* Hold the dependency analysis state during dependency calculations. */
- struct deps tmp_deps;
+ struct deps_desc tmp_deps;
rtx head, tail;
/* Build the dependence information, using the sched_analyze function. */
}
/* There is nothing to do for this BB. */
- if (num_nodes <= 1)
+ if ((num_nodes - g->num_debug) <= 1)
{
free (g);
return NULL;