the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-
#include "config.h"
/* stdio.h must precede rtl.h for FFS. */
#include "system.h"
#include "tm_p.h"
#include "regs.h"
#include "hard-reg-set.h"
+#include "basic-block.h"
#include "flags.h"
#include "real.h"
#include "insn-config.h"
is to keep it in a hash table.
Registers and "quantity numbers":
-
+
At the start of each basic block, all of the (hardware and pseudo)
registers used in the function are given distinct quantity
numbers to indicate their contents. During scan, when the code
any mode, two REG expressions might be equivalent in the hash table
but not have the same quantity number if the quantity number of one
of the registers is not the same mode as those expressions.
-
+
Constants and quantity numbers
When a quantity has a known constant value, that value is stored
is also entered. These are made to point at each other
so that it is possible to find out if there exists any
register equivalent to an expression related to a given expression. */
-
+
/* One plus largest register number used in this function. */
static int max_reg;
static unsigned int cached_regno;
static struct cse_reg_info *cached_cse_reg_info;
-/* A HARD_REG_SET containing all the hard registers for which there is
+/* A HARD_REG_SET containing all the hard registers for which there is
currently a REG expression in the hash table. Note the difference
from the above variables, which indicate if the REG is mentioned in some
expression in the table. */
chain is not useful.
The `cost' field stores the cost of this element's expression.
+ The `regcost' field stores the value returned by approx_reg_cost for
+ this element's expression.
The `is_const' flag is set if the element is a constant (including
a fixed address).
field is the mode it was being used as. Each constant is
recorded separately for each mode it is used with. */
-
struct table_elt
{
rtx exp;
struct table_elt *first_same_value;
struct table_elt *related_value;
int cost;
+ int regcost;
enum machine_mode mode;
char in_memory;
char is_const;
? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
: canon_hash (X, M)) & HASH_MASK)
-/* Determine whether register number N is considered a fixed register for CSE.
+/* Determine whether register number N is considered a fixed register for the
+ purpose of approximating register costs.
It is desirable to replace other regs with fixed regs, to reduce need for
non-fixed hard regs.
A reg wins if it is either the frame pointer or designated as fixed. */
|| ((N) < FIRST_PSEUDO_REGISTER \
&& FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
-/* A register is cheap if it is a user variable assigned to the register
- or if its register number always corresponds to a cheap register. */
-
-#define CHEAP_REG(N) \
- ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
- || CHEAP_REGNO (REGNO (N)))
-
-#define COST(X) \
- (GET_CODE (X) == REG \
- ? (CHEAP_REG (X) ? 0 \
- : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
- : 2) \
- : notreg_cost(X))
+#define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X))
/* Get the info associated with register N. */
#define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
-#ifdef ADDRESS_COST
-/* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
- during CSE, such nodes are present. Using an ADDRESSOF node which
- refers to the address of a REG is a good thing because we can then
- turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
-#define CSE_ADDRESS_COST(RTX) \
- ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
- ? -1 : ADDRESS_COST(RTX))
-#endif
-
static struct table_elt *table[HASH_SIZE];
/* Chain of `struct table_elt's made so far for this function
static int max_elements_made;
-/* Surviving equivalence class when two equivalence classes are merged
+/* Surviving equivalence class when two equivalence classes are merged
by recording the effects of a jump in the last insn. Zero if the
last insn was not a conditional jump. */
/* Nonzero if X has the form (PLUS frame-pointer integer). We check for
virtual regs here because the simplify_*_operation routines are called
- by integrate.c, which is called before virtual register instantiation.
+ by integrate.c, which is called before virtual register instantiation.
?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
a header file so that their definitions can be shared with the
|| GET_CODE (X) == ADDRESSOF)
static int notreg_cost PARAMS ((rtx));
+static int approx_reg_cost_1 PARAMS ((rtx *, void *));
+static int approx_reg_cost PARAMS ((rtx));
+static int preferrable PARAMS ((int, int, int, int));
static void new_basic_block PARAMS ((void));
static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
static void invalidate_for_call PARAMS ((void));
static rtx use_related_value PARAMS ((rtx, struct table_elt *));
static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
+static unsigned canon_hash_string PARAMS ((const char *));
static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
static rtx canon_reg PARAMS ((rtx, rtx));
-static void find_best_addr PARAMS ((rtx, rtx *));
+static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
enum machine_mode *,
enum machine_mode *));
static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
extern void dump_class PARAMS ((struct table_elt*));
static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
+static int check_dependence PARAMS ((rtx *, void *));
static void flush_hash_table PARAMS ((void));
\f
fprintf (stderr, "Equivalence chain for ");
print_rtl (stderr, classp->exp);
fprintf (stderr, ": \n");
-
+
for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
{
print_rtl (stderr, elt->exp);
}
}
+/* Subroutine of approx_reg_cost; called through for_each_rtx. */
+static int
+approx_reg_cost_1 (xp, data)
+ rtx *xp;
+ void *data;
+{
+ rtx x = *xp;
+ regset set = (regset) data;
+
+ if (x && GET_CODE (x) == REG)
+ SET_REGNO_REG_SET (set, REGNO (x));
+ return 0;
+}
+
+/* Return an estimate of the cost of the registers used in an rtx.
+ This is mostly the number of different REG expressions in the rtx;
+ however for some excecptions like fixed registers we use a cost of
+ 0. If any other hard register reference occurs, return MAX_COST. */
+
+static int
+approx_reg_cost (x)
+ rtx x;
+{
+ regset_head set;
+ int i;
+ int cost = 0;
+ int hardregs = 0;
+
+ INIT_REG_SET (&set);
+ for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
+
+ EXECUTE_IF_SET_IN_REG_SET
+ (&set, 0, i,
+ {
+ if (! CHEAP_REGNO (i))
+ {
+ if (i < FIRST_PSEUDO_REGISTER)
+ hardregs++;
+
+ cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
+ }
+ });
+
+ CLEAR_REG_SET (&set);
+ return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
+}
+
+/* Return a negative value if an rtx A, whose costs are given by COST_A
+ and REGCOST_A, is more desirable than an rtx B.
+ Return a positive value if A is less desirable, or 0 if the two are
+ equally good. */
+static int
+preferrable (cost_a, regcost_a, cost_b, regcost_b)
+ int cost_a, regcost_a, cost_b, regcost_b;
+{
+ /* First, get rid of a cases involving expressions that are entirely
+ unwanted. */
+ if (cost_a != cost_b)
+ {
+ if (cost_a == MAX_COST)
+ return 1;
+ if (cost_b == MAX_COST)
+ return -1;
+ }
+
+ /* Avoid extending lifetimes of hardregs. */
+ if (regcost_a != regcost_b)
+ {
+ if (regcost_a == MAX_COST)
+ return 1;
+ if (regcost_b == MAX_COST)
+ return -1;
+ }
+
+ /* Normal operation costs take precedence. */
+ if (cost_a != cost_b)
+ return cost_a - cost_b;
+ /* Only if these are identical consider effects on register pressure. */
+ if (regcost_a != regcost_b)
+ return regcost_a - regcost_b;
+ return 0;
+}
+
/* Internal function, to compute cost when X is not a register; called
from COST macro to keep it simple. */
&& subreg_lowpart_p (x)
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
- ? (CHEAP_REG (SUBREG_REG (x)) ? 0
- : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
- : 2))
+ ? 0
: rtx_cost (x, SET) * 2);
}
-/* Return the right cost to give to an operation
- to make the cost of the corresponding register-to-register instruction
- N times that of a fast register-to-register instruction. */
-
-#define COSTS_N_INSNS(N) ((N) * 4 - 2)
-
/* Return an estimate of the cost of computing rtx X.
One use is in cse, to decide which expression to keep in the hash table.
Another is in rtl generation, to pick the cheapest way to multiply.
/* Used in loop.c and combine.c as a marker. */
total = 0;
break;
- case ASM_OPERANDS:
- /* We don't want these to be used in substitutions because
- we have no way of validating the resulting insn. So assign
- anything containing an ASM_OPERANDS a very high cost. */
- total = 1000;
- break;
default:
- total = 2;
+ total = COSTS_N_INSNS (1);
}
switch (code)
{
case REG:
- return ! CHEAP_REG (x);
+ return 0;
case SUBREG:
/* If we can't tie these modes, make this expensive. The larger
if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
return COSTS_N_INSNS (2
+ GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
- return 2;
+ break;
+
#ifdef RTX_COSTS
RTX_COSTS (x, code, outer_code);
-#endif
+#endif
#ifdef CONST_COSTS
CONST_COSTS (x, code, outer_code);
#endif
default:
#ifdef DEFAULT_RTX_COSTS
- DEFAULT_RTX_COSTS(x, code, outer_code);
+ DEFAULT_RTX_COSTS (x, code, outer_code);
#endif
break;
}
return total;
}
\f
+/* Return cost of address expression X.
+ Expect that X is propertly formed address reference. */
+
+int
+address_cost (x, mode)
+ rtx x;
+ enum machine_mode mode;
+{
+ /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
+ during CSE, such nodes are present. Using an ADDRESSOF node which
+ refers to the address of a REG is a good thing because we can then
+ turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
+
+ if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
+ return -1;
+
+ /* We may be asked for cost of various unusual addresses, such as operands
+ of push instruction. It is not worthwhile to complicate writing
+ of ADDRESS_COST macro by such cases. */
+
+ if (!memory_address_p (mode, x))
+ return 1000;
+#ifdef ADDRESS_COST
+ return ADDRESS_COST (x);
+#else
+ return rtx_cost (x, MEM);
+#endif
+}
+
+\f
static struct cse_reg_info *
get_cse_reg_info (regno)
unsigned int regno;
struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
struct cse_reg_info *p;
- for (p = *hash_head ; p != NULL; p = p->hash_next)
+ for (p = *hash_head; p != NULL; p = p->hash_next)
if (p->regno == regno)
break;
return 1;
}
+ /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
+ than REG_IN_TABLE to find out if there was only a single preceding
+ invalidation - for the SUBREG - or another one, which would be
+ for the full register. However, if we find here that REG_TICK
+ indicates that the register is invalid, it means that it has
+ been invalidated in a separate operation. The SUBREG might be used
+ now (then this is a recursive call), or we might use the full REG
+ now and a SUBREG of it later. So bump up REG_TICK so that
+ mention_regs will do the right thing. */
+ if (! modified
+ && REG_IN_TABLE (regno) >= 0
+ && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
+ REG_TICK (regno)++;
make_new_qty (regno, GET_MODE (x));
return 1;
}
else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
&& ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
{
- unsigned int regno = REGNO (SUBREG_REG (x));
-
insert_regs (SUBREG_REG (x), NULL_PTR, 0);
- /* Mention_regs checks if REG_TICK is exactly one larger than
- REG_IN_TABLE to find out if there was only a single preceding
- invalidation - for the SUBREG - or another one, which would be
- for the full register. Since we don't invalidate the SUBREG
- here first, we might have to bump up REG_TICK so that mention_regs
- will do the right thing. */
- if (REG_IN_TABLE (regno) >= 0
- && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
- REG_TICK (regno)++;
mention_regs (x);
return 1;
}
elt->first_same_value = 0;
/* Remove the table element from its equivalence class. */
-
+
{
register struct table_elt *prev = elt->prev_same_value;
register struct table_elt *next = elt->next_same_value;
- if (next) next->prev_same_value = prev;
+ if (next)
+ next->prev_same_value = prev;
if (prev)
prev->next_same_value = next;
register struct table_elt *prev = elt->prev_same_hash;
register struct table_elt *next = elt->next_same_hash;
- if (next) next->prev_same_hash = prev;
+ if (next)
+ next->prev_same_hash = prev;
if (prev)
prev->next_same_hash = next;
/* Make sure this is a valid entry in the table. */
&& exp_equiv_p (p->exp, p->exp, 1, 0))
return p->exp;
-
+
return 0;
}
If necessary, update table showing constant values of quantities. */
-#define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
+#define CHEAPER(X, Y) \
+ (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
static struct table_elt *
insert (x, classp, hash, mode)
elt->exp = x;
elt->canon_exp = NULL_RTX;
elt->cost = COST (x);
+ elt->regcost = approx_reg_cost (x);
elt->next_same_value = 0;
elt->prev_same_value = 0;
elt->next_same_hash = table[hash];
{
hash_arg_in_memory = 0;
hash = HASH (exp, mode);
-
+
if (GET_CODE (exp) == REG)
delete_reg_equiv (REGNO (exp));
-
+
remove_from_table (elt, hash);
if (insert_regs (exp, class1, 0))
}
}
\f
-
/* Flush the entire hash table. */
static void
}
}
\f
+/* Function called for each rtx to check whether true dependence exist. */
+struct check_dependence_data
+{
+ enum machine_mode mode;
+ rtx exp;
+};
+static int
+check_dependence (x, data)
+ rtx *x;
+ void *data;
+{
+ struct check_dependence_data *d = (struct check_dependence_data *) data;
+ if (*x && GET_CODE (*x) == MEM)
+ return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
+ else
+ return 0;
+}
+\f
/* Remove from the hash table, or mark as invalid, all expressions whose
values could be altered by storing in X. X is a register, a subreg, or
a memory reference with nonvarying address (because, when a memory
{
next = p->next_same_hash;
- if (GET_CODE (p->exp) != REG
- || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
- continue;
-
+ if (GET_CODE (p->exp) != REG
+ || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
+ continue;
+
tregno = REGNO (p->exp);
tendregno
= tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
return;
case PARALLEL:
- for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
+ for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
invalidate (XVECEXP (x, 0, i), VOIDmode);
return;
next = p->next_same_hash;
if (p->in_memory)
{
- if (GET_CODE (p->exp) != MEM)
+ struct check_dependence_data d;
+
+ /* Just canonicalize the expression once;
+ otherwise each time we call invalidate
+ true_dependence will canonicalize the
+ expression again. */
+ if (!p->canon_exp)
+ p->canon_exp = canon_rtx (p->exp);
+ d.exp = x;
+ d.mode = full_mode;
+ if (for_each_rtx (&p->canon_exp, check_dependence, &d))
remove_from_table (p, i);
- else
- {
- /* Just canonicalize the expression once;
- otherwise each time we call invalidate
- true_dependence will canonicalize the
- expression again. */
- if (!p->canon_exp)
- p->canon_exp = canon_rtx (p->exp);
- if (true_dependence (x, full_mode, p->canon_exp,
- cse_rtx_varies_p))
- remove_from_table (p, i);
- }
}
}
}
{
rtx exp;
next = p->next_same_hash;
-
+
exp = p->exp;
if (GET_CODE (p->exp) != REG
&& (GET_CODE (exp) != SUBREG
|| (((SUBREG_WORD (exp)
+ (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
>= word)
- && SUBREG_WORD (exp) <= end))
+ && SUBREG_WORD (exp) <= end))
&& refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
remove_from_table (p, i);
}
return plus_constant (q->exp, offset);
}
\f
+/* Hash a string. Just add its bytes up. */
+static inline unsigned
+canon_hash_string (ps)
+ const char *ps;
+{
+ unsigned hash = 0;
+ const unsigned char *p = (const unsigned char *)ps;
+
+ if (p)
+ while (*p)
+ hash += *p++;
+
+ return hash;
+}
+
/* Hash an rtx. We are careful to make sure the value is never negative.
Equivalent registers hash identically.
MODE is used in hashing for CONST_INTs only;
/* On some machines, we can't record any non-fixed hard register,
because extending its life will cause reload problems. We
- consider ap, fp, and sp to be fixed for this purpose.
+ consider ap, fp, and sp to be fixed for this purpose.
We also consider CCmode registers to be fixed for this purpose;
failure to do so leads to failure to simplify 0<100 type of
/* Assume there is only one rtx object for any given label. */
case LABEL_REF:
- hash
- += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
+ hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
return hash;
case SYMBOL_REF:
- hash
- += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
+ hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
return hash;
case MEM:
x = XEXP (x, 0);
goto repeat;
+ case USE:
+ /* A USE that mentions non-volatile memory needs special
+ handling since the MEM may be BLKmode which normally
+ prevents an entry from being made. Pure calls are
+ marked by a USE which mentions BLKmode memory. */
+ if (GET_CODE (XEXP (x, 0)) == MEM
+ && ! MEM_VOLATILE_P (XEXP (x, 0)))
+ {
+ hash += (unsigned)USE;
+ x = XEXP (x, 0);
+
+ if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
+ hash_arg_in_memory = 1;
+
+ /* Now that we have already found this special case,
+ might as well speed it up as much as possible. */
+ hash += (unsigned) MEM;
+ x = XEXP (x, 0);
+ goto repeat;
+ }
+ break;
+
case PRE_DEC:
case PRE_INC:
case POST_DEC:
case POST_INC:
+ case PRE_MODIFY:
+ case POST_MODIFY:
case PC:
case CC0:
case CALL:
do_not_record = 1;
return 0;
}
+ else
+ {
+ /* We don't want to take the filename and line into account. */
+ hash += (unsigned) code + (unsigned) GET_MODE (x)
+ + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
+ + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
+ + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
+
+ if (ASM_OPERANDS_INPUT_LENGTH (x))
+ {
+ for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
+ {
+ hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
+ GET_MODE (ASM_OPERANDS_INPUT (x, i)))
+ + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
+ (x, i)));
+ }
+
+ hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
+ x = ASM_OPERANDS_INPUT (x, 0);
+ mode = GET_MODE (x);
+ goto repeat;
+ }
+
+ return hash;
+ }
break;
-
+
default:
break;
}
for (j = 0; j < XVECLEN (x, i); j++)
hash += canon_hash (XVECEXP (x, i, j), 0);
else if (fmt[i] == 's')
- {
- register const unsigned char *p =
- (const unsigned char *) XSTR (x, i);
-
- if (p)
- while (*p)
- hash += *p++;
- }
+ hash += canon_hash_string (XSTR (x, i));
else if (fmt[i] == 'i')
{
register unsigned tem = XINT (x, i);
hash += tem;
}
else if (fmt[i] == '0' || fmt[i] == 't')
- /* unused */;
+ /* Unused. */
+ ;
else
abort ();
}
validate, equal_values)
&& exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
validate, equal_values)));
-
+
+ case ASM_OPERANDS:
+ /* We don't use the generic code below because we want to
+ disregard filename and line numbers. */
+
+ /* A volatile asm isn't equivalent to any other. */
+ if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
+ return 0;
+
+ if (GET_MODE (x) != GET_MODE (y)
+ || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
+ || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
+ ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
+ || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
+ || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
+ return 0;
+
+ if (ASM_OPERANDS_INPUT_LENGTH (x))
+ {
+ for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
+ if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
+ ASM_OPERANDS_INPUT (y, i),
+ validate, equal_values)
+ || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
+ ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
+ return 0;
+ }
+
+ return 1;
+
default:
break;
}
case 'w':
if (XWINT (x, i) != XWINT (y, i))
return 0;
- break;
+ break;
case '0':
case 't':
default:
abort ();
}
- }
+ }
return 1;
}
|| ! REGNO_QTY_VALID_P (REGNO (x)))
return x;
- q = REG_QTY (REGNO(x));
+ q = REG_QTY (REGNO (x));
ent = &qty_table[q];
first = ent->first_reg;
return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
: REGNO_REG_CLASS (first) == NO_REGS ? x
: gen_rtx_REG (ent->mode, first));
}
-
+
default:
break;
}
*/
static void
-find_best_addr (insn, loc)
+find_best_addr (insn, loc, mode)
rtx insn;
rtx *loc;
+ enum machine_mode mode;
{
struct table_elt *elt;
rtx addr = *loc;
if (GET_CODE (addr) != REG)
{
rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
-
- if (1
-#ifdef ADDRESS_COST
- && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
- || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
- && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
-#else
- && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
-#endif
+ int addr_folded_cost = address_cost (folded, mode);
+ int addr_cost = address_cost (addr, mode);
+
+ if ((addr_folded_cost < addr_cost
+ || (addr_folded_cost == addr_cost
+ /* ??? The rtx_cost comparison is left over from an older
+ version of this code. It is probably no longer helpful. */
+ && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
+ || approx_reg_cost (folded) < approx_reg_cost (addr))))
&& validate_change (insn, loc, folded, 0))
addr = folded;
}
-
+
/* If this address is not in the hash table, we can't look for equivalences
of the whole address. Also, ignore if volatile. */
while (found_better)
{
- int best_addr_cost = CSE_ADDRESS_COST (*loc);
+ int best_addr_cost = address_cost (*loc, mode);
int best_rtx_cost = (elt->cost + 1) >> 1;
- struct table_elt *best_elt = elt;
+ int exp_cost;
+ struct table_elt *best_elt = elt;
found_better = 0;
for (p = elt->first_same_value; p; p = p->next_same_value)
{
if ((GET_CODE (p->exp) == REG
|| exp_equiv_p (p->exp, p->exp, 1, 0))
- && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
- || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
- && (p->cost + 1) >> 1 > best_rtx_cost)))
+ && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
+ || (exp_cost == best_addr_cost
+ && (p->cost + 1) >> 1 < best_rtx_cost)))
{
found_better = 1;
- best_addr_cost = CSE_ADDRESS_COST (p->exp);
+ best_addr_cost = exp_cost;
best_rtx_cost = (p->cost + 1) >> 1;
best_elt = p;
}
while (found_better)
{
- int best_addr_cost = CSE_ADDRESS_COST (*loc);
+ int best_addr_cost = address_cost (*loc, mode);
int best_rtx_cost = (COST (*loc) + 1) >> 1;
- struct table_elt *best_elt = elt;
+ struct table_elt *best_elt = elt;
rtx best_rtx = *loc;
int count;
{
rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
p->exp, c);
+ int new_cost;
+ new_cost = address_cost (new, mode);
- if ((CSE_ADDRESS_COST (new) < best_addr_cost
- || (CSE_ADDRESS_COST (new) == best_addr_cost
- && (COST (new) + 1) >> 1 > best_rtx_cost)))
+ if (new_cost < best_addr_cost
+ || (new_cost == best_addr_cost
+ && (COST (new) + 1) >> 1 > best_rtx_cost))
{
found_better = 1;
- best_addr_cost = CSE_ADDRESS_COST (new);
+ best_addr_cost = new_cost;
best_rtx_cost = (COST (new) + 1) >> 1;
best_elt = p;
best_rtx = new;
that lets us see what is being compared. */
p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
GET_MODE (arg1));
- if (p) p = p->first_same_value;
+ if (p)
+ p = p->first_same_value;
for (; p; p = p->next_same_value)
{
if (x == 0)
break;
- arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
+ arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
if (GET_RTX_CLASS (GET_CODE (x)) == '<')
code = GET_CODE (x);
static rtx
fold_rtx (x, insn)
rtx x;
- rtx insn;
+ rtx insn;
{
register enum rtx_code code;
register enum machine_mode mode;
&& GET_MODE_SIZE (imode) <= UNITS_PER_WORD
&& (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
imode)) != 0)
- for (elt = elt->first_same_value;
- elt; elt = elt->next_same_value)
+ for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
{
if (CONSTANT_P (elt->exp)
&& GET_MODE (elt->exp) == VOIDmode)
extra bits will be. But we can find an equivalence for this SUBREG
by folding that operation is the narrow mode. This allows us to
fold arithmetic in narrow modes when the machine only supports
- word-sized arithmetic.
+ word-sized arithmetic.
Also look for a case where we have a SUBREG whose operand is the
same as our result. If both modes are smaller than a word, we
if (op1)
op1 = equiv_constant (op1);
- /* If we are looking for the low SImode part of
+ /* If we are looking for the low SImode part of
(ashift:DI c (const_int 32)), it doesn't work
to compute that in SImode, because a 32-bit shift
in SImode is unpredictable. We know the value is 0. */
&& INTVAL (op1) >= GET_MODE_BITSIZE (mode))
{
if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
-
+
/* If the count fits in the inner mode's width,
but exceeds the outer mode's width,
the value will get truncated to 0
best address. Not only don't we care, but we could modify the
MEM in an invalid way since we have no insn to validate against. */
if (insn != 0)
- find_best_addr (insn, &XEXP (x, 0));
+ find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
{
/* Even if we don't fold in the insn itself,
{
rtx label = XEXP (base, 0);
rtx table_insn = NEXT_INSN (label);
-
+
if (table_insn && GET_CODE (table_insn) == JUMP_INSN
&& GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
{
if (GET_MODE (table) != Pmode)
new = gen_rtx_TRUNCATE (GET_MODE (table), new);
- /* Indicate this is a constant. This isn't a
+ /* Indicate this is a constant. This isn't a
valid form of CONST, but it will only be used
to fold the next insns and then discarded, so
it should be safe.
return x;
}
+#ifdef NO_FUNCTION_CSE
+ case CALL:
+ if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
+ return x;
+ break;
+#endif
+
case ASM_OPERANDS:
- for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
- validate_change (insn, &XVECEXP (x, 3, i),
- fold_rtx (XVECEXP (x, 3, i), insn), 0);
+ for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
+ validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
+ fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
break;
-
+
default:
break;
}
if (fmt[i] == 'E')
/* Don't try to fold inside of a vector of expressions.
Doing nothing is harmless. */
- {;}
+ {;}
}
/* If a commutative operation, place a constant integer as the second
new = gen_rtx_CONST (mode, new);
}
break;
-
+
case '<':
/* See what items are actually being compared and set FOLDED_ARG[01]
to those values and CODE to the actual comparison code. If any are
}
}
- new = simplify_relational_operation (code, mode_arg0,
+ new = simplify_relational_operation (code,
+ (mode_arg0 != VOIDmode
+ ? mode_arg0
+ : (GET_MODE (const_arg0
+ ? const_arg0
+ : folded_arg0)
+ != VOIDmode)
+ ? GET_MODE (const_arg0
+ ? const_arg0
+ : folded_arg0)
+ : GET_MODE (const_arg1
+ ? const_arg1
+ : folded_arg1)),
const_arg0 ? const_arg0 : folded_arg0,
const_arg1 ? const_arg1 : folded_arg1);
#ifdef FLOAT_STORE_FLAG_VALUE
{
rtx y
= GET_CODE (folded_arg0) == MINUS ? folded_arg0
- : lookup_as_function (folded_arg0, MINUS);
+ : lookup_as_function (folded_arg0, MINUS);
if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
&& XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
: lookup_as_function (folded_arg0, CONST))) != 0
&& GET_CODE (XEXP (y, 0)) == MINUS
&& GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
- && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
+ && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
return XEXP (XEXP (y, 0), 0);
}
{
rtx y
= GET_CODE (folded_arg1) == MINUS ? folded_arg1
- : lookup_as_function (folded_arg1, MINUS);
+ : lookup_as_function (folded_arg1, MINUS);
if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
&& XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
: lookup_as_function (folded_arg1, CONST))) != 0
&& GET_CODE (XEXP (y, 0)) == MINUS
&& GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
- && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
+ && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
return XEXP (XEXP (y, 0), 0);
}
&& INTVAL (const_arg1) < 0
/* This used to test
- - INTVAL (const_arg1) >= 0
+ -INTVAL (const_arg1) >= 0
But The Sun V5.0 compilers mis-compiled that test. So
instead we test for the problematic value in a more direct
((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
&& GET_CODE (folded_arg1) == REG)
{
- rtx new_const = GEN_INT (- INTVAL (const_arg1));
+ rtx new_const = GEN_INT (-INTVAL (const_arg1));
struct table_elt *p
= lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
mode);
NULL_RTX);
}
- /* ... fall through ... */
+ /* Fall through. */
from_plus:
case SMIN: case SMAX: case UMIN: case UMAX:
break;
case 'x':
- /* Always eliminate CONSTANT_P_RTX at this stage. */
+ /* Always eliminate CONSTANT_P_RTX at this stage. */
if (code == CONSTANT_P_RTX)
return (const_arg0 ? const1_rtx : const0_rtx);
break;
/* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
least-significant part of X.
- MODE specifies how big a part of X to return.
+ MODE specifies how big a part of X to return.
If the requested operation cannot be done, 0 is returned.
new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
if (! memory_address_p (mode, XEXP (new, 0)))
return 0;
- RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
MEM_COPY_ATTRIBUTES (new, x);
return new;
}
branch. It will be zero if not.
In certain cases, this can cause us to add an equivalence. For example,
- if we are following the taken case of
+ if we are following the taken case of
if (i == 2)
we can add the fact that `i' and '2' are now equivalent.
{
int cond_known_true;
rtx op0, op1;
+ rtx set;
enum machine_mode mode, mode0, mode1;
int reversed_nonequality = 0;
enum rtx_code code;
/* Ensure this is the right kind of insn. */
- if (! condjump_p (insn) || simplejump_p (insn))
+ if (! any_condjump_p (insn))
return;
+ set = pc_set (insn);
/* See if this jump condition is known true or false. */
if (taken)
- cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
+ cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
else
- cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
+ cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
/* Get the type of comparison being done and the operands being compared.
If we had to reverse a non-equality condition, record that fact so we
know that it isn't valid for floating-point. */
- code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
- op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
- op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
+ code = GET_CODE (XEXP (SET_SRC (set), 0));
+ op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
+ op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
if (! cond_known_true)
reversed_nonequality);
}
- /* Similarly, if this is an NE comparison, and either is a SUBREG
+ /* Similarly, if this is an NE comparison, and either is a SUBREG
making a smaller mode, we know the whole thing is also NE. */
/* Note that GET_MODE (op0) may not equal MODE;
hash_arg_in_memory = 0;
op1_hash = HASH (op1, mode);
op1_in_memory = hash_arg_in_memory;
-
+
if (do_not_record)
return;
First simplify sources and addresses of all assignments
in the instruction, using previously-computed equivalents values.
Then install the new sources and destinations in the table
- of available values.
+ of available values.
If LIBCALL_INSN is nonzero, don't record any equivalence made in
the insn. It means that INSN is inside libcall block. In this
- case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
+ case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
/* Data on one SET contained in the instruction. */
unsigned dest_hash;
/* The SET_DEST, with SUBREG, etc., stripped. */
rtx inner_dest;
- /* Nonzero if the SET_SRC is in memory. */
+ /* Nonzero if the SET_SRC is in memory. */
char src_in_memory;
/* Nonzero if the SET_SRC contains something
whose value cannot be predicted and understood. */
{
for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
- invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
+ invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
}
if (GET_CODE (x) == SET)
invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
}
}
-
+
for (i = 0; i < lim; i++)
{
register rtx y = XVECEXP (x, 0, i);
group and see if they all work. Note that this will cause some
canonicalizations that would have worked individually not to be applied
because some other canonicalization didn't work, but this should not
- occur often.
+ occur often.
The result of apply_change_group can be ignored; see canon_reg. */
rtx src_const = 0;
rtx src_related = 0;
struct table_elt *src_const_elt = 0;
- int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
- int src_related_cost = 10000, src_elt_cost = 10000;
+ int src_cost = MAX_COST, src_eqv_cost = MAX_COST, src_folded_cost = MAX_COST;
+ int src_related_cost = MAX_COST, src_elt_cost = MAX_COST;
+ int src_regcost, src_eqv_regcost, src_folded_regcost;
+ int src_related_regcost, src_elt_regcost;
/* Set non-zero if we need to call force_const_mem on with the
contents of src_folded before using it. */
int src_folded_force_flag = 0;
sets[i].src_elt = elt;
if (elt && src_eqv_here && src_eqv_elt)
- {
- if (elt->first_same_value != src_eqv_elt->first_same_value)
+ {
+ if (elt->first_same_value != src_eqv_elt->first_same_value)
{
/* The REG_EQUAL is indicating that two formerly distinct
classes are now equivalent. So merge them. */
src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
}
- src_eqv_here = 0;
- }
+ src_eqv_here = 0;
+ }
else if (src_eqv_elt)
- elt = src_eqv_elt;
+ elt = src_eqv_elt;
/* Try to find a constant somewhere and record it in `src_const'.
Record its table element, if any, in `src_const_elt'. Look in
any known equivalences first. (If the constant is not in the
table, also set `sets[i].src_const_hash'). */
if (elt)
- for (p = elt->first_same_value; p; p = p->next_same_value)
+ for (p = elt->first_same_value; p; p = p->next_same_value)
if (p->is_const)
{
src_const = p->exp;
if (src_const == 0
&& (CONSTANT_P (src_folded)
- /* Consider (minus (label_ref L1) (label_ref L2)) as
+ /* Consider (minus (label_ref L1) (label_ref L2)) as
"constant" here so we will record it. This allows us
to fold switch statements when an ADDR_DIFF_VEC is used. */
|| (GET_CODE (src_folded) == MINUS
if (src_const
&& (GET_CODE (src_const) == CONST
|| (src_const_elt && src_const_elt->related_value != 0)))
- {
- src_related = use_related_value (src_const, src_const_elt);
- if (src_related)
- {
+ {
+ src_related = use_related_value (src_const, src_const_elt);
+ if (src_related)
+ {
struct table_elt *src_related_elt
- = lookup (src_related, HASH (src_related, mode), mode);
+ = lookup (src_related, HASH (src_related, mode), mode);
if (src_related_elt && elt)
- {
+ {
if (elt->first_same_value
!= src_related_elt->first_same_value)
- /* This can occur when we previously saw a CONST
+ /* This can occur when we previously saw a CONST
involving a SYMBOL_REF and then see the SYMBOL_REF
twice. Merge the involved classes. */
merge_equiv_classes (elt, src_related_elt);
- src_related = 0;
+ src_related = 0;
src_related_elt = 0;
- }
- else if (src_related_elt && elt == 0)
- elt = src_related_elt;
+ }
+ else if (src_related_elt && elt == 0)
+ elt = src_related_elt;
}
- }
+ }
/* See if we have a CONST_INT that is already in a register in a
wider mode. */
if it has, we can use a subreg of that. Many CISC machines
also have such operations, but this is only likely to be
beneficial these machines. */
-
- if (flag_expensive_optimizations && src_related == 0
+
+ if (flag_expensive_optimizations && src_related == 0
&& (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
&& GET_MODE_CLASS (mode) == MODE_INT
&& GET_CODE (src) == MEM && ! do_not_record
&& LOAD_EXTEND_OP (mode) != NIL)
{
enum machine_mode tmode;
-
+
/* Set what we are trying to extend and the operation it might
have been extended with. */
PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
XEXP (memory_extend_rtx, 0) = src;
-
+
for (tmode = GET_MODE_WIDER_MODE (mode);
GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
tmode = GET_MODE_WIDER_MODE (tmode))
{
struct table_elt *larger_elt;
-
+
PUT_MODE (memory_extend_rtx, tmode);
- larger_elt = lookup (memory_extend_rtx,
+ larger_elt = lookup (memory_extend_rtx,
HASH (memory_extend_rtx, tmode), tmode);
if (larger_elt == 0)
continue;
-
+
for (larger_elt = larger_elt->first_same_value;
larger_elt; larger_elt = larger_elt->next_same_value)
if (GET_CODE (larger_elt->exp) == REG)
{
- src_related = gen_lowpart_if_possible (mode,
+ src_related = gen_lowpart_if_possible (mode,
larger_elt->exp);
break;
}
-
+
if (src_related)
break;
}
}
#endif /* LOAD_EXTEND_OP */
-
+
if (src == src_folded)
- src_folded = 0;
+ src_folded = 0;
/* At this point, ELT, if non-zero, points to a class of expressions
equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
elimination of the insn. Indicate this by placing it in
`src_related'. */
- if (elt) elt = elt->first_same_value;
+ if (elt)
+ elt = elt->first_same_value;
for (p = elt; p; p = p->next_same_value)
- {
+ {
enum rtx_code code = GET_CODE (p->exp);
/* If the expression is not valid, ignore it. Then we do not
< GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
continue;
- if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
+ if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
src = 0;
- else if (src_folded && GET_CODE (src_folded) == code
+ else if (src_folded && GET_CODE (src_folded) == code
&& rtx_equal_p (src_folded, p->exp))
src_folded = 0;
- else if (src_eqv_here && GET_CODE (src_eqv_here) == code
+ else if (src_eqv_here && GET_CODE (src_eqv_here) == code
&& rtx_equal_p (src_eqv_here, p->exp))
src_eqv_here = 0;
- else if (src_related && GET_CODE (src_related) == code
+ else if (src_related && GET_CODE (src_related) == code
&& rtx_equal_p (src_related, p->exp))
src_related = 0;
then give it a negative cost. */
if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
src_related = dest;
-
- }
+ }
/* Find the cheapest valid equivalent, trying all the available
possibilities. Prefer items not in the hash table to ones
if (src)
{
if (rtx_equal_p (src, dest))
- src_cost = -1;
+ src_cost = src_regcost = -1;
else
- src_cost = COST (src);
+ {
+ src_cost = COST (src);
+ src_regcost = approx_reg_cost (src);
+ }
}
if (src_eqv_here)
{
if (rtx_equal_p (src_eqv_here, dest))
- src_eqv_cost = -1;
+ src_eqv_cost = src_eqv_regcost = -1;
else
- src_eqv_cost = COST (src_eqv_here);
+ {
+ src_eqv_cost = COST (src_eqv_here);
+ src_eqv_regcost = approx_reg_cost (src_eqv_here);
+ }
}
if (src_folded)
{
if (rtx_equal_p (src_folded, dest))
- src_folded_cost = -1;
+ src_folded_cost = src_folded_regcost = -1;
else
- src_folded_cost = COST (src_folded);
+ {
+ src_folded_cost = COST (src_folded);
+ src_folded_regcost = approx_reg_cost (src_folded);
+ }
}
if (src_related)
{
if (rtx_equal_p (src_related, dest))
- src_related_cost = -1;
+ src_related_cost = src_related_regcost = -1;
else
- src_related_cost = COST (src_related);
+ {
+ src_related_cost = COST (src_related);
+ src_related_regcost = approx_reg_cost (src_related);
+ }
}
/* If this was an indirect jump insn, a known label will really be
cheaper even though it looks more expensive. */
if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
- src_folded = src_const, src_folded_cost = -1;
-
+ src_folded = src_const, src_folded_cost = src_folded_regcost -1;
+
/* Terminate loop when replacement made. This must terminate since
the current contents will be tested and will always be valid. */
while (1)
- {
- rtx trial;
+ {
+ rtx trial;
- /* Skip invalid entries. */
- while (elt && GET_CODE (elt->exp) != REG
- && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
- elt = elt->next_same_value;
+ /* Skip invalid entries. */
+ while (elt && GET_CODE (elt->exp) != REG
+ && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
+ elt = elt->next_same_value;
/* A paradoxical subreg would be bad here: it'll be the right
size, but later may be adjusted so that the upper bits aren't
elt = elt->next_same_value;
continue;
}
-
- if (elt) src_elt_cost = elt->cost;
+
+ if (elt)
+ {
+ src_elt_cost = elt->cost;
+ src_elt_regcost = elt->regcost;
+ }
/* Find cheapest and skip it for the next time. For items
of equal cost, use this order:
src_folded, src, src_eqv, src_related and hash table entry. */
- if (src_folded_cost <= src_cost
- && src_folded_cost <= src_eqv_cost
- && src_folded_cost <= src_related_cost
- && src_folded_cost <= src_elt_cost)
+ if (preferrable (src_folded_cost, src_folded_regcost,
+ src_cost, src_regcost) <= 0
+ && preferrable (src_folded_cost, src_folded_regcost,
+ src_eqv_cost, src_eqv_regcost) <= 0
+ && preferrable (src_folded_cost, src_folded_regcost,
+ src_related_cost, src_related_regcost) <= 0
+ && preferrable (src_folded_cost, src_folded_regcost,
+ src_elt_cost, src_elt_regcost) <= 0)
{
- trial = src_folded, src_folded_cost = 10000;
+ trial = src_folded, src_folded_cost = MAX_COST;
if (src_folded_force_flag)
trial = force_const_mem (mode, trial);
}
- else if (src_cost <= src_eqv_cost
- && src_cost <= src_related_cost
- && src_cost <= src_elt_cost)
- trial = src, src_cost = 10000;
- else if (src_eqv_cost <= src_related_cost
- && src_eqv_cost <= src_elt_cost)
- trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
- else if (src_related_cost <= src_elt_cost)
- trial = copy_rtx (src_related), src_related_cost = 10000;
- else
+ else if (preferrable (src_cost, src_regcost,
+ src_eqv_cost, src_eqv_regcost) <= 0
+ && preferrable (src_cost, src_regcost,
+ src_related_cost, src_related_regcost) <= 0
+ && preferrable (src_cost, src_regcost,
+ src_elt_cost, src_elt_regcost) <= 0)
+ trial = src, src_cost = MAX_COST;
+ else if (preferrable (src_eqv_cost, src_eqv_regcost,
+ src_related_cost, src_related_regcost) <= 0
+ && preferrable (src_eqv_cost, src_eqv_regcost,
+ src_elt_cost, src_elt_regcost) <= 0)
+ trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
+ else if (preferrable (src_related_cost, src_related_regcost,
+ src_elt_cost, src_elt_regcost) <= 0)
+ trial = copy_rtx (src_related), src_related_cost = MAX_COST;
+ else
{
trial = copy_rtx (elt->exp);
elt = elt->next_same_value;
- src_elt_cost = 10000;
+ src_elt_cost = MAX_COST;
}
/* We don't normally have an insn matching (set (pc) (pc)), so
PATTERN (insn) = gen_jump (XEXP (trial, 0));
INSN_CODE (insn) = -1;
+
+ if (NEXT_INSN (insn) != 0
+ && GET_CODE (NEXT_INSN (insn)) != BARRIER)
+ emit_barrier_after (insn);
+
cse_jumps_altered = 1;
break;
}
-
+
/* Look for a substitution that makes a valid insn. */
- else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
+ else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
{
/* If we just made a substitution inside a libcall, then we
need to make the same substitution in any notes attached
if (libcall_insn
&& (GET_CODE (sets[i].orig_src) == REG
|| GET_CODE (sets[i].orig_src) == SUBREG
- || GET_CODE (sets[i].orig_src) == MEM))
- replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
+ || GET_CODE (sets[i].orig_src) == MEM))
+ replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
canon_reg (SET_SRC (sets[i].rtl), insn));
/* The result of apply_change_group can be ignored; see
break;
}
- /* If we previously found constant pool entries for
+ /* If we previously found constant pool entries for
constants and this is a constant, try making a
pool entry. Put it in src_folded unless we already have done
this since that is where it likely came from. */
else if (constant_pool_entries_cost
&& CONSTANT_P (trial)
+ /* Reject cases that will abort in decode_rtx_const.
+ On the alpha when simplifying a switch, we get
+ (const (truncate (minus (label_ref) (label_ref)))). */
&& ! (GET_CODE (trial) == CONST
&& GET_CODE (XEXP (trial, 0)) == TRUNCATE)
+ /* Likewise on IA-64, except without the truncate. */
+ && ! (GET_CODE (trial) == CONST
+ && GET_CODE (XEXP (trial, 0)) == MINUS
+ && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
+ && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
&& (src_folded == 0
|| (GET_CODE (src_folded) != MEM
&& ! src_folded_force_flag))
src_folded = trial;
src_folded_cost = constant_pool_entries_cost;
}
- }
+ }
src = SET_SRC (sets[i].rtl);
setting SRC to, use that constant. We ignored it when we
thought we could make this into a no-op. */
if (src_const && COST (src_const) < COST (src)
- && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
- 0))
+ && validate_change (insn, &SET_SRC (sets[i].rtl),
+ src_const, 0))
src = src_const;
}
}
/* If we made a change, recompute SRC values. */
if (src != sets[i].src)
- {
+ {
cse_altered = 1;
- do_not_record = 0;
- hash_arg_in_memory = 0;
+ do_not_record = 0;
+ hash_arg_in_memory = 0;
sets[i].src = src;
- sets[i].src_hash = HASH (src, mode);
- sets[i].src_volatile = do_not_record;
- sets[i].src_in_memory = hash_arg_in_memory;
- sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
- }
+ sets[i].src_hash = HASH (src, mode);
+ sets[i].src_volatile = do_not_record;
+ sets[i].src_in_memory = hash_arg_in_memory;
+ sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
+ }
/* If this is a single SET, we are setting a register, and we have an
equivalent constant, we want to add a REG_NOTE. We don't want
to write a REG_EQUAL note for a constant pseudo since verifying that
that pseudo hasn't been eliminated is a pain. Such a note also
- won't help anything.
+ won't help anything.
Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
which can be created for a reference to a compile time computable
&& GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
{
tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
-
+
/* Make sure that the rtx is not shared with any other insn. */
src_const = copy_rtx (src_const);
#ifdef PUSH_ROUNDING
/* Stack pushes invalidate the stack pointer. */
rtx addr = XEXP (dest, 0);
- if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
- || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
+ if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
&& XEXP (addr, 0) == stack_pointer_rtx)
invalidate (stack_pointer_rtx, Pmode);
#endif
else if (do_not_record)
{
- if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
- || GET_CODE (dest) == MEM)
+ if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
invalidate (dest, VOIDmode);
+ else if (GET_CODE (dest) == MEM)
+ {
+ /* Outgoing arguments for a libcall don't
+ affect any recorded expressions. */
+ if (! libcall_insn || insn == libcall_insn)
+ invalidate (dest, VOIDmode);
+ }
else if (GET_CODE (dest) == STRICT_LOW_PART
|| GET_CODE (dest) == ZERO_EXTRACT)
invalidate (XEXP (dest, 0), GET_MODE (dest));
invalidate_from_clobbers (x);
- /* Some registers are invalidated by subroutine calls. Memory is
+ /* Some registers are invalidated by subroutine calls. Memory is
invalidated by non-constant calls. */
if (GET_CODE (insn) == CALL_INSN)
previous quantity's chain.
Needed for memory if this is a nonvarying address, unless
we have just done an invalidate_memory that covers even those. */
- if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
- || GET_CODE (dest) == MEM)
+ if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
invalidate (dest, VOIDmode);
+ else if (GET_CODE (dest) == MEM)
+ {
+ /* Outgoing arguments for a libcall don't
+ affect any recorded expressions. */
+ if (! libcall_insn || insn == libcall_insn)
+ invalidate (dest, VOIDmode);
+ }
else if (GET_CODE (dest) == STRICT_LOW_PART
|| GET_CODE (dest) == ZERO_EXTRACT)
invalidate (XEXP (dest, 0), GET_MODE (dest));
if (GET_CODE (inner_dest) == MEM
&& GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
/* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
- that (MEM (ADDRESSOF (X))) is equivalent to Y.
+ that (MEM (ADDRESSOF (X))) is equivalent to Y.
Consider the case in which the address of the MEM is
passed to a function, which alters the MEM. Then, if we
later use Y instead of the MEM we'll miss the update. */
However, BAR may have equivalences for which gen_lowpart_if_possible
will produce a simpler value than gen_lowpart_if_possible applied to
BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
- BAR's equivalences. If we don't get a simplified form, make
+ BAR's equivalences. If we don't get a simplified form, make
the SUBREG. It will not be used in an equivalence, but will
cause two similar assignments to be detected.
if (GET_CODE (dest) == SUBREG
&& (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
/ UNITS_PER_WORD)
- == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
+ == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
&& (GET_MODE_SIZE (GET_MODE (dest))
>= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
&& sets[i].src_elt != 0)
src_elt->in_memory = elt->in_memory;
}
else if (classp && classp != src_elt->first_same_value)
- /* Show that two things that we've seen before are
+ /* Show that two things that we've seen before are
actually the same. */
merge_equiv_classes (src_elt, classp);
}
}
- /* Special handling for (set REG0 REG1)
- where REG0 is the "cheapest", cheaper than REG1.
- After cse, REG1 will probably not be used in the sequel,
- so (if easily done) change this insn to (set REG1 REG0) and
- replace REG1 with REG0 in the previous insn that computed their value.
- Then REG1 will become a dead store and won't cloud the situation
- for later optimizations.
+ /* Special handling for (set REG0 REG1) where REG0 is the
+ "cheapest", cheaper than REG1. After cse, REG1 will probably not
+ be used in the sequel, so (if easily done) change this insn to
+ (set REG1 REG0) and replace REG1 with REG0 in the previous insn
+ that computed their value. Then REG1 will become a dead store
+ and won't cloud the situation for later optimizations.
Do not make this change if REG1 is a hard register, because it will
then be used in the sequel and we may be changing a two-operand insn
if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
&& ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
{
- rtx prev = PREV_INSN (insn);
- while (prev && GET_CODE (prev) == NOTE)
- prev = PREV_INSN (prev);
+ rtx prev = prev_nonnote_insn (insn);
- if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
+ if (prev != 0 && GET_CODE (prev) == INSN
+ && GET_CODE (PATTERN (prev)) == SET
&& SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
{
rtx dest = SET_DEST (sets[0].rtl);
+ rtx src = SET_SRC (sets[0].rtl);
rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
- validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
- validate_change (insn, & SET_DEST (sets[0].rtl),
- SET_SRC (sets[0].rtl), 1);
- validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
+ validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
+ validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
+ validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
apply_change_group ();
/* If REG1 was equivalent to a constant, REG0 is not. */
REG_NOTES (prev) = note;
}
- /* If INSN has a REG_EQUAL note, and this note mentions REG0,
- then we must delete it, because the value in REG0 has changed. */
+ /* If INSN has a REG_EQUAL note, and this note mentions
+ REG0, then we must delete it, because the value in
+ REG0 has changed. If the note's value is REG1, we must
+ also delete it because that is now this insn's dest. */
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
- if (note && reg_mentioned_p (dest, XEXP (note, 0)))
+ if (note != 0
+ && (reg_mentioned_p (dest, XEXP (note, 0))
+ || rtx_equal_p (src, XEXP (note, 0))))
remove_note (insn, note);
}
}
addr_affects_sp_p (addr)
register rtx addr;
{
- if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
- || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
+ if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
&& GET_CODE (XEXP (addr, 0)) == REG
&& REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
{
/* Otherwise, canonicalize this register. */
return canon_reg (x, NULL_RTX);
-
+
default:
break;
}
for (p = last_jump_equiv_class->first_same_value; p;
p = p->next_same_value)
{
- if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
+ if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
|| (GET_CODE (p->exp) == SUBREG
- && GET_CODE (SUBREG_REG (p->exp)) == REG))
+ && GET_CODE (SUBREG_REG (p->exp)) == REG))
invalidate (p->exp, VOIDmode);
- else if (GET_CODE (p->exp) == STRICT_LOW_PART
- || GET_CODE (p->exp) == ZERO_EXTRACT)
+ else if (GET_CODE (p->exp) == STRICT_LOW_PART
+ || GET_CODE (p->exp) == ZERO_EXTRACT)
invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
}
&& NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
insn = NEXT_INSN (insn))
{
- if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
+ if (INSN_P (insn)
&& (GET_CODE (PATTERN (insn)) == SET
|| GET_CODE (PATTERN (insn)) == CLOBBER))
cse_set_around_loop (PATTERN (insn), insn, loop_start);
- else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
- && GET_CODE (PATTERN (insn)) == PARALLEL)
+ else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
|| GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
enum rtx_code code = GET_CODE (dest);
if (code == MEM
- && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
+ && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
/* There are times when an address can appear varying and be a PLUS
during this scan when it would be a fixed address were we to know
the proper equivalences. So invalidate all memory if there is
for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
insn = NEXT_INSN (insn))
{
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+ if (! INSN_P (insn))
continue;
if (GET_CODE (insn) == CALL_INSN)
rtx q;
rtx cse_check_loop_start_value = SET_SRC (x);
for (q = p; q != loop_start; q = NEXT_INSN (q))
- if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
+ if (INSN_P (q))
note_stores (PATTERN (q),
cse_check_loop_start,
&cse_check_loop_start_value);
rtx p = insn, q;
int nsets = 0;
int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
- rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
+ rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
int path_size = data->path_size;
int path_entry = 0;
int i;
/* A PARALLEL can have lots of SETs in it,
especially if it is really an ASM_OPERANDS. */
- if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
- && GET_CODE (PATTERN (p)) == PARALLEL)
+ if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
nsets += XVECLEN (PATTERN (p), 0);
else if (GET_CODE (p) != NOTE)
nsets += 1;
-
+
/* Ignore insns made by CSE; they cannot affect the boundaries of
the basic block. */
{
if (data->path[path_entry].status != NOT_TAKEN)
p = JUMP_LABEL (p);
-
+
/* Point to next entry in path, if any. */
path_entry++;
}
else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
&& GET_CODE (p) == JUMP_INSN
- && GET_CODE (PATTERN (p)) == SET
+ && GET_CODE (PATTERN (p)) == SET
&& GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
&& JUMP_LABEL (p) != 0
&& LABEL_NUSES (JUMP_LABEL (p)) == 1
{
for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
if ((GET_CODE (q) != NOTE
- || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
- || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
- && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
+ || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
+ || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
+ && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
break;
/* If we ran into a BARRIER, this code is an extension of the
for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
if (GET_CODE (tmp) == CODE_LABEL)
break;
-
+
if (tmp == q)
{
data->path[path_entry].branch = p;
cse_basic_block_start = val.low_cuid;
cse_basic_block_end = val.high_cuid;
max_qty = val.nsets * 2;
-
+
if (file)
fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
(see `cse_end_of_basic_block'), we reprocess the code from the start.
Otherwise, we start after this basic block. */
if (val.path_size > 0)
- cse_basic_block (insn, val.last, val.path, 0);
+ cse_basic_block (insn, val.last, val.path, 0);
else
{
int old_cse_jumps_altered = cse_jumps_altered;
qty_table
= (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
- * sizeof (struct qty_table_elem));
+ * sizeof (struct qty_table_elem));
qty_table -= max_reg;
new_basic_block ();
continue;
}
}
-
+
if (GET_MODE (insn) == QImode)
PUT_MODE (insn, VOIDmode);
its destination is the result of the block and hence should be
recorded. */
- if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
- libcall_insn = XEXP (p, 0);
- else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
- libcall_insn = NULL_RTX;
+ if (REG_NOTES (insn) != 0)
+ {
+ if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
+ libcall_insn = XEXP (p, 0);
+ else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
+ libcall_insn = 0;
+ }
cse_insn (insn, libcall_insn);
}
basic block. If we are jumping to the end of our block, show
that we can have one usage of TO. */
- if (simplejump_p (insn))
+ if (any_uncondjump_p (insn))
{
if (to == 0)
{
/* Maybe TO was deleted because the jump is unconditional.
If so, there is nothing left in this basic block. */
/* ??? Perhaps it would be smarter to set TO
- to whatever follows this insn,
+ to whatever follows this insn,
and pretend the basic block had always ended here. */
if (INSN_DELETED_P (to))
break;
\f
/* Count the number of times registers are used (not set) in X.
COUNTS is an array in which we accumulate the count, INCR is how much
- we count each register usage.
+ we count each register usage.
- Don't count a usage of DEST, which is the SET_DEST of a SET which
+ Don't count a usage of DEST, which is the SET_DEST of a SET which
contains X in its SET_SRC. This is because such a SET does not
modify the liveness of DEST. */
case LABEL_REF:
return;
- case CLOBBER:
+ case CLOBBER:
/* If we are clobbering a MEM, mark any registers inside the address
as being used. */
if (GET_CODE (XEXP (x, 0)) == MEM)
case CALL_INSN:
count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
+ /* Fall through. */
- /* ... falls through ... */
case INSN:
case JUMP_INSN:
count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
return;
-
+
default:
break;
}
/* Go from the last insn to the first and delete insns that only set unused
registers or copy a register to itself. As we delete an insn, remove
- usage counts for registers it uses.
+ usage counts for registers it uses.
The first jump optimization pass may leave a real insn as the last
insn in the function. We must not skip that insn or we may end
up deleting code that is not really dead. */
insn = get_last_insn ();
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
+ if (! INSN_P (insn))
insn = prev_real_insn (insn);
- for ( ; insn; insn = prev)
+ for (; insn; insn = prev)
{
int live_insn = 0;
rtx note;
/* See if there's a REG_EQUAL note on this insn and try to
replace the source with the REG_EQUAL expression.
-
+
We assume that insns with REG_RETVALs can only be reg->reg
copies at this point. */
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
&& ! side_effects_p (SET_SRC (PATTERN (insn)))
&& ((tem = next_nonnote_insn (insn)) == 0
- || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
+ || ! INSN_P (tem)
|| ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
;
#endif
else if (GET_CODE (SET_DEST (elt)) == CC0
&& ! side_effects_p (SET_SRC (elt))
&& ((tem = next_nonnote_insn (insn)) == 0
- || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
+ || ! INSN_P (tem)
|| ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
;
#endif
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