* calls.c (expand_call, emit_library_call_value_1), collect2.c

[pf3gnuchains/gcc-fork.git] / gcc / config / sparc / sparc.md

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 82386e5..93734f9 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -50,7 +50,6 @@
 ;;                     2       goto_handler_and_restore
 ;;                     3       goto_handler_and_restore_v9*
 ;;                     4       flush
-;;                     5       nonlocal_goto_receiver
 ;;
 
 ;; The upper 32 fp regs on the v9 can't hold SFmode values.  To deal with this
@@ -5540,6 +5539,8 @@
   ""
   "
 {
+  HOST_WIDE_INT i;
+
   if (! TARGET_ARCH64)
     {
       emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
@@ -5552,9 +5553,17 @@
     }
   if (arith_double_4096_operand(operands[2], DImode))
     {
-      emit_insn (gen_rtx_SET (VOIDmode, operands[0],
-                             gen_rtx_MINUS (DImode, operands[1],
-                                            GEN_INT(-4096))));
+      switch (GET_CODE (operands[1]))
+       {
+       case CONST_INT: i = INTVAL (operands[1]); break;
+       case CONST_DOUBLE: i = CONST_DOUBLE_LOW (operands[1]); break;
+       default:
+         emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+                                 gen_rtx_MINUS (DImode, operands[1],
+                                                GEN_INT(-4096))));
+         DONE;
+       }
+      emit_insn (gen_movdi (operands[0], GEN_INT (i + 4096)));
       DONE;
     }
 }")
@@ -5769,11 +5778,15 @@
   ""
   "
 {
-  if (arith_4096_operand(operands[2], DImode))
+  if (arith_4096_operand(operands[2], SImode))
     {
-      emit_insn (gen_rtx_SET (VOIDmode, operands[0],
-                             gen_rtx_MINUS (SImode, operands[1],
-                                            GEN_INT(-4096))));
+      if (GET_CODE (operands[1]) == CONST_INT)
+       emit_insn (gen_movsi (operands[0],
+                             GEN_INT (INTVAL (operands[1]) + 4096)));
+      else
+       emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+                               gen_rtx_MINUS (SImode, operands[1],
+                                              GEN_INT(-4096))));
       DONE;
     }
 }")
@@ -5968,7 +5981,7 @@
   ""
   "
 {
-  if (arith_4096_operand(operands[2], DImode))
+  if (arith_4096_operand(operands[2], SImode))
     {
       emit_insn (gen_rtx_SET (VOIDmode, operands[0],
                              gen_rtx_PLUS (SImode, operands[1],
@@ -6241,8 +6254,8 @@
    (clobber (match_scratch:SI 4 "=X,&h"))]
   "TARGET_V8PLUS"
   "@
-   smul %1,%2,%0\;srlx %0,%3,%0
-   smul %1,%2,%4\;srlx %4,%3,%0"
+   smul\\t%1, %2, %0\;srlx\\t%0, %3, %0
+   smul\\t%1, %2, %4\;srlx\\t%4, %3, %0"
   [(set_attr "length" "2")])
 
 ;; The combiner changes TRUNCATE in the previous pattern to SUBREG.
@@ -8101,8 +8114,8 @@
   "*
 {
   if (GET_CODE (operands[2]) == REG && REGNO (operands[2]) == REGNO (operands[0]))
-    return \"mov 1,%L0\;sllx %L0,%2,%L0\;sub %L0,1,%L0\;srlx %L0,32,%H0\";
-  return \"mov 1,%H0\;sllx %H0,%2,%L0\;sub %L0,1,%L0\;srlx %L0,32,%H0\";
+    return \"mov\\t1, %L0\;sllx\\t%L0, %2, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
+  return \"mov\\t1, %H0\;sllx\\t%H0, %2, %L0\;sub\\t%L0, 1, %L0\;srlx\\t%L0, 32, %H0\";
 }"
   [(set_attr "length" "4")])
 
@@ -8860,7 +8873,7 @@
   [(unspec:SI [(match_operand:SI 0 "register_operand" "r")
               (match_operand:SI 1 "register_operand" "r")] 1)]
   "! TARGET_ARCH64"
-  "cmp %1,0\;be,a .+8\;add %0,4,%0"
+  "cmp\\t%1, 0\;be,a\\t.+8\;add\\t%0, 4, %0"
   [(set_attr "type" "multi")])
 \f
 (define_insn "return"
@@ -9040,13 +9053,13 @@
 (define_insn "flush"
   [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 3)]
   ""
-  "* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";"
+  "* return TARGET_V9 ? \"flush\\t%f0\" : \"iflush\\t%f0\";"
   [(set_attr "type" "misc")])
 
 (define_insn "flushdi"
   [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] 3)]
   ""
-  "* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";"
+  "* return TARGET_V9 ? \"flush\\t%f0\" : \"iflush\\t%f0\";"
   [(set_attr "type" "misc")])
 
 \f
@@ -9065,7 +9078,7 @@
   "TARGET_SPARCLITE || TARGET_SPARCLET"
   "*
 {
-  return \"sub %%g0,%1,%0\;and %0,%1,%0\;scan %0,0,%0\;mov 32,%2\;sub %2,%0,%0\;sra %0,31,%2\;and %2,31,%2\;add %2,%0,%0\";
+  return \"sub\\t%%g0, %1, %0\;and\\t%0, %1, %0\;scan\\t%0, 0, %0\;mov\\t32, %2\;sub\\t%2, %0, %0\;sra\\t%0, 31, %2\;and\\t%2, 31, %2\;add\\t%2, %0, %0\";
 }"
   [(set_attr "type" "multi")
    (set_attr "length" "8")])
@@ -9081,7 +9094,7 @@
 ;      (ffs:DI (match_operand:DI 1 "register_operand" "r")))
 ;   (clobber (match_scratch:DI 2 "=&r"))]
 ;  "TARGET_ARCH64"
-;  "neg %1,%2\;xnor %1,%2,%2\;popc %2,%0\;movzr %1,0,%0"
+;  "neg\\t%1, %2\;xnor\\t%1, %2, %2\;popc\\t%2, %0\;movzr\\t%1, 0, %0"
 ;  [(set_attr "type" "multi")
 ;   (set_attr "length" "4")])
 
@@ -9439,17 +9452,37 @@
    && in_same_eh_region (insn, operands[2])
    && in_same_eh_region (insn, ins1)"
   "call\\t%a0, %1\\n\\tadd\\t%%o7, (%l2-.-4), %%o7")
+\f
+(define_expand "prologue"
+  [(const_int 1)]
+  "flag_pic && current_function_uses_pic_offset_table"
+  "
+{
+  load_pic_register ();
+  DONE;
+}")
 
-;; After a nonlocal goto, we need to restore the PIC register, but only
-;; if we need it.  So do nothing much here, but we'll check for this in
-;; finalize_pic.
+;; We need to reload %l7 for -mflat -fpic,
+;; otherwise %l7 should be preserved simply
+;; by loading the function's register window
+(define_expand "exception_receiver"
+  [(const_int 0)]
+  "TARGET_FLAT && flag_pic"
+  "
+{
+  load_pic_register ();
+  DONE;
+}")
 
-;; Make sure this unspec_volatile number agrees with finalize_pic.
-(define_insn "nonlocal_goto_receiver"
-  [(unspec_volatile [(const_int 0)] 5)]
-  "flag_pic"
-  ""
-  [(set_attr "length" "0")])
+;; Likewise
+(define_expand "builtin_setjmp_receiver"
+  [(label_ref (match_operand 0 "" ""))]
+  "TARGET_FLAT && flag_pic"
+  "
+{
+  load_pic_register ();
+  DONE;
+}")
 \f
 (define_insn "trap"
   [(trap_if (const_int 1) (const_int 5))]