* hooks.h (hook_tree_tree_tree_bool_null): Rename to...

[pf3gnuchains/gcc-fork.git] / gcc / config / sh / sh.opt

diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
index 161fdd8..95e2ca4 100644 (file)
--- a/gcc/config/sh/sh.opt
+++ b/gcc/config/sh/sh.opt
@@ -1,12 +1,12 @@
 ; Options for the SH port of the compiler.
 
-; Copyright (C) 2005, 2006 Free Software Foundation, Inc.
+; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
 ;
 ; This file is part of GCC.
 ;
 ; GCC is free software; you can redistribute it and/or modify it under
 ; the terms of the GNU General Public License as published by the Free
-; Software Foundation; either version 2, or (at your option) any later
+; Software Foundation; either version 3, or (at your option) any later
 ; version.
 ;
 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
@@ -15,9 +15,8 @@
 ; for more details.
 ;
 ; You should have received a copy of the GNU General Public License
-; along with GCC; see the file COPYING.  If not, write to the Free
-; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-; 02110-1301, USA.
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
 
 ;; Used for various architecture options.
 Mask(SH_E)
@@ -50,7 +49,7 @@ Generate SH2 code
 
 m2a
 Target RejectNegative Condition(SUPPORT_SH2A)
-Generate SH2a code
+Generate default double-precision SH2a-FPU code
 
 m2a-nofpu
 Target RejectNegative Condition(SUPPORT_SH2A_NOFPU)
@@ -58,11 +57,11 @@ Generate SH2a FPU-less code
 
 m2a-single
 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE)
-Generate default single-precision SH2a code
+Generate default single-precision SH2a-FPU code
 
 m2a-single-only
 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE_ONLY)
-Generate only single-precision SH2a code
+Generate only single-precision SH2a-FPU code
 
 m2e
 Target RejectNegative Condition(SUPPORT_SH2E)
@@ -201,6 +200,10 @@ m5-compact-nofpu
 Target RejectNegative Condition(SUPPORT_SH5_32MEDIA_NOFPU)
 Generate FPU-less SHcompact code
 
+maccumulate-outgoing-args
+Target Report Mask(ACCUMULATE_OUTGOING_ARGS)
+Reserve space for outgoing arguments in the function prologue
+
 madjust-unroll
 Target Report Mask(ADJUST_UNROLL) Condition(SUPPORT_ANY_SH5)
 Throttle unrolling to avoid thrashing target registers unless the unroll benefit outweighs this
@@ -213,6 +216,10 @@ mbigtable
 Target Report RejectNegative Mask(BIGTABLE)
 Generate 32-bit offsets in switch tables
 
+mbitops
+Target Report RejectNegative Mask(BITOPS)
+Generate bit instructions
+
 mbranch-cost=
 Target RejectNegative Joined UInteger Var(sh_branch_cost) Init(-1)
 Cost to assume for a branch insn
@@ -221,13 +228,9 @@ mcbranchdi
 Target Var(TARGET_CBRANCHDI4)
 Enable cbranchdi4 pattern
 
-mexpand-cbranchdi
-Target Var(TARGET_EXPAND_CBRANCHDI4)
-Expand cbranchdi4 pattern early into separate comparisons and branches.
-
 mcmpeqdi
 Target Var(TARGET_CMPEQDI_T)
-Emit cmpeqdi_t pattern even when -mcbranchdi and -mexpand-cbranchdi are in effect.
+Emit cmpeqdi_t pattern even when -mcbranchdi is in effect.
 
 mcut2-workaround
 Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND)
@@ -246,7 +249,12 @@ Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")
 Specify name for 32 bit signed division function
 
 mfmovd
-Target RejectNegative Mask(FMOVD) Undocumented
+Target RejectNegative Mask(FMOVD)
+Enable the use of 64-bit floating point registers in fmov instructions.  See -mdalign if 64-bit alignment is required.
+
+mfixed-range=
+Target RejectNegative Joined Var(sh_fixed_range_str)
+Specify range of registers to make fixed
 
 mfused-madd
 Target Var(TARGET_FMAC)
@@ -268,6 +276,10 @@ mindexed-addressing
 Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA)
 Enable the use of the indexed addressing mode for SHmedia32/SHcompact
 
+minline-ic_invalidate
+Target Report Var(TARGET_INLINE_IC_INVALIDATE)
+inline code to invalidate instruction cache entries after setting up nested function trampolines
+
 minvalid-symbols
 Target Report Mask(INVALID_SYMBOLS) Condition(SUPPORT_ANY_SH5)
 Assume symbols might be invalid
@@ -308,7 +320,7 @@ Follow Renesas (formerly Hitachi) / SuperH calling conventions
 
 mspace
 Target Report RejectNegative Mask(SMALLCODE)
-Deprecated. Use -Os instead
+Deprecated.  Use -Os instead
 
 multcost=
 Target RejectNegative Joined UInteger Var(sh_multcost) Init(-1)
@@ -316,7 +328,7 @@ Cost to assume for a multiply insn
 
 musermode
 Target Report RejectNegative Mask(USERMODE)
-Generate library function call to invalidate instruction cache entries after fixing trampoline
+Don't generate privileged-mode only code; implies -mno-inline-ic_invalidate if the inline code would not work in user mode.
 
 ;; We might want to enable this by default for TARGET_HARD_SH4, because
 ;; zero-offset branches have zero latency.  Needs some benchmarking.