Fix typo in last change.

[pf3gnuchains/gcc-fork.git] / gcc / config / sh / sh.h

diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 8d22454..217ce5a 100644 (file)
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -149,6 +149,8 @@ extern int target_flags;
 
 #define TARGET_DEFAULT  (0)
 
+#define PRESERVE_DEATH_INFO_REGNO_P(regno) (TARGET_RELAX || optimize)
+
 #define OVERRIDE_OPTIONS                                       \
 do {                                                           \
   sh_cpu = CPU_SH0;                                            \
@@ -574,7 +576,7 @@ extern enum reg_class reg_class_from_letter[];
 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
 ((C) == 'G' ? fp_zero_operand (VALUE)          \
  : (C) == 'H' ? fp_one_operand (VALUE)         \
- : 0)
+ : (C) == 'F')
 
 /* Given an rtx X being reloaded into a reg required to be
    in class CLASS, return the class of reg to actually use.
@@ -583,6 +585,21 @@ extern enum reg_class reg_class_from_letter[];
 
 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
 
+/* ??? Should make FPUL register a nn-fixed register and make it's
+   use explicit in the rtl; then change this definition here to
+   ...  ? FPUL_REGS : NO_REGS) .  */
+#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,X) \
+  ((((CLASS == FP_REGS || CLASS == FP0_REGS)                           \
+     && GET_CODE (X) == REG && REGNO (X) <= AP_REG)                    \
+    || (CLASS == GENERAL_REGS && GET_CODE (X) == REG                   \
+       && REGNO (X) <= FIRST_FP_REG && REGNO (X) >= LAST_FP_REG))      \
+   ? /* FPUL_REGS */ NO_REGS : NO_REGS)
+
+#define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,X)  \
+  (((CLASS == FP_REGS || CLASS == FP0_REGS) && immediate_operand (X, MODE)\
+    && ! (fp_one_operand (X) || fp_one_operand (X)))                   \
+   ? R0_REGS : SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,X))
+
 /* Return the maximum number of consecutive registers
    needed to represent mode MODE in a register of class CLASS.
 
@@ -905,13 +922,9 @@ extern struct rtx_def *sh_builtin_saveregs ();
 
 /* Nonzero if the constant value X is a legitimate general operand.  */
 
-/* ??? Should modify this to accept CONST_DOUBLE, and then modify the
-   constant pool table code to fix loads of CONST_DOUBLEs.  If that doesn't
-   work well, then we can at least handle simple CONST_DOUBLEs here
-   such as 0.0.  */
-
 #define LEGITIMATE_CONSTANT_P(X) \
   (GET_CODE (X) != CONST_DOUBLE                                                \
+   || GET_MODE (X) == DFmode || GET_MODE (X) == SFmode                 \
    || (TARGET_SH3E && (fp_zero_operand (X) || fp_one_operand (X))))
 
 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
@@ -1067,7 +1080,7 @@ extern struct rtx_def *sh_builtin_saveregs ();
 
 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)                    \
 {                                                              \
-  if (GET_CODE (x) == PLUS                                     \
+  if (GET_CODE (X) == PLUS                                     \
       && (GET_MODE_SIZE (MODE) == 4                            \
          || GET_MODE_SIZE (MODE) == 8)                         \
       && GET_CODE (XEXP (X, 1)) == CONST_INT                   \
@@ -1079,7 +1092,7 @@ extern struct rtx_def *sh_builtin_saveregs ();
       rtx sum;                                                 \
                                                                \
       GO_IF_LEGITIMATE_INDEX (MODE, index_rtx, WIN);           \
-      /* On rare occaisons, we might get an unaligned pointer  \
+      /* On rare occasions, we might get an unaligned pointer  \
         that is indexed in a way to give an aligned address.   \
         Therefore, keep the lower two bits in offset_base.  */ \
       /* Instead of offset_base 128..131 use 124..127, so that \
@@ -1092,11 +1105,11 @@ extern struct rtx_def *sh_builtin_saveregs ();
        offset_base = offset & ~60;                             \
       /* Sometimes the normal form does not suit DImode.  We   \
         could avoid that by using smaller ranges, but that     \
-        would give less optimized code when SImode is
+        would give less optimized code when SImode is          \
         prevalent.  */                                         \
       if (GET_MODE_SIZE (MODE) + offset - offset_base <= 64)   \
        {                                                       \
-         sum = expand_binop (Pmode, add_optab, XEXP (x, 0),    \
+         sum = expand_binop (Pmode, add_optab, XEXP (X, 0),    \
                              GEN_INT (offset_base), NULL_RTX, 0, \
                              OPTAB_LIB_WIDEN);                 \
                                                                 \
@@ -1432,9 +1445,9 @@ dtors_section()                                                   \
    assemble_name (STREAM, NAME),               \
    fputc ('\n',STREAM))
 
-/* Output a reference to a label.  */
-#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
-  fprintf (STREAM, "_%s", NAME)
+/* The prefix to add to user-visible assembler symbols. */
+
+#define USER_LABEL_PREFIX "_"
 
 /* Make an internal label into a string.  */
 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \