#define TARGET_DEFAULT (0)
+#define PRESERVE_DEATH_INFO_REGNO_P(regno) (TARGET_RELAX || optimize)
+
#define OVERRIDE_OPTIONS \
do { \
sh_cpu = CPU_SH0; \
mach multiply/accumulate result, high part
macl multiply/accumulate result, low part.
fpul fp/int communication register
+ rap return address pointer register
fr0 fp arg return
fr1..fr3 scratch floating point registers
fr4..fr11 fp args in
#define MACL_REG 21
#define SPECIAL_REG(REGNO) ((REGNO) >= 18 && (REGNO) <= 21)
#define FPUL_REG 22
-/* Number 23 is unused. Reserved for future expansion. */
+#define RAP_REG 23
#define FIRST_FP_REG 24
#define LAST_FP_REG 39
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 14
+/* Fake register that holds the address on the stack of the
+ current function's return address. */
+#define RETURN_ADDRESS_POINTER_REGNUM 23
+
/* Value should be nonzero if functions must have frame pointers.
Zero means the frame pointer need not be set up (and parms may be accessed
via the stack pointer) in functions that seem suitable. */
followed by "to". Eliminations of the same "from" register are listed
in order of preference. */
-#define ELIMINABLE_REGS \
-{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
- { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
- { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
+#define ELIMINABLE_REGS \
+{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+ { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+ { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+ { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
/* Given FROM and TO register numbers, say whether this elimination
is allowed. */
FPUL_REGS,
FP0_REGS,
FP_REGS,
+ GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
"FPUL_REGS", \
"FP0_REGS", \
"FP_REGS", \
+ "GENERAL_FP_REGS", \
"ALL_REGS", \
}
{ 0x00400000, 0x00000000 }, /* FPUL_REGS */ \
{ 0x01000000, 0x00000000 }, /* FP0_REGS */ \
{ 0xFF000000, 0x000000FF }, /* FP_REGS */ \
+ { 0xFF01FFFF, 0x000000FF }, /* GENERAL_FP_REGS */ \
{ 0xFF7FFFFF, 0x000000FF }, /* ALL_REGS */ \
}
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? fp_zero_operand (VALUE) \
: (C) == 'H' ? fp_one_operand (VALUE) \
- : 0)
+ : (C) == 'F')
/* Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
#define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
+/* ??? Should make FPUL register a nn-fixed register and make it's
+ use explicit in the rtl; then change this definition here to
+ ... ? FPUL_REGS : NO_REGS) . */
+#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,X) \
+ ((((CLASS == FP_REGS || CLASS == FP0_REGS) \
+ && GET_CODE (X) == REG && REGNO (X) <= AP_REG) \
+ || (CLASS == GENERAL_REGS && GET_CODE (X) == REG \
+ && REGNO (X) <= FIRST_FP_REG && REGNO (X) >= LAST_FP_REG)) \
+ ? /* FPUL_REGS */ NO_REGS : NO_REGS)
+
+#define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,X) \
+ (((CLASS == FP_REGS || CLASS == FP0_REGS) && immediate_operand (X, MODE)\
+ && ! (fp_one_operand (X) || fp_one_operand (X))) \
+ ? R0_REGS : SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,X))
+
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS.
fprintf(STREAM, " .long LP%d\n", (LABELNO)); \
}
+/* Define this macro if the code for function profiling should come
+ before the function prologue. Normally, the profiling code comes
+ after. */
+
+#define PROFILE_BEFORE_PROLOGUE
+
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers.
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
}
+
+/* A C expression whose value is RTL representing the value of the return
+ address for the frame COUNT steps up from the current frame.
+ FRAMEADDR is already the frame pointer of the COUNT frame, so we
+ can ignore COUNT. */
+
+#define RETURN_ADDR_RTX(COUNT, FRAME) \
+ ((COUNT == 0) \
+ ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM)) \
+ : (rtx) 0)
\f
/* Generate necessary RTL for __builtin_saveregs().
ARGLIST is the argument list; see expr.c. */
/* Nonzero if the constant value X is a legitimate general operand. */
-/* ??? Should modify this to accept CONST_DOUBLE, and then modify the
- constant pool table code to fix loads of CONST_DOUBLEs. If that doesn't
- work well, then we can at least handle simple CONST_DOUBLEs here
- such as 0.0. */
-
#define LEGITIMATE_CONSTANT_P(X) \
(GET_CODE (X) != CONST_DOUBLE \
+ || GET_MODE (X) == DFmode || GET_MODE (X) == SFmode \
|| (TARGET_SH3E && (fp_zero_operand (X) || fp_one_operand (X))))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
GO_IF_LEGITIMATE_ADDRESS.
It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output. */
+ opportunities to optimize the output.
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) ;
+ For the SH, if X is almost suitable for indexing, but the offset is
+ out of range, convert it into a normal form so that cse has a chance
+ of reducing the number of address registers used. */
+
+#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
+{ \
+ if (GET_CODE (X) == PLUS \
+ && (GET_MODE_SIZE (MODE) == 4 \
+ || GET_MODE_SIZE (MODE) == 8) \
+ && GET_CODE (XEXP (X, 1)) == CONST_INT \
+ && BASE_REGISTER_RTX_P (XEXP (X, 0)) \
+ && ! (TARGET_SH3E && MODE == SFmode)) \
+ { \
+ rtx index_rtx = XEXP (X, 1); \
+ HOST_WIDE_INT offset = INTVAL (index_rtx), offset_base; \
+ rtx sum; \
+ \
+ GO_IF_LEGITIMATE_INDEX (MODE, index_rtx, WIN); \
+ /* On rare occasions, we might get an unaligned pointer \
+ that is indexed in a way to give an aligned address. \
+ Therefore, keep the lower two bits in offset_base. */ \
+ /* Instead of offset_base 128..131 use 124..127, so that \
+ simple add suffices. */ \
+ if (offset > 127) \
+ { \
+ offset_base = ((offset + 4) & ~60) - 4; \
+ } \
+ else \
+ offset_base = offset & ~60; \
+ /* Sometimes the normal form does not suit DImode. We \
+ could avoid that by using smaller ranges, but that \
+ would give less optimized code when SImode is \
+ prevalent. */ \
+ if (GET_MODE_SIZE (MODE) + offset - offset_base <= 64) \
+ { \
+ sum = expand_binop (Pmode, add_optab, XEXP (X, 0), \
+ GEN_INT (offset_base), NULL_RTX, 0, \
+ OPTAB_LIB_WIDEN); \
+ \
+ (X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (offset - offset_base)); \
+ goto WIN; \
+ } \
+ } \
+}
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for. */
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
- "ap", "pr", "t", "gbr", "mach","macl", "fpul", "X", \
+ "ap", "pr", "t", "gbr", "mach","macl", "fpul","rap", \
"fr0","fr1","fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
"fr8","fr9","fr10","fr11","fr12","fr13","fr14","fr15",\
}
assemble_name (STREAM, NAME), \
fputc ('\n',STREAM))
-/* Output a reference to a label. */
-#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
- fprintf (STREAM, "_%s", NAME)
+/* The prefix to add to user-visible assembler symbols. */
+
+#define USER_LABEL_PREFIX "_"
/* Make an internal label into a string. */
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
OSDN Git Service
