;; Scheduling description for IBM POWER processor.
;; Copyright (C) 2003 Free Software Foundation, Inc.
;;
-;; This file is part of GNU CC.
-;;
-;; GNU CC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 2, or (at your option)
-;; any later version.
-;;
-;; GNU CC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;; GNU General Public License for more details.
-;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 2, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
;; You should have received a copy of the GNU General Public License
-;; along with GNU CC; see the file COPYING. If not, write to
-;; the Free Software Foundation, 59 Temple Place - Suite 330,
-;; Boston, MA 02111-1307, USA.
+;; along with GCC; see the file COPYING. If not, write to the
+;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+;; MA 02111-1307, USA.
(define_automaton "rios1,rios1fp")
(define_cpu_unit "iu_rios1" "rios1")
"iu_rios1+fpu_rios1")
(define_insn_reservation "rios1-integer" 1
- (and (eq_attr "type" "integer,mfcr,mtcr")
+ (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "rios1,ppc601"))
"iu_rios1")
(define_insn_reservation "rios1-imul" 5
- (and (eq_attr "type" "imul")
+ (and (eq_attr "type" "imul,imul_compare")
(eq_attr "cpu" "rios1"))
"iu_rios1*5")
"iu_rios1*3")
(define_insn_reservation "ppc601-imul" 5
- (and (eq_attr "type" "imul,imul2,imul3")
+ (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
(eq_attr "cpu" "ppc601"))
"iu_rios1*5")
(eq_attr "cpu" "ppc601"))
"fpu_rios1*31")
+(define_insn_reservation "rios1-mfcr" 2
+ (and (eq_attr "type" "mfcr")
+ (eq_attr "cpu" "rios1,ppc601"))
+ "iu_rios1,bpu_rios1")
+
+(define_insn_reservation "rios1-mtcr" 4
+ (and (eq_attr "type" "mtcr")
+ (eq_attr "cpu" "rios1,ppc601"))
+ "iu_rios1,bpu_rios1")
+
(define_insn_reservation "rios1-crlogical" 4
(and (eq_attr "type" "cr_logical,delayed_cr")
(eq_attr "cpu" "rios1,ppc601"))
(define_insn_reservation "rios1-mtjmpr" 5
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "rios1"))
- "bpu_rios1")
+ "iu_rios1,bpu_rios1")
(define_insn_reservation "ppc601-mtjmpr" 4
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "ppc601"))
- "bpu_rios1")
+ "iu_rios1,bpu_rios1")
+
+(define_insn_reservation "rios1-mfjmpr" 2
+ (and (eq_attr "type" "mfjmpr")
+ (eq_attr "cpu" "rios1,ppc601"))
+ "iu_rios1,bpu_rios1")
(define_insn_reservation "rios1-branch" 1
(and (eq_attr "type" "jmpreg,branch")