;; Scheduling description for IBM PowerPC 403 and PowerPC 405 processors.
-;; Copyright (C) 2003 Free Software Foundation, Inc.
-;;
-;; This file is part of GNU CC.
-;;
-;; GNU CC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 2, or (at your option)
-;; any later version.
-;;
-;; GNU CC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;; GNU General Public License for more details.
+;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc.
;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
;; You should have received a copy of the GNU General Public License
-;; along with GNU CC; see the file COPYING. If not, write to
-;; the Free Software Foundation, 59 Temple Place - Suite 330,
-;; Boston, MA 02111-1307, USA.
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
-(define_automaton "ppc40x")
-(define_cpu_unit "iu_40x,bpu_40x" "ppc40x")
+(define_automaton "ppc40x,ppc40xiu")
+(define_cpu_unit "bpu_40x,fpu_405" "ppc40x")
+(define_cpu_unit "iu_40x" "ppc40xiu")
;; PPC401 / PPC403 / PPC405 32-bit integer only IU BPU
;; Embedded PowerPC controller
;; In-order execution
;; Max issue two insns/cycle (includes one branch)
(define_insn_reservation "ppc403-load" 2
- (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
+ (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
+ load_l,store_c,sync")
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x")
-(define_insn_reservation "ppc403-store" 1
+(define_insn_reservation "ppc403-store" 2
(and (eq_attr "type" "store,store_ux,store_u")
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x")
(define_insn_reservation "ppc403-integer" 1
- (and (eq_attr "type" "integer")
+ (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
+ var_shift_rotate,cntlz,exts")
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x")
+(define_insn_reservation "ppc403-two" 1
+ (and (eq_attr "type" "two")
+ (eq_attr "cpu" "ppc403,ppc405"))
+ "iu_40x,iu_40x")
+
+(define_insn_reservation "ppc403-three" 1
+ (and (eq_attr "type" "three")
+ (eq_attr "cpu" "ppc403,ppc405"))
+ "iu_40x,iu_40x,iu_40x")
+
(define_insn_reservation "ppc403-compare" 3
- (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare")
+ (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare,\
+ var_delayed_compare")
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x,nothing,bpu_40x")
(define_insn_reservation "ppc403-imul" 4
- (and (eq_attr "type" "imul,imul2,imul3")
+ (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
(eq_attr "cpu" "ppc403"))
"iu_40x*4")
(define_insn_reservation "ppc405-imul" 5
- (and (eq_attr "type" "imul")
+ (and (eq_attr "type" "imul,imul_compare")
(eq_attr "cpu" "ppc405"))
"iu_40x*4")
"iu_40x*33")
(define_insn_reservation "ppc403-mfcr" 2
- (and (eq_attr "type" "mfcr,mtcr")
+ (and (eq_attr "type" "mfcr")
+ (eq_attr "cpu" "ppc403,ppc405"))
+ "iu_40x")
+
+(define_insn_reservation "ppc403-mtcr" 3
+ (and (eq_attr "type" "mtcr")
(eq_attr "cpu" "ppc403,ppc405"))
"iu_40x")
(define_insn_reservation "ppc403-mtjmpr" 4
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "ppc403,ppc405"))
- "bpu_40x")
+ "iu_40x")
+
+(define_insn_reservation "ppc403-mfjmpr" 2
+ (and (eq_attr "type" "mfjmpr")
+ (eq_attr "cpu" "ppc403,ppc405"))
+ "iu_40x")
(define_insn_reservation "ppc403-jmpreg" 1
- (and (eq_attr "type" "jmpreg,branch,cr_logical,delayed_cr")
+ (and (eq_attr "type" "jmpreg,branch,isync")
(eq_attr "cpu" "ppc403,ppc405"))
"bpu_40x")
+(define_insn_reservation "ppc403-cr" 2
+ (and (eq_attr "type" "cr_logical,delayed_cr")
+ (eq_attr "cpu" "ppc403,ppc405"))
+ "bpu_40x")
+
+(define_insn_reservation "ppc405-float" 11
+ (and (eq_attr "type" "fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,\
+ fpcompare,fp,dmul,sdiv,ddiv")
+ (eq_attr "cpu" "ppc405"))
+ "fpu_405*10")
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