/* Definitions of target machine for GNU compiler, for the HP Spectrum.
- Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
+ Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+ 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
Software Science at the University of Utah.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
+the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-Boston, MA 02110-1301, USA. */
-
-enum cmp_type /* comparison type */
-{
- CMP_SI, /* compare integers */
- CMP_SF, /* compare single precision floats */
- CMP_DF, /* compare double precision floats */
- CMP_MAX /* max comparison type */
-};
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
/* For long call handling. */
extern unsigned long total_code_bytes;
calls. They are used only in non-pic code. */
#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
-/* Define to a C expression evaluating to true to use long pic symbol
- difference calls. This is a call variant similar to the long pic
- pc-relative call. Long pic symbol difference calls are only used with
- the HP SOM linker. Currently, only the HP assembler supports these
- calls. GAS doesn't allow an arbitrary difference of two symbols. */
-#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
-
-/* Define to a C expression evaluating to true to use long pic
- pc-relative calls. Long pic pc-relative calls are only used with
- GAS. Currently, they are usable for calls within a module but
- not for external calls. */
+/* Define to a C expression evaluating to true to use long PIC symbol
+ difference calls. Long PIC symbol difference calls are only used with
+ the HP assembler and linker. The HP assembler detects this instruction
+ sequence and treats it as long pc-relative call. Currently, GAS only
+ allows a difference of two symbols in the same subspace, and it doesn't
+ detect the sequence as a pc-relative call. */
+#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
+
+/* Define to a C expression evaluating to true to use long PIC
+ pc-relative calls. Long PIC pc-relative calls are only used with
+ GAS. Currently, they are usable for calls which bind local to a
+ module but not for external calls. */
#define TARGET_LONG_PIC_PCREL_CALL 0
/* Define to a C expression evaluating to true to use SOM secondary
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
#endif
-/* This macro defines command-line switches that modify the default
- target name.
-
- The definition is be an initializer for an array of structures. Each
- array element has have three elements: the switch name, one of the
- enumeration codes ADD or DELETE to indicate whether the string should be
- inserted or deleted, and the string to be inserted or deleted. */
-#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
-
/* Make gcc agree with <machine/ansi.h> */
#define SIZE_TYPE "unsigned int"
#define CAN_DEBUG_WITHOUT_FP
\f
/* target machine storage layout */
-typedef struct machine_function GTY(())
+typedef struct GTY(()) machine_function
{
/* Flag indicating that a .NSUBSPA directive has been output for
this function. */
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
/* Get around hp-ux assembler bug, and make strcpy of constants fast. */
-#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
- ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
+#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
+ (TREE_CODE (EXP) == STRING_CST \
+ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
/* Make arrays of chars word-aligned for the same reasons. */
#define DATA_ALIGNMENT(TYPE, ALIGN) \
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
for any hard reg, then this must be 0 for correct output. */
#define MODES_TIEABLE_P(MODE1, MODE2) \
- (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
+ pa_modes_tieable_p (MODE1, MODE2)
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 3
-/* Value should be nonzero if functions must have frame pointers. */
-#define FRAME_POINTER_REQUIRED \
- (current_function_calls_alloca)
-
/* Don't allow hard registers to be renamed into r2 unless r2
is already live or already being saved (due to eh). */
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
- ((NEW_REG) != 2 || df_regs_ever_live_p (2) || current_function_calls_eh_return)
+ ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
/* C statement to store the difference between the frame pointer
and the stack pointer values immediately after the function prologue.
#define MAYBE_FP_REG_CLASS_P(CLASS) \
reg_classes_intersect_p ((CLASS), FP_REGS)
-/* On the PA it is not possible to directly move data between
- GENERAL_REGS and FP_REGS. On the 32-bit port, we use the
- location at SP-16. We don't expose this location in the RTL to
- avoid scheduling related problems. For example, the store and
- load could be separated by a call to a pure or const function
- which has no frame and uses SP-16. */
-#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
- (TARGET_64BIT \
- && (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2) \
- || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)))
-
\f
/* Stack layout; function entry, exit and calling. */
/* Define this if the above stack space is to be considered part of the
space allocated by the caller. */
-#define OUTGOING_REG_PARM_STACK_SPACE 1
+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
/* Keep the stack pointer constant throughout the function.
This is both an optimization and a necessity: longjmp
marker, although the runtime documentation only describes a 16
byte marker. For compatibility, we allocate 48 bytes. */
#define STACK_POINTER_OFFSET \
- (TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32)
+ (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
#define STACK_DYNAMIC_OFFSET(FNDECL) \
(TARGET_64BIT \
? (STACK_POINTER_OFFSET) \
- : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
-
-/* Value is 1 if returning from a function call automatically
- pops the arguments described by the number-of-args field in the call.
- FUNDECL is the declaration node of the function (as a tree),
- FUNTYPE is the data type of the function (as a tree),
- or for a library call it is an identifier node for the subroutine name. */
-
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-
-/* Define how to find the value returned by a function.
- VALTYPE is the data type of the value (as a tree).
- If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 0. */
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
+ : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
\f
-extern GTY(()) rtx hppa_compare_op0;
-extern GTY(()) rtx hppa_compare_op1;
-extern enum cmp_type hppa_branch_type;
-
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
as assembly via FUNCTION_PROFILER. Just output a local label.
We can't use the function label because the GAS SOM target can't
#define EXIT_IGNORE_STACK \
(get_frame_size () != 0 \
- || current_function_calls_alloca || current_function_outgoing_args_size)
-
-/* Output assembler code for a block containing the constant parts
- of a trampoline, leaving space for the variable parts.\
-
- The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
- and then branches to the specified routine.
-
- This code template is copied from text segment to stack location
- and then patched with INITIALIZE_TRAMPOLINE to contain
- valid values, and then entered as a subroutine.
-
- It is best to keep this as small as possible to avoid having to
- flush multiple lines in the cache. */
-
-#define TRAMPOLINE_TEMPLATE(FILE) \
- { \
- if (!TARGET_64BIT) \
- { \
- fputs ("\tldw 36(%r22),%r21\n", FILE); \
- fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
- if (ASSEMBLER_DIALECT == 0) \
- fputs ("\tdepi 0,31,2,%r21\n", FILE); \
- else \
- fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
- fputs ("\tldw 4(%r21),%r19\n", FILE); \
- fputs ("\tldw 0(%r21),%r21\n", FILE); \
- if (TARGET_PA_20) \
- { \
- fputs ("\tbve (%r21)\n", FILE); \
- fputs ("\tldw 40(%r22),%r29\n", FILE); \
- fputs ("\t.word 0\n", FILE); \
- fputs ("\t.word 0\n", FILE); \
- } \
- else \
- { \
- fputs ("\tldsid (%r21),%r1\n", FILE); \
- fputs ("\tmtsp %r1,%sr0\n", FILE); \
- fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
- fputs ("\tldw 40(%r22),%r29\n", FILE); \
- } \
- fputs ("\t.word 0\n", FILE); \
- fputs ("\t.word 0\n", FILE); \
- fputs ("\t.word 0\n", FILE); \
- fputs ("\t.word 0\n", FILE); \
- } \
- else \
- { \
- fputs ("\t.dword 0\n", FILE); \
- fputs ("\t.dword 0\n", FILE); \
- fputs ("\t.dword 0\n", FILE); \
- fputs ("\t.dword 0\n", FILE); \
- fputs ("\tmfia %r31\n", FILE); \
- fputs ("\tldd 24(%r31),%r1\n", FILE); \
- fputs ("\tldd 24(%r1),%r27\n", FILE); \
- fputs ("\tldd 16(%r1),%r1\n", FILE); \
- fputs ("\tbve (%r1)\n", FILE); \
- fputs ("\tldd 32(%r31),%r31\n", FILE); \
- fputs ("\t.dword 0 ; fptr\n", FILE); \
- fputs ("\t.dword 0 ; static link\n", FILE); \
- } \
- }
+ || cfun->calls_alloca || crtl->outgoing_args_size)
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
-/* Length in units of the trampoline instruction code. */
+/* Alignment required by the trampoline. */
-#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
+#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
/* Minimum length of a cache line. A length of 16 will work on all
PA-RISC processors. All PA 1.1 processors have a cache line of
#define MIN_CACHELINE_SIZE 32
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function.
-
- Move the function address to the trampoline template at offset 36.
- Move the static chain value to trampoline template at offset 40.
- Move the trampoline address to trampoline template at offset 44.
- Move r19 to trampoline template at offset 48. The latter two
- words create a plabel for the indirect call to the trampoline.
-
- A similar sequence is used for the 64-bit port but the plabel is
- at the beginning of the trampoline.
-
- Finally, the cache entries for the trampoline code are flushed.
- This is necessary to ensure that the trampoline instruction sequence
- is written to memory prior to any attempts at prefetching the code
- sequence. */
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- rtx start_addr = gen_reg_rtx (Pmode); \
- rtx end_addr = gen_reg_rtx (Pmode); \
- rtx line_length = gen_reg_rtx (Pmode); \
- rtx tmp; \
- \
- if (!TARGET_64BIT) \
- { \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
- \
- /* Create a fat pointer for the trampoline. */ \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
- gen_rtx_REG (Pmode, 19)); \
- \
- /* fdc and fic only use registers for the address to flush, \
- they do not accept integer displacements. We align the \
- start and end addresses to the beginning of their respective \
- cache lines to minimize the number of lines flushed. */ \
- tmp = force_reg (Pmode, (TRAMP)); \
- emit_insn (gen_andsi3 (start_addr, tmp, \
- GEN_INT (-MIN_CACHELINE_SIZE))); \
- tmp = force_reg (Pmode, \
- plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
- emit_insn (gen_andsi3 (end_addr, tmp, \
- GEN_INT (-MIN_CACHELINE_SIZE))); \
- emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
- emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
- emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
- gen_reg_rtx (Pmode), \
- gen_reg_rtx (Pmode))); \
- } \
- else \
- { \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
- \
- /* Create a fat pointer for the trampoline. */ \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
- force_reg (Pmode, plus_constant ((TRAMP), 32))); \
- tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
- emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
- gen_rtx_REG (Pmode, 27)); \
- \
- /* fdc and fic only use registers for the address to flush, \
- they do not accept integer displacements. We align the \
- start and end addresses to the beginning of their respective \
- cache lines to minimize the number of lines flushed. */ \
- tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
- emit_insn (gen_anddi3 (start_addr, tmp, \
- GEN_INT (-MIN_CACHELINE_SIZE))); \
- tmp = force_reg (Pmode, \
- plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
- emit_insn (gen_anddi3 (end_addr, tmp, \
- GEN_INT (-MIN_CACHELINE_SIZE))); \
- emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
- emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
- emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
- gen_reg_rtx (Pmode), \
- gen_reg_rtx (Pmode))); \
- } \
-}
-
-/* Perform any machine-specific adjustment in the address of the trampoline.
- ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
- Adjust the trampoline address to point to the plabel at offset 44. */
-
-#define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
- if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
-
-/* Implement `va_start' for varargs and stdarg. */
-
-#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
- hppa_va_start (valist, nextarg)
\f
/* Addressing modes, and classification of registers for them.
&& REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
&& GET_CODE (XEXP (OP, 1)) == UNSPEC)
+/* Nonzero if 14-bit offsets can be used for all loads and stores.
+ This is not possible when generating PA 1.x code as floating point
+ loads and stores only support 5-bit offsets. Note that we do not
+ forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
+ Instead, we use pa_secondary_reload() to reload integer mode
+ REG+D memory addresses used in floating point loads and stores.
+
+ FIXME: the ELF32 linker clobbers the LSB of the FP register number
+ in PA 2.0 floating-point insns with long displacements. This is
+ because R_PARISC_DPREL14WR and other relocations like it are not
+ yet supported by GNU ld. For now, we reject long displacements
+ on this target. */
+
+#define INT14_OK_STRICT \
+ (TARGET_SOFT_FLOAT \
+ || TARGET_DISABLE_FPREGS \
+ || (TARGET_PA_20 && !TARGET_ELF32))
+
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
We have two alternate definitions for each of them.
/* Nonzero if X is a hard reg that can be used as an index
or if it is a pseudo reg. */
#define REG_OK_FOR_INDEX_P(X) \
-(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+ (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+
/* Nonzero if X is a hard reg that can be used as a base reg
or if it is a pseudo reg. */
#define REG_OK_FOR_BASE_P(X) \
-(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+ (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
#else
/* Nonzero if X is a hard reg that can be used as an index. */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
+
/* Nonzero if X is a hard reg that can be used as a base reg. */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
We treat a SYMBOL_REF as legitimate if it is part of the current
function's constant-pool, because such addresses can actually be
- output as REG+SMALLINT.
-
- Note we only allow 5-bit immediates for access to a constant address;
- doing so avoids losing for loading/storing a FP register at an address
- which will not fit in 5 bits. */
+ output as REG+SMALLINT. */
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
((TARGET_64BIT && (MODE) == DImode) \
|| (MODE) == SImode \
|| (MODE) == HImode \
- || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
+ || (MODE) == SFmode \
+ || (MODE) == DFmode)
/* These are the modes that we allow for unscaled indexing. */
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
|| (MODE) == SImode \
|| (MODE) == HImode \
|| (MODE) == QImode \
- || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
+ || (MODE) == SFmode \
+ || (MODE) == DFmode)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
|| (INTVAL (index) % 8) == 0)) \
/* Similarly, the base register for SFmode/DFmode \
loads and stores with long displacements must \
- be aligned. \
- \
- FIXME: the ELF32 linker clobbers the LSB of \
- the FP register number in PA 2.0 floating-point \
- insns with long displacements. This is because \
- R_PARISC_DPREL14WR and other relocations like \
- it are not supported. For now, we reject long \
- displacements on this target. */ \
+ be aligned. */ \
|| (((MODE) == SFmode || (MODE) == DFmode) \
- && (TARGET_SOFT_FLOAT \
- || (TARGET_PA_20 \
- && !TARGET_ELF32 \
- && (INTVAL (index) \
- % GET_MODE_SIZE (MODE)) == 0))))) \
+ && INT14_OK_STRICT \
+ && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
|| INT_5_BITS (index))) \
goto ADDR; \
if (!TARGET_DISABLE_INDEXING \
|| ((MODE) != SFmode \
&& (MODE) != DFmode))) \
goto ADDR; \
- else if (GET_CODE (X) == LABEL_REF \
- || (GET_CODE (X) == CONST_INT \
- && INT_5_BITS (X))) \
+ else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X)) \
goto ADDR; \
/* Needed for -fPIC */ \
else if (GET_CODE (X) == LO_SUM \
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
do { \
long offset, newoffset, mask; \
- rtx new, temp = NULL_RTX; \
+ rtx new_rtx, temp = NULL_RTX; \
\
mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
- ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \
+ ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \
\
if (optimize && GET_CODE (AD) == PLUS) \
temp = simplify_binary_operation (PLUS, Pmode, \
XEXP (AD, 0), XEXP (AD, 1)); \
\
- new = temp ? temp : AD; \
+ new_rtx = temp ? temp : AD; \
\
if (optimize \
- && GET_CODE (new) == PLUS \
- && GET_CODE (XEXP (new, 0)) == REG \
- && GET_CODE (XEXP (new, 1)) == CONST_INT) \
+ && GET_CODE (new_rtx) == PLUS \
+ && GET_CODE (XEXP (new_rtx, 0)) == REG \
+ && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT) \
{ \
- offset = INTVAL (XEXP ((new), 1)); \
+ offset = INTVAL (XEXP ((new_rtx), 1)); \
\
/* Choose rounding direction. Round up if we are >= halfway. */ \
if ((offset & mask) >= ((mask + 1) / 2)) \
newoffset = offset & ~mask; \
\
/* Ensure that long displacements are aligned. */ \
- if (!VAL_5_BITS_P (newoffset) \
- && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
- newoffset &= ~(GET_MODE_SIZE (MODE) -1); \
+ if (mask == 0x3fff \
+ && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ || (TARGET_64BIT && (MODE) == DImode))) \
+ newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \
\
if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
{ \
- temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
+ temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0), \
GEN_INT (newoffset)); \
AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
} while (0)
-
-\f
-/* Try machine-dependent ways of modifying an illegitimate address
- to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c.
-
- OLDX is the address as it was before break_out_memory_refs was called.
- In some cases it is useful to look at this to decide what needs to be done.
-
- MODE and WIN are passed so that this macro can use
- GO_IF_LEGITIMATE_ADDRESS.
-
- It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output. */
-
-#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
-{ rtx orig_x = (X); \
- (X) = hppa_legitimize_address (X, OLDX, MODE); \
- if ((X) != orig_x && memory_address_p (MODE, X)) \
- goto WIN; }
-
-/* Go to LABEL if ADDR (a legitimate address expression)
- has an effect that depends on the machine mode it is used for. */
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
\f
#define TARGET_ASM_SELECT_SECTION pa_select_section
arguments passed in registers to avoid infinite recursion during argument
setup for a function call. Why? Consider how we copy the stack slots
reserved for parameters when they may be trashed by a call. */
-#define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
+#define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
: 2)
/* Adjust the cost of branches. */
-#define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
+#define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
/* Handling the special cases is going to get too complicated for a macro,
just call `pa_adjust_insn_length' to do the real work. */
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
-
-#define ASM_PN_FORMAT "%s___%lu"
-
/* All HP assemblers use "!" to separate logical lines. */
-#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
+#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
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