;; Move to/from FPU registers
(define_insn_reservation "ir_vr54_xfer" 2
(and (eq_attr "cpu" "r5400")
- (eq_attr "type" "xfer"))
+ (eq_attr "type" "mfc,mtc"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_hilo" 1
(define_insn_reservation "ir_vr54_arith" 1
(and (eq_attr "cpu" "r5400")
- (eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
+ (eq_attr "type" "arith,shift,signext,slt,clz,const,logical,move,nop,trap"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_imul_si" 3
(and (eq_attr "cpu" "r5400")
- (and (eq_attr "type" "imul")
+ (and (eq_attr "type" "imul,imul3")
(eq_attr "mode" "SI")))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_imul_di" 4
(and (eq_attr "cpu" "r5400")
- (and (eq_attr "type" "imul")
+ (and (eq_attr "type" "imul,imul3")
(eq_attr "mode" "DI")))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_imadd_si" 3
(and (eq_attr "cpu" "r5400")
- (eq_attr "type" "imul"))
+ (eq_attr "type" "imul,imul3"))
"vr54_mac")
(define_insn_reservation "ir_vr54_idiv_si" 42