extern enum attr_cpu m88k_cpu;
-extern int null_epilogue ();
+extern int null_prologue ();
extern int integer_ok_for_set ();
extern int m88k_debugger_offset ();
-extern void m88k_handle_pragma_token ();
extern void emit_bcnd ();
extern void expand_block_move ();
-extern void check_float_value ();
extern void m88k_layout_frame ();
-extern void m88k_output_prologue ();
-extern void m88k_output_epilogue ();
+extern void m88k_expand_prologue ();
+extern void m88k_begin_prologue ();
+extern void m88k_end_prologue ();
+extern void m88k_expand_epilogue ();
+extern void m88k_begin_epilogue ();
+extern void m88k_end_epilogue ();
extern void output_function_profiler ();
extern void output_function_block_profiler ();
extern void output_block_profiler ();
/* Print subsidiary information on the compiler version in use.
Redefined in m88kv4.h, and m88kluna.h. */
#define VERSION_INFO1 "88open OCS/BCS, "
-#define VERSION_INFO2 "19 May 1992"
+#define VERSION_INFO2 "08/28/92"
#define VERSION_STRING version_string
-#define TM_SCCS_ID "@(#)m88k.h 2.1.11.5 19 May 1992 09:28:04"
+#define TM_SCCS_ID "@(#)m88k.h 2.2.7.6 08/28/92 07:51:00"
/* Run-time compilation parameters selecting different hardware subsets. */
/* Boundary (in *bits*) on which stack pointer should be aligned. */
#define STACK_BOUNDARY 128
-/* Allocation boundary (in *bits*) for the code of a function.
- Pack code tightly when compiling crtstuff.c. */
-#define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : 128)
+/* Allocation boundary (in *bits*) for the code of a function. On the
+ m88100, it is desirable to align to a cache line. However, SVR3 targets
+ only provided 8 byte alignment. The m88110 cache is small, so align
+ to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
+#define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
+ (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
/* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 64
replaces a BLKmode type. */
/* #define MAX_FIXED_MODE_SIZE 0 */
-/* Report errors on floating point, if we are given NaN's, or such. Leave
- the number as is, though, since we output the number in hex, and the
- assembler won't choke on it. */
-#define CHECK_FLOAT_VALUE(MODE,VALUE) check_float_value (MODE, VALUE)
+/* Check a `double' value for validity for a particular machine mode.
+ This is defined to avoid crashes outputting certain constants.
+ Since we output the number in hex, the assembler won't choke on it. */
+/* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
/* A code distinguishing the floating point format of the target machine. */
/* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
spill area instead of memory.
-waste if only used once
- floating point caluclations
+ floating point calculations
-probably a waste unless we have run out of general purpose registers
freeing up general purpose registers
But this is currently disabled since tying in global_alloc is not
yet implemented.
- The explaination of why the preserved register is not used is as follows,
- I believe. The registers are being allocated in order. Tieing is not
+ The explanation of why the preserved register is not used is as follows,
+ I believe. The registers are being allocated in order. Tying is not
done so efficiently, so when it comes time to do the first allocation,
there are no registers left to use without spilling except extended
registers. Then when the next pseudo register needs a hard reg, there
The following follows the current 88open UCS specification for the
Extended Register File (XRF):
Reg 32 = x0 Always equal to zero
- Reg 33-53 = x1-x21 Tempory registers (Caller Save)
+ Reg 33-53 = x1-x21 Temporary registers (Caller Save)
Reg 54-61 = x22-x29 Preserver registers (Callee Save)
Reg 62-63 = x30-x31 Reserved for future ABI use.
that almost all registers be saved across calls anyway. */
#define FIXED_REGISTERS \
- {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
#define REG_ALLOC_ORDER \
{ \
13, 12, 11, 10, 29, 28, 27, 26, \
- 1, 62, 63, 9, 8, 7, 6, 5, \
- 4, 3, 2, 53, 52, 51, 50, 49, \
+ 62, 63, 9, 8, 7, 6, 5, 4, \
+ 3, 2, 1, 53, 52, 51, 50, 49, \
48, 47, 46, 45, 44, 43, 42, 41, \
40, 39, 38, 37, 36, 35, 34, 33, \
25, 24, 23, 22, 21, 20, 19, 18, \
17, 16, 15, 14, 61, 60, 59, 58, \
57, 56, 55, 54, 30, 31, 0, 32}
+
+/* Order for leaf functions. */
+#define REG_LEAF_ALLOC_ORDER \
+ { \
+ 9, 8, 7, 6, 13, 12, 11, 10, \
+ 29, 28, 27, 26, 62, 63, 5, 4, \
+ 3, 2, 0, 53, 52, 51, 50, 49, \
+ 48, 47, 46, 45, 44, 43, 42, 41, \
+ 40, 39, 38, 37, 36, 35, 34, 33, \
+ 25, 24, 23, 22, 21, 20, 19, 18, \
+ 17, 16, 15, 14, 61, 60, 59, 58, \
+ 57, 56, 55, 54, 30, 31, 1, 32}
+
+/* Switch between the leaf and non-leaf orderings. The purpose is to avoid
+ write-over scoreboard delays between caller and callee. */
+#define ORDER_REGS_FOR_LOCAL_ALLOC \
+{ \
+ static int leaf[] = REG_LEAF_ALLOC_ORDER; \
+ static int nonleaf[] = REG_ALLOC_ORDER; \
+ \
+ bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
+ FIRST_PSEUDO_REGISTER * sizeof (int)); \
+}
\f
/*** Register Classes ***/
#define EXPAND_BUILTIN_SAVEREGS(ARGLIST) m88k_builtin_saveregs (ARGLIST)
/* Generate the assembly code for function entry. */
-#define FUNCTION_PROLOGUE(FILE, SIZE) m88k_output_prologue(FILE, SIZE)
+#define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
+
+/* Perform special actions at the point where the prologue ends. */
+#define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. Redefined in m88kv3.h, m88kv4.h and
#define EXIT_IGNORE_STACK (1)
/* Generate the assembly code for function exit. */
-#define FUNCTION_EPILOGUE(FILE, SIZE) m88k_output_epilogue(FILE, SIZE)
-
-/* Define the number of delay slots needed for the function epilogue.
- These are used for scheduling the function epilogue and depend on
- what the epilogue looks like. */
-#define DELAY_SLOTS_FOR_EPILOGUE delay_slots_for_epilogue ()
+#define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
-/* Define whether INSN can be placed in delay slot N for the epilogue. */
-#define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
- eligible_for_epilogue_delay (INSN)
+/* Perform special actions at the point where the epilogue begins. */
+#define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
/* Value should be nonzero if functions must have frame pointers.
Zero means the frame pointer need not be set up (and parms
{"equality_op", {EQ, NE}}, \
{"pc_or_label_ref", {PC, LABEL_REF}},
+/* The case table contains either words or branch instructions. This says
+ which. We always claim that the vector is PC-relative. It is position
+ independent when -fpic is used. */
+#define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
+
/* An alias for a machine mode name. This is the machine mode that
elements of a jump-table should have. */
#define CASE_VECTOR_MODE SImode
actually ignored by the `case' insn proper. */
/* #define CASE_DROPS_THROUGH */
+/* Define this to be the smallest number of different values for which it
+ is best to use a jump-table instead of a tree of conditional branches.
+ The default is 4 for machines with a casesi instruction and 5 otherwise.
+ The best 88110 number is around 7, though the exact number isn't yet
+ known. A third alternative for the 88110 is to use a binary tree of
+ bb1 instructions on bits 2/1/0 if the range is dense. This may not
+ win very much though. */
+#define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
+
/* Specify the tree operation to be used to convert reals to integers. */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
/* Allow and ignore #sccs directives */
#define SCCS_DIRECTIVE
-/* Code to handle #pragma directives. The interface is a bit messy,
- but there's no simpler way to do this while still using yylex. */
-#define HANDLE_PRAGMA(FILE) \
- do { \
- while (c == ' ' || c == '\t') \
- c = getc (FILE); \
- if (c == '\n' || c == EOF) \
- { \
- m88k_handle_pragma_token (0, 0); \
- return c; \
- } \
- ungetc (c, FILE); \
- switch (yylex ()) \
- { \
- case IDENTIFIER: \
- case TYPENAME: \
- case STRING: \
- case CONSTANT: \
- m88k_handle_pragma_token (token_buffer, yylval.ttype); \
- break; \
- default: \
- m88k_handle_pragma_token (token_buffer, 0); \
- } \
- if (nextchar >= 0) \
- c = nextchar, nextchar = -1; \
- else \
- c = getc (FILE); \
- } while (1)
+/* Handle #pragma pack and sometimes #pragma weak. */
+#define HANDLE_SYSV_PRAGMA
/* Tell when to handle #pragma weak. This is only done for V.4. */
#define HANDLE_PRAGMA_WEAK TARGET_SVR4
/* Provide the cost of a branch. Exact meaning under development. */
#define BRANCH_COST (TARGET_88100 ? 1 : 2)
+/* A C statement (sans semicolon) to update the integer variable COST
+ based on the relationship between INSN that is dependent on
+ DEP_INSN through the dependence LINK. The default is to make no
+ adjustment to COST. On the m88k, ignore the cost of anti- and
+ output-dependencies. On the m88100, a store can issue two cycles
+ before the value (not the address) has finished computing. */
+#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
+ do { \
+ if (REG_NOTE_KIND (LINK) != 0) \
+ (COST) = 0; /* Anti or output dependence. */ \
+ else if (! TARGET_88100 \
+ && recog_memoized (INSN) >= 0 \
+ && get_attr_type (INSN) == TYPE_STORE \
+ && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
+ (COST) -= 4; /* 88110 store reservation station. */ \
+ } while (0)
+
/* Define this to be nonzero if the character `$' should be allowed
by default in identifier names. */
#define DOLLARS_IN_IDENTIFIERS 1
#undef SET_ASM_OP
#undef SKIP_ASM_OP
#undef COMMON_ASM_OP
+#undef ALIGN_ASM_OP
+#undef IDENT_ASM_OP
/* These are used in varasm.c as well. */
#define TEXT_SECTION_ASM_OP "text"
"#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
"#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
+/* Define additional names for use in asm clobbers and asm declarations.
+
+ We define the fake Condition Code register as an alias for reg 0 (which
+ is our `condition code' register), so that condition codes can easily
+ be clobbered by an asm. The carry bit in the PSR is now used. */
+
+#define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0}
+
/* How to renumber registers for dbx and gdb. */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
-/* The case table contains either words or branch instructions. This says
- which. We always claim that the vector is PC-relative. It is position
- independent when -fpic is used. */
-#define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
+/* Override svr4.h. Change to the readonly data section for a table of
+ addresses. final_scan_insn changes back to the text section. */
+#undef ASM_OUTPUT_CASE_LABEL
+#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
+ do { \
+ if (! CASE_VECTOR_INSNS) \
+ readonly_data_section (); \
+ ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
+ } while (0)
/* Epilogue for case labels. This jump instruction is called by casesi
to transfer to the appropriate branch instruction within the table.
if ((LOG) != 0) \
fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG))
-/* Align the text address to half a cache boundary when it can only be
- reached by jumping. Pack code tightly when compiling crtstuff.c. */
+/* On the m88100, align the text address to half a cache boundary when it
+ can only be reached by jumping. Pack code tightly when compiling
+ crtstuff.c. */
#define ASM_OUTPUT_ALIGN_CODE(FILE) \
- ASM_OUTPUT_ALIGN (FILE, (flag_inhibit_size_directive ? 2 : 3))
+ ASM_OUTPUT_ALIGN (FILE, \
+ (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2))
/* Override svr[34].h. */
#undef ASM_OUTPUT_SKIP
#define USE_CONST_SECTION DECLARE_ASM_NAME
-#if defined(CTORS_SECTION_FUNCTION) /* SVR4 */
+#if defined(USING_SVR4_H)
#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
#define INIT_SECTION_FUNCTION
#define FINI_SECTION_FUNCTION
-#elif defined(FINI_SECTION_FUNCTION) /* SVR3 */
+#elif defined(USING_SVR3_H)
-#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_init, in_fini
-#define CTORS_SECTION_FUNCTION
-#define DTORS_SECTION_FUNCTION
+#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
+ in_init, in_fini
#else /* m88kluna or other not based on svr[34].h. */
#define INIT_SECTION_FUNCTION
#define FINI_SECTION_FUNCTION
-#endif /* CTORS_SECTION_FUNCTION */
+#endif /* USING_SVR4_H */
#undef EXTRA_SECTION_FUNCTIONS
#define EXTRA_SECTION_FUNCTIONS \
const_section (); \
}
+/* Jump tables consist of branch instructions and should be output in
+ the text section. When we use a table of addresses, we explicitly
+ change to the readonly data section. */
+#define JUMP_TABLES_IN_TEXT_SECTION 1
+
/* Define this macro if references to a symbol must be treated differently
depending on something about the variable or function named by the
symbol (such as what section it is in).
OSDN Git Service
