/* Definitions of target machine for GNU compiler, Renesas M32R cpu.
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
- 2005 Free Software Foundation, Inc.
+ 2005, 2006 Free Software Foundation, Inc.
This file is part of GCC.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to
- the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
/* Things to do:
- longlong.h?
builtin_assert ("machine=m32r"); \
builtin_define (TARGET_BIG_ENDIAN \
? "__BIG_ENDIAN__" : "__LITTLE_ENDIAN__"); \
- if (flag_pic) \
- { \
- builtin_define ("__pic__"); \
- builtin_define ("__PIC__"); \
- } \
} \
while (0)
/* Options to pass on to the assembler. */
#undef ASM_SPEC
-#define ASM_SPEC "%{v} %(asm_cpu) %(relax) %{fpic:-K PIC} %{fPIC:-K PIC}"
+#define ASM_SPEC "%{v} %(asm_cpu) %(relax) %{fpic|fpie:-K PIC} %{fPIC|fPIE:-K PIC}"
#define LINK_SPEC "%{v} %(link_cpu) %(relax)"
#define TARGET_CPU_DEFAULT 0
#endif
-/* Cache-flush support. */
-extern const char * m32r_cache_flush_func;
-extern int m32r_cache_flush_trap;
-
/* Code Models
Code models are used to select between two choices of two separate
if (SIZE) \
{ \
flag_omit_frame_pointer = TRUE; \
- flag_strength_reduce = FALSE; \
} \
\
SUBTARGET_OPTIMIZATION_OPTIONS \
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
do \
{ \
- if ( GET_CODE (ADDR) == PRE_DEC \
- || GET_CODE (ADDR) == PRE_INC \
- || GET_CODE (ADDR) == POST_INC \
- || GET_CODE (ADDR) == LO_SUM) \
+ if (GET_CODE (ADDR) == LO_SUM) \
goto LABEL; \
} \
while (0)
/* This register is call-saved on the M32R. */
/*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
-/* By generating position-independent code, when two different programs (A
- and B) share a common library (libC.a), the text of the library can be
- shared whether or not the library is linked at the same address for both
- programs. In some of these environments, position-independent code
- requires not only the use of different addressing modes, but also
- special code to enable the use of these addressing modes.
-
- The FINALIZE_PIC macro serves as a hook to emit these special
- codes once the function is being compiled into assembly code, but not
- before. (It is not done before, because in the case of compiling an
- inline function, it would lead to multiple PIC prologues being
- included in functions which used inline functions and were compiled to
- assembly language.) */
-
-#define FINALIZE_PIC m32r_finalize_pic ()
-
/* A C expression that is nonzero if X is a legitimate immediate
operand on the target machine when generating position independent code.
You can assume that X satisfies CONSTANT_P, so you need not
#define DBX_OUTPUT_SOURCE_LINE(file, line, counter) \
do \
{ \
- rtx begin_label = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);\
+ const char * begin_label = \
+ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); \
char label[64]; \
ASM_GENERATE_INTERNAL_LABEL (label, "LM", counter); \
\
{ \
if (! TARGET_SDATA_NONE \
&& (SIZE) > 0 && (SIZE) <= g_switch_value) \
- named_section (0, ".sbss", 0); \
+ switch_to_section (get_named_section (NULL, ".sbss", 0)); \
else \
- bss_section (); \
+ switch_to_section (bss_section); \
ASM_OUTPUT_ALIGN (FILE, floor_log2 (ALIGN / BITS_PER_UNIT)); \
last_assemble_variable_decl = DECL; \
ASM_DECLARE_OBJECT_NAME (FILE, NAME, DECL); \