#define REG_ALLOC_ORDER { \
0, 1, 2, 3, 4, 5, /* r0..r3, a0, a1 */ \
- 12, 13, 14, 15, 16, 17, 18, /* mem0..mem7 */ \
+ 12, 13, 14, 15, 16, 17, 18, 19, /* mem0..mem7 */ \
6, 7, 8, 9, 10, 11 /* sb, fb, sp, pc, flg, ap */ }
/* How Values Fit in Registers */
{ 0x000001f0 }, /* PS - a0 a1 sb fp sp */\
{ 0x0000000f }, /* SI - r0r2 r1r3 a0a1 */\
{ 0x0000003f }, /* HI - r0 r1 r2 r3 a0 a1 */\
+ { 0x00000033 }, /* R02A - r0r2 a0 a1 */ \
{ 0x0000003f }, /* RA - r0..r3 a0 a1 */\
{ 0x0000007f }, /* GENERAL */\
{ 0x00000400 }, /* FLG */\
PS_REGS,
SI_REGS,
HI_REGS,
+ R02A_REGS,
RA_REGS,
GENERAL_REGS,
FLG_REGS,
"PS_REGS", \
"SI_REGS", \
"HI_REGS", \
+"R02A_REGS", \
"RA_REGS", \
"GENERAL_REGS", \
"FLG_REGS", \