(define_insn "addqi3"
[(set (match_operand:QI 0 "mra_or_sp_operand"
- "=SdRhl,SdRhl,??Rmm,??Rmm, Raa,Raa,SdRhl,??Rmm")
+ "=SdRhl,SdRhl,??Rmm,??Rmm, *Raa,*Raa,SdRhl,??Rmm")
(plus:QI (match_operand:QI 1 "mra_operand"
"%0,0,0,0, 0,0,0,0")
(match_operand:QI 2 "mrai_operand"
- "iSdRhl,?Rmm,iSdRhl,?Rmm, iSdRhl,?Rmm,Raa,Raa")))]
+ "iSdRhl,?Rmm,iSdRhl,?Rmm, iSdRhl,?Rmm,*Raa,*Raa")))]
""
"add.b\t%2,%0"
[(set_attr "flags" "oszc")]
)
(define_insn "addhi3"
- [(set (match_operand:HI 0 "nonimmediate_operand"
- "=SdRhi,SdRhi,??Rmm,??Rmm, SdRhi,??Rmm, Rhi, !Rsp")
- (plus:HI (match_operand:HI 1 "general_operand"
- "%0,0,0,0, 0,0, Raw, 0")
- (match_operand:HI 2 "general_operand"
- "IU2sSdRhi,?Rmm,IU2sSdRhi,?Rmm, IM2,IM2, IS2IU2, i")))]
+ [(set (match_operand:HI 0 "m32c_nonimmediate_operand"
+ "=SdRhi,SdRhi,??Rmm,??Rmm, SdRhi,??Rmm, Rhi, Raw, Raw, !Rsp")
+ (plus:HI (match_operand:HI 1 "m32c_any_operand"
+ "%0,0,0,0, 0,0, Raw, Rfb, Rfb, 0")
+ (match_operand:HI 2 "m32c_any_operand"
+ "IU2sSdRhi,?Rmm,IU2sSdRhi,?Rmm, IM2,IM2, IS2IU2, I00, IS1, i")))]
""
"@
add.w\t%2,%0
sub.w\t%m2,%0
sub.w\t%m2,%0
mova\t%d2[%1],%0
+ stc\t%1,%0
+ mova\t%D2[%1],%0
add.w\t%2,%0"
- [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,oszc,oszc,oszc")]
+ [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,oszc,n,n,n,oszc")]
)
(define_insn "addpsi3"
- [(set (match_operand:PSI 0 "nonimmediate_operand" "=SdRpi,SdRpi,Rsp*Rmm, Rpi,Rpi,Rhi,&Rhi")
- (plus:PSI (match_operand:PSI 1 "nonimmediate_operand" "0,0,0, Raa,Rad,!Rcl,Rhi")
- (match_operand:PSI 2 "general_operand" "iSdRpi,?Rmm,i, i,IS2,i,!Rcl")))]
+ [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "=Rpi,Raa,SdRpi,SdRpi,Rsp*Rmm, Rpi,Rpi")
+ (plus:PSI (match_operand:PSI 1 "m32c_nonimmediate_operand" "0,0,0,0,0, Raa,Rad")
+ (match_operand:PSI 2 "m32c_any_operand" "Is3,IS1,iSdRpi,?Rmm,i, i,IS2")))]
"TARGET_A24"
"@
- add.%&\t%2,%0
- add.%&\t%2,%0
- add.%&\t%2,%0
+ add.l:q\t%2,%0
+ addx\t%2,%0
+ add.l\t%2,%0
+ add.l\t%2,%0
+ add.l\t%2,%0
mova\t%d2[%1],%0
- mova\t%D2[%1],%0
- #
- #"
- [(set_attr "flags" "oszc,oszc,oszc,*,*,oszc,oszc")]
+ mova\t%D2[%1],%0"
+ [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,n,n")]
)
-; This is needed for reloading large frames.
-(define_split
- [(set (match_operand:PSI 0 "ra_operand" "")
- (plus:PSI (match_operand:PSI 1 "cr_operand" "")
- (match_operand:PSI 2 "immediate_operand" "")))]
- ""
- [(set (match_dup 0) (match_dup 1))
- (set (match_dup 0)
- (plus:PSI (match_dup 0)
- (match_dup 2)))]
+(define_expand "addsi3"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
+ (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0")
+ (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
+ "TARGET_A24 ||TARGET_A16"
""
)
-; This is needed for reloading large frames.
-(define_split
- [(set (match_operand:PSI 0 "ra_operand" "")
- (plus:PSI (match_operand:PSI 1 "ra_operand" "")
- (match_operand:PSI 2 "cr_operand" "")))]
- ""
- [(set (match_dup 0) (match_dup 2))
- (set (match_dup 0)
- (plus:PSI (match_dup 0)
- (match_dup 1)))]
- ""
- )
+(define_insn "addsi3_1"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,??Rmm,RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
+ (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
+ (match_operand 2 "mrai_operand" "IU2,IU2,i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
+ "TARGET_A16"
+ "*
+
+ switch (which_alternative)
+ {
+ case 0:
+ return \"add.w %X2,%h0\;adcf.w %H0\";
+ case 1:
+ return \"add.w %X2,%h0\;adcf.w %H0\";
+ case 2:
+ output_asm_insn (\"add.w %X2,%h0\",operands);
+ operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
+ return \"adc.w %X2,%H0\";
+ case 3:
+ return \"add.w %h2,%h0\;adc.w %H2,%H0\";
+ case 4:
+ output_asm_insn (\"add.w %X2,%h0\",operands);
+ operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
+ return \"adc.w %X2,%H0\";
+ case 5:
+ return \"add.w %h2,%h0\;adc.w %H2,%H0\";
+ case 6:
+ return \"add.w %h2,%h0\;adc.w %H2,%H0\";
+ case 7:
+ return \"add.w %h2,%h0\;adc.w %H2,%H0\";
+ }"
+ [(set_attr "flags" "x,x,x,x,x,x,x,x")]
+)
+
+(define_insn "addsi3_2"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
+ (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0")
+ (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
+ "TARGET_A24"
+ "add.l\t%2,%0"
+ [(set_attr "flags" "oszc")]
+)
(define_insn "subqi3"
[(set (match_operand:QI 0 "mra_or_sp_operand"
[(set_attr "flags" "oszc")]
)
+(define_expand "subsi3"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
+ (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0")
+ (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
+ "TARGET_A24 ||TARGET_A16"
+ ""
+)
+
+(define_insn "subsi3_1"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
+ (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0,0,0")
+ (match_operand:SI 2 "mrai_operand" "i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
+ "TARGET_A16"
+ "*
+ switch (which_alternative)
+ {
+ case 0:
+ output_asm_insn (\"sub.w %X2,%h0\",operands);
+ operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
+ return \"sbb.w %X2,%H0\";
+ case 1:
+ return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
+ case 2:
+ output_asm_insn (\"sub.w %X2,%h0\",operands);
+ operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
+ return \"sbb.w %X2,%H0\";
+ case 3:
+ return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
+ case 4:
+ return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
+ case 5:
+ return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
+ }"
+ [(set_attr "flags" "x,x,x,x,x,x")]
+)
+
+(define_insn "subsi3_2"
+ [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
+ (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0")
+ (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
+ "TARGET_A24"
+ "sub.l\t%2,%0"
+ [(set_attr "flags" "oszc,oszc,oszc,oszc")]
+)
+
(define_insn "negqi2"
[(set (match_operand:QI 0 "mra_operand" "=SdRhl,??Rmm")
(neg:QI (match_operand:QI 1 "mra_operand" "0,0")))]
(neg:SI (match_operand:SI 1 "mra_operand" "0,0")))]
""
"not.w %h0 | not.w %H0 | add.w #1,%h0 | adcf.w %H0"
- [(set_attr "flags" "oszc,oszc")]
+ [(set_attr "flags" "x")]
)
(define_insn "absqi2"
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