/* op0 = A B X D */
emit_insn (gen_sse_shufps_1 (target, target, tmp,
GEN_INT (1), GEN_INT (0),
- GEN_INT (2), GEN_INT (3)));
+ GEN_INT (2+4), GEN_INT (3+4)));
return;
case 2:
ix86_expand_vector_set (false, target, val, 0);
emit_insn (gen_sse_shufps_1 (target, target, tmp,
GEN_INT (0), GEN_INT (1),
- GEN_INT (0), GEN_INT (3)));
+ GEN_INT (0+4), GEN_INT (3+4)));
return;
case 3:
ix86_expand_vector_set (false, target, val, 0);
emit_insn (gen_sse_shufps_1 (target, target, tmp,
GEN_INT (0), GEN_INT (1),
- GEN_INT (2), GEN_INT (0)));
+ GEN_INT (2+4), GEN_INT (0+4)));
return;
default:
tmp = gen_reg_rtx (mode);
emit_insn (gen_sse_shufps_1 (tmp, vec, vec,
GEN_INT (elt), GEN_INT (elt),
- GEN_INT (elt), GEN_INT (elt)));
+ GEN_INT (elt+4), GEN_INT (elt+4)));
break;
case 2: