free (opts);
}
else
- fprintf (stderr, "<no options>\n\n");
+ fputs ("<no options>\n\n", stderr);
return;
}
{
if ((ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_MEDIUM_PIC)
&& size > (unsigned int)ix86_section_threshold)
- fprintf (file, ".largecomm\t");
+ fputs (".largecomm\t", file);
else
- fprintf (file, "%s", COMMON_ASM_OP);
+ fputs (COMMON_ASM_OP, file);
assemble_name (file, name);
fprintf (file, ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",
size, align / BITS_PER_UNIT);
(*targetm.asm_out.globalize_label) (asm_out_file, name);
fputs ("\t.hidden\t", asm_out_file);
assemble_name (asm_out_file, name);
- fputc ('\n', asm_out_file);
+ putc ('\n', asm_out_file);
ASM_DECLARE_FUNCTION_NAME (asm_out_file, name, decl);
}
else
#if TARGET_MACHO
fputs (" ; ", file);
#else
- fputc (' ', file);
+ putc (' ', file);
#endif
return;
char dstr[30];
real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (x), sizeof (dstr), 0, 1);
- fprintf (file, "%s", dstr);
+ fputs (dstr, file);
}
else if (GET_CODE (x) == CONST_DOUBLE
output_387_ffreep (rtx *operands ATTRIBUTE_UNUSED, int opno)
{
if (TARGET_USE_FFREEP)
-#if HAVE_AS_IX86_FFREEP
+#ifdef HAVE_AS_IX86_FFREEP
return opno ? "ffreep\t%y1" : "ffreep\t%y0";
#else
{
- static char retval[] = ".word\t0xc_df";
+ static char retval[32];
int regno = REGNO (operands[opno]);
gcc_assert (FP_REGNO_P (regno));
- retval[9] = '0' + (regno - FIRST_STACK_REG);
+ regno -= FIRST_STACK_REG;
+
+ snprintf (retval, sizeof (retval), ASM_SHORT "0xc%ddf", regno);
return retval;
}
#endif
gcc_assert (!TARGET_64BIT);
#endif
- fprintf (file, "%s%s%d\n", directive, LPREFIX, value);
+ fprintf (file, "%s" LPREFIX "%d\n", directive, value);
}
void
#endif
/* We can't use @GOTOFF for text labels on VxWorks; see gotoff_operand. */
if (TARGET_64BIT || TARGET_VXWORKS_RTP)
- fprintf (file, "%s%s%d-%s%d\n",
- directive, LPREFIX, value, LPREFIX, rel);
+ fprintf (file, "%s" LPREFIX "%d-" LPREFIX "%d\n",
+ directive, value, rel);
else if (HAVE_AS_GOTOFF_IN_DATA)
- fprintf (file, "%s%s%d@GOTOFF\n", ASM_LONG, LPREFIX, value);
+ fprintf (file, ASM_LONG LPREFIX "%d@GOTOFF\n", value);
#if TARGET_MACHO
else if (TARGET_MACHO)
{
- fprintf (file, "%s%s%d-", ASM_LONG, LPREFIX, value);
+ fprintf (file, ASM_LONG LPREFIX "%d-", value);
machopic_output_function_base_name (file);
- fprintf(file, "\n");
+ putc ('\n', file);
}
#endif
else
- asm_fprintf (file, "%s%U%s+[.-%s%d]\n",
- ASM_LONG, GOT_SYMBOL_NAME, LPREFIX, value);
+ asm_fprintf (file, ASM_LONG "%U%s+[.-" LPREFIX "%d]\n",
+ GOT_SYMBOL_NAME, value);
}
\f
/* Generate either "mov $0, reg" or "xor reg, reg", as appropriate
all elements of the vector register. If INVERT is true, then create
a mask excluding the sign bit. */
-static rtx
+rtx
ix86_build_signbit_mask (enum machine_mode mode, bool vect, bool invert)
{
enum machine_mode vec_mode, imode;
op0 = CONST0_RTX (vmode);
else
{
- rtvec v;
+ rtx v = ix86_build_const_vector (mode, false, op0);
- if (mode == SFmode)
- v = gen_rtvec (4, op0, CONST0_RTX (SFmode),
- CONST0_RTX (SFmode), CONST0_RTX (SFmode));
- else
- v = gen_rtvec (2, op0, CONST0_RTX (DFmode));
-
- op0 = force_reg (vmode, gen_rtx_CONST_VECTOR (vmode, v));
+ op0 = force_reg (vmode, v);
}
}
else if (op0 != CONST0_RTX (mode))
IX86_BUILTIN_FABSQ,
IX86_BUILTIN_COPYSIGNQ,
+ /* Vectorizer support builtins. */
+ IX86_BUILTIN_CPYSGNPS,
+ IX86_BUILTIN_CPYSGNPD,
+
+ IX86_BUILTIN_CVTUDQ2PS,
+
/* SSE5 instructions */
IX86_BUILTIN_FMADDSS,
IX86_BUILTIN_FMADDSD,
{ OPTION_MASK_ISA_SSE, CODE_FOR_iorv4sf3, "__builtin_ia32_orps", IX86_BUILTIN_ORPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_xorv4sf3, "__builtin_ia32_xorps", IX86_BUILTIN_XORPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
+ { OPTION_MASK_ISA_SSE, CODE_FOR_copysignv4sf3, "__builtin_ia32_copysignps", IX86_BUILTIN_CPYSGNPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
+
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_movss, "__builtin_ia32_movss", IX86_BUILTIN_MOVSS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_movhlps_exp, "__builtin_ia32_movhlps", IX86_BUILTIN_MOVHLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse_movlhps_exp, "__builtin_ia32_movlhps", IX86_BUILTIN_MOVLHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sqrtv2df2, "__builtin_ia32_sqrtpd", IX86_BUILTIN_SQRTPD, UNKNOWN, (int) V2DF_FTYPE_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_cvtdq2pd, "__builtin_ia32_cvtdq2pd", IX86_BUILTIN_CVTDQ2PD, UNKNOWN, (int) V2DF_FTYPE_V4SI },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_cvtdq2ps, "__builtin_ia32_cvtdq2ps", IX86_BUILTIN_CVTDQ2PS, UNKNOWN, (int) V4SF_FTYPE_V4SI },
+ { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_cvtudq2ps, "__builtin_ia32_cvtudq2ps", IX86_BUILTIN_CVTUDQ2PS, UNKNOWN, (int) V4SF_FTYPE_V4SI },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_cvtpd2dq, "__builtin_ia32_cvtpd2dq", IX86_BUILTIN_CVTPD2DQ, UNKNOWN, (int) V4SI_FTYPE_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_cvtpd2pi, "__builtin_ia32_cvtpd2pi", IX86_BUILTIN_CVTPD2PI, UNKNOWN, (int) V2SI_FTYPE_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_iorv2df3, "__builtin_ia32_orpd", IX86_BUILTIN_ORPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_xorv2df3, "__builtin_ia32_xorpd", IX86_BUILTIN_XORPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
+ { OPTION_MASK_ISA_SSE2, CODE_FOR_copysignv2df3, "__builtin_ia32_copysignpd", IX86_BUILTIN_CPYSGNPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
+
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_movsd, "__builtin_ia32_movsd", IX86_BUILTIN_MOVSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpckhpd_exp, "__builtin_ia32_unpckhpd", IX86_BUILTIN_UNPCKHPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpcklpd_exp, "__builtin_ia32_unpcklpd", IX86_BUILTIN_UNPCKLPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF },
return ix86_builtins[IX86_BUILTIN_CVTPS2DQ];
break;
+ case BUILT_IN_COPYSIGN:
+ if (out_mode == DFmode && out_n == 2
+ && in_mode == DFmode && in_n == 2)
+ return ix86_builtins[IX86_BUILTIN_CPYSGNPD];
+ break;
+
+ case BUILT_IN_COPYSIGNF:
+ if (out_mode == SFmode && out_n == 4
+ && in_mode == SFmode && in_n == 4)
+ return ix86_builtins[IX86_BUILTIN_CPYSGNPS];
+ break;
+
default:
;
}
static tree
ix86_vectorize_builtin_conversion (unsigned int code, tree type)
{
- if (TREE_CODE (type) != VECTOR_TYPE
- /* There are only conversions from/to signed integers. */
- || TYPE_UNSIGNED (TREE_TYPE (type)))
+ if (TREE_CODE (type) != VECTOR_TYPE)
return NULL_TREE;
switch (code)
switch (TYPE_MODE (type))
{
case V4SImode:
- return ix86_builtins[IX86_BUILTIN_CVTDQ2PS];
+ return TYPE_UNSIGNED (type)
+ ? ix86_builtins[IX86_BUILTIN_CVTUDQ2PS]
+ : ix86_builtins[IX86_BUILTIN_CVTDQ2PS];
default:
return NULL_TREE;
}
switch (TYPE_MODE (type))
{
case V4SImode:
- return ix86_builtins[IX86_BUILTIN_CVTTPS2DQ];
+ return TYPE_UNSIGNED (type)
+ ? NULL_TREE
+ : ix86_builtins[IX86_BUILTIN_CVTTPS2DQ];
default:
return NULL_TREE;
}
}
}
+/* Implement TARGET_IRA_COVER_CLASSES. If -mfpmath=sse, we prefer
+ SSE_REGS to FLOAT_REGS if their costs for a pseudo are the
+ same. */
+static const enum reg_class *
+i386_ira_cover_classes (void)
+{
+ static const enum reg_class sse_fpmath_classes[] = {
+ GENERAL_REGS, SSE_REGS, MMX_REGS, FLOAT_REGS, LIM_REG_CLASSES
+ };
+ static const enum reg_class no_sse_fpmath_classes[] = {
+ GENERAL_REGS, FLOAT_REGS, MMX_REGS, SSE_REGS, LIM_REG_CLASSES
+ };
+
+ return TARGET_SSE_MATH ? sse_fpmath_classes : no_sse_fpmath_classes;
+}
+
/* Put float CONST_DOUBLE in the constant pool instead of fp regs.
QImode must go into class Q_REGS.
Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
if (MACHOPIC_PURE)
{
fprintf (file, "\tlea\t%s-LPC$%d(%%eax),%%eax\n", lazy_ptr_name, label);
- fprintf (file, "\tpushl\t%%eax\n");
+ fputs ("\tpushl\t%eax\n", file);
}
else
fprintf (file, "\tpushl\t$%s\n", lazy_ptr_name);
- fprintf (file, "\tjmp\tdyld_stub_binding_helper\n");
+ fputs ("\tjmp\tdyld_stub_binding_helper\n", file);
switch_to_section (darwin_sections[machopic_lazy_symbol_ptr_section]);
fprintf (file, "%s:\n", lazy_ptr_name);
fprintf (file, "\t.indirect_symbol %s\n", symbol_name);
- fprintf (file, "\t.long %s\n", binder_name);
+ fprintf (file, ASM_LONG "%s\n", binder_name);
}
void
if (TARGET_64BIT)
{
#ifndef NO_PROFILE_COUNTERS
- fprintf (file, "\tleaq\t%sP%d@(%%rip),%%r11\n", LPREFIX, labelno);
+ fprintf (file, "\tleaq\t" LPREFIX "P%d@(%%rip),%%r11\n", labelno);
#endif
if (DEFAULT_ABI == SYSV_ABI && flag_pic)
- fprintf (file, "\tcall\t*%s@GOTPCREL(%%rip)\n", MCOUNT_NAME);
+ fputs ("\tcall\t*" MCOUNT_NAME "@GOTPCREL(%rip)\n", file);
else
- fprintf (file, "\tcall\t%s\n", MCOUNT_NAME);
+ fputs ("\tcall\t" MCOUNT_NAME "\n", file);
}
else if (flag_pic)
{
#ifndef NO_PROFILE_COUNTERS
- fprintf (file, "\tleal\t%sP%d@GOTOFF(%%ebx),%%%s\n",
- LPREFIX, labelno, PROFILE_COUNT_REGISTER);
+ fprintf (file, "\tleal\t" LPREFIX "P%d@GOTOFF(%%ebx),%%" PROFILE_COUNT_REGISTER "\n",
+ labelno);
#endif
- fprintf (file, "\tcall\t*%s@GOT(%%ebx)\n", MCOUNT_NAME);
+ fputs ("\tcall\t*" MCOUNT_NAME "@GOT(%ebx)\n", file);
}
else
{
#ifndef NO_PROFILE_COUNTERS
- fprintf (file, "\tmovl\t$%sP%d,%%%s\n", LPREFIX, labelno,
- PROFILE_COUNT_REGISTER);
+ fprintf (file, "\tmovl\t$" LPREFIX "P%d,%%" PROFILE_COUNT_REGISTER "\n",
+ labelno);
#endif
- fprintf (file, "\tcall\t%s\n", MCOUNT_NAME);
+ fputs ("\tcall\t" MCOUNT_NAME "\n", file);
}
}
#undef TARGET_LEGITIMATE_ADDRESS_P
#define TARGET_LEGITIMATE_ADDRESS_P ix86_legitimate_address_p
+#undef TARGET_IRA_COVER_CLASSES
+#define TARGET_IRA_COVER_CLASSES i386_ira_cover_classes
+
#undef TARGET_FRAME_POINTER_REQUIRED
#define TARGET_FRAME_POINTER_REQUIRED ix86_frame_pointer_required
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