* config/h8300/h8300.md: Fix formatting.

[pf3gnuchains/gcc-fork.git] / gcc / config / h8300 / h8300.md

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index da0f6f1..35f2750 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -1887,25 +1887,22 @@
 
 (define_expand "ashlsi3"
   [(set (match_operand:SI 0 "register_operand" "")
-       (ashift:SI
-        (match_operand:SI 1 "general_operand" "")
-        (match_operand:QI 2 "nonmemory_operand" "")))]
+       (ashift:SI (match_operand:SI 1 "general_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))]
   ""
   "if (expand_a_shift (SImode, ASHIFT, operands)) DONE; else FAIL;")
 
 (define_expand "lshrsi3"
   [(set (match_operand:SI 0 "register_operand" "")
-       (lshiftrt:SI
-        (match_operand:SI 1 "general_operand" "")
-        (match_operand:QI 2 "nonmemory_operand" "")))]
+       (lshiftrt:SI (match_operand:SI 1 "general_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))]
   ""
   "if (expand_a_shift (SImode, LSHIFTRT, operands)) DONE; else FAIL;")
 
 (define_expand "ashrsi3"
   [(set (match_operand:SI 0 "register_operand" "")
-       (ashiftrt:SI
-        (match_operand:SI 1 "general_operand" "")
-        (match_operand:QI 2 "nonmemory_operand" "")))]
+       (ashiftrt:SI (match_operand:SI 1 "general_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))]
   ""
   "if (expand_a_shift (SImode, ASHIFTRT, operands)) DONE; else FAIL;")
 
@@ -2152,9 +2149,8 @@
 
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r")
-        (ior:HI
-           (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
-           (match_operand:HI 2 "register_operand" "0")))]
+        (ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
+               (match_operand:HI 2 "register_operand" "0")))]
   "REG_P (operands[0])
    && REG_P (operands[1])
    && REGNO (operands[0]) != REGNO (operands[1])"
@@ -2164,9 +2160,8 @@
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
-        (ior:SI
-           (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
-           (match_operand:SI 2 "register_operand" "0")))]
+        (ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
+               (match_operand:SI 2 "register_operand" "0")))]
   "(TARGET_H8300H || TARGET_H8300S)
    && REG_P (operands[0])
    && REG_P (operands[1])
@@ -2177,9 +2172,8 @@
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
-        (ior:SI
-           (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
-           (match_operand:SI 2 "register_operand" "0")))]
+        (ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
+               (match_operand:SI 2 "register_operand" "0")))]
   "REG_P (operands[0])
    && REG_P (operands[1])
    && REGNO (operands[0]) != REGNO (operands[1])"
@@ -2189,9 +2183,8 @@
 
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r")
-        (xor:HI
-           (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
-           (match_operand:HI 2 "register_operand" "0")))]
+        (xor:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
+               (match_operand:HI 2 "register_operand" "0")))]
   "REG_P (operands[0])
    && REG_P (operands[1])
    && REGNO (operands[0]) != REGNO (operands[1])"
@@ -2201,9 +2194,8 @@
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
-        (xor:SI
-           (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
-           (match_operand:SI 2 "register_operand" "0")))]
+        (xor:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
+               (match_operand:SI 2 "register_operand" "0")))]
   "(TARGET_H8300H || TARGET_H8300S)
    && REG_P (operands[0])
    && REG_P (operands[1])
@@ -2214,9 +2206,8 @@
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
-        (xor:SI
-           (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
-           (match_operand:SI 2 "register_operand" "0")))]
+        (xor:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
+               (match_operand:SI 2 "register_operand" "0")))]
   "REG_P (operands[0])
    && REG_P (operands[1])
    && REGNO (operands[0]) != REGNO (operands[1])"
@@ -2226,10 +2217,9 @@
 
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r")
-        (ior:HI
-           (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
-           (ashift:HI (match_operand:HI 2 "register_operand" "r")
-                      (const_int 8))))]
+        (ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
+               (ashift:HI (match_operand:HI 2 "register_operand" "r")
+                          (const_int 8))))]
   "REG_P (operands[0])
    && REG_P (operands[2])
    && REGNO (operands[0]) != REGNO (operands[2])"
@@ -2239,10 +2229,9 @@
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
-        (ior:SI
-           (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
-           (ashift:SI (match_operand:SI 2 "register_operand" "r")
-                      (const_int 16))))]
+        (ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
+               (ashift:SI (match_operand:SI 2 "register_operand" "r")
+                          (const_int 16))))]
   "(TARGET_H8300H || TARGET_H8300S)
    && REG_P (operands[0])
    && REG_P (operands[2])