fprintf (file, "\taddi %s,#%d,%s\n", name_arg0, (int) delta, name_arg0);
else
{
- const char *name_add = reg_names[TEMP_REGNO];
- fprintf (file, "\tsethi%s #hi(", parallel);
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
- fprintf (file, "),%s\n", name_add);
- fprintf (file, "\tsetlo #lo(");
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
- fprintf (file, "),%s\n", name_add);
+ const char *const name_add = reg_names[TEMP_REGNO];
+ fprintf (file, "\tsethi%s #hi(" HOST_WIDE_INT_PRINT_DEC "),%s\n",
+ parallel, delta, name_add);
+ fprintf (file, "\tsetlo #lo(" HOST_WIDE_INT_PRINT_DEC "),%s\n",
+ delta, name_add);
fprintf (file, "\tadd %s,%s,%s\n", name_add, name_arg0, name_arg0);
}
Printable instructions will be asm_operands or match one of the .md
patterns. Since asm instructions cannot be packed -- and will
- therefore have TImode -- this loop terminates on any recognisable
- instruction, and on any unrecognisable instruction with TImode. */
+ therefore have TImode -- this loop terminates on any recognizable
+ instruction, and on any unrecognizable instruction with TImode. */
for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
{
if (NOTE_P (insn))
{
fputs ("#gprel12(", stream);
assemble_name (stream, XSTR (XEXP (XEXP (x1, 0), 0), 0));
- fprintf (stream, "+%d)", INTVAL (XEXP (XEXP (x1, 0), 1)));
+ fprintf (stream, "+"HOST_WIDE_INT_PRINT_DEC")",
+ INTVAL (XEXP (XEXP (x1, 0), 1)));
}
else
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
return false;
size = int_size_in_bytes (TREE_TYPE (decl));
- if (size > 0 && size <= g_switch_value)
+ if (size > 0 && (unsigned HOST_WIDE_INT) size <= g_switch_value)
return true;
/* If we already know which section the decl should be in, see if
static bool
frv_rtx_costs (x, code, outer_code, total)
rtx x;
- int code, outer_code;
+ int code, outer_code ATTRIBUTE_UNUSED;
int *total;
{
switch (code)