* alpha/osf.h (TARGET_HAS_XFLOATING_LIBS): Define.

[pf3gnuchains/gcc-fork.git] / gcc / config / alpha / alpha.md

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 577cbe6..b1d7904 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1842,6 +1842,13 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_expand "addtf3"
+  [(use (match_operand 0 "register_operand" ""))
+   (use (match_operand 1 "general_operand" ""))
+   (use (match_operand 2 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_arith (PLUS, operands); DONE;")
+
 ;; Define conversion operators between DFmode and SImode, using the cvtql
 ;; instruction.  To allow combine et al to do useful things, we keep the
 ;; operation as a unit until after reload, at which point we split the
@@ -1981,6 +1988,12 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_expand "fix_trunctfdi2"
+  [(use (match_operand:DI 0 "register_operand" ""))
+   (use (match_operand:TF 1 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_cvt (FIX, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))]
@@ -2013,6 +2026,18 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_expand "floatditf2"
+  [(use (match_operand:TF 0 "register_operand" ""))
+   (use (match_operand:DI 1 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_cvt (FLOAT, operands); DONE;")
+
+(define_expand "floatunsditf2"
+  [(use (match_operand:TF 0 "register_operand" ""))
+   (use (match_operand:DI 1 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_cvt (UNSIGNED_FLOAT, operands); DONE;")
+
 (define_expand "extendsfdf2"
   [(use (match_operand:DF 0 "register_operand" ""))
    (use (match_operand:SF 1 "nonimmediate_operand" ""))]
@@ -2047,6 +2072,12 @@
   [(set_attr "type" "fcpys,fld,fst")
    (set_attr "trap" "yes")])
 
+(define_expand "extenddftf2"
+  [(use (match_operand:TF 0 "register_operand" ""))
+   (use (match_operand:DF 1 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_cvt (FLOAT_EXTEND, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (float_truncate:SF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
@@ -2063,6 +2094,12 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_expand "trunctfdf2"
+  [(use (match_operand:DF 0 "register_operand" ""))
+   (use (match_operand:TF 1 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_cvt (FLOAT_TRUNCATE, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (div:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
@@ -2129,6 +2166,13 @@
   [(set_attr "type" "fdiv")
    (set_attr "trap" "yes")])
 
+(define_expand "divtf3"
+  [(use (match_operand 0 "register_operand" ""))
+   (use (match_operand 1 "general_operand" ""))
+   (use (match_operand 2 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_arith (DIV, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (mult:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
@@ -2186,6 +2230,13 @@
   [(set_attr "type" "fmul")
    (set_attr "trap" "yes")])
 
+(define_expand "multf3"
+  [(use (match_operand 0 "register_operand" ""))
+   (use (match_operand 1 "general_operand" ""))
+   (use (match_operand 2 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_arith (MULT, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (minus:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
@@ -2253,6 +2304,13 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_expand "subtf3"
+  [(use (match_operand 0 "register_operand" ""))
+   (use (match_operand 1 "general_operand" ""))
+   (use (match_operand 2 "general_operand" ""))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "alpha_emit_xfloating_arith (MINUS, operands); DONE;")
+
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
        (sqrt:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))]
@@ -2964,6 +3022,18 @@
   DONE;
 }")
 
+(define_expand "cmptf"
+  [(set (cc0) (compare (match_operand:TF 0 "general_operand" "")
+                      (match_operand:TF 1 "general_operand" "")))]
+  "TARGET_HAS_XFLOATING_LIBS"
+  "
+{
+  alpha_compare.op0 = operands[0];
+  alpha_compare.op1 = operands[1];
+  alpha_compare.fp_p = 1;
+  DONE;
+}")
+
 (define_expand "cmpdi"
   [(set (cc0) (compare (match_operand:DI 0 "reg_or_0_operand" "")
                       (match_operand:DI 1 "reg_or_8bit_operand" "")))]
@@ -5116,8 +5186,6 @@
       emit_insn (gen_adddi3 (tmp, tmp, GEN_INT(-8192)));
       emit_insn (gen_cmpdi (tmp, want));
       emit_jump_insn (gen_bgtu (loop_label));
-      if (obey_regdecls)
-       gen_rtx_USE (VOIDmode, tmp);
 
       memref = gen_rtx_MEM (DImode, want);
       MEM_VOLATILE_P (memref) = 1;