if (fndecl && TREE_CODE (fndecl) == FUNCTION_DECL)
{
tree t = fndecl;
+
/* Although a built-in FUNCTION_DECL and its non-__builtin
counterpart compare equal and get a shared mem_attrs, they
produce different dump output in compare-debug compilations,
adds a different (but equivalent) entry, while the other
doesn't run the garbage collector at the same spot and then
shares the mem_attr with the equivalent entry. */
- if (DECL_BUILT_IN_CLASS (t) == BUILT_IN_NORMAL
- && built_in_decls[DECL_FUNCTION_CODE (t)])
- t = built_in_decls[DECL_FUNCTION_CODE (t)];
- set_mem_expr (funmem, t);
+ if (DECL_BUILT_IN_CLASS (t) == BUILT_IN_NORMAL)
+ {
+ tree t2 = builtin_decl_explicit (DECL_FUNCTION_CODE (t));
+ if (t2)
+ t = t2;
+ }
+
+ set_mem_expr (funmem, t);
}
else if (fntree)
set_mem_expr (funmem, build_simple_mem_ref (CALL_EXPR_FN (fntree)));
rounded_stack_size_rtx = GEN_INT (rounded_stack_size);
stack_pointer_delta -= n_popped;
+ add_reg_note (call_insn, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
+
/* If popup is needed, stack realign must use DRAP */
if (SUPPORTS_STACK_ALIGNMENT)
crtl->need_drap = true;
return false;
}
+/* Return TRUE if FNDECL is either a TM builtin or a TM cloned
+ function. Return FALSE otherwise. */
+
+static bool
+is_tm_builtin (const_tree fndecl)
+{
+ if (fndecl == NULL)
+ return false;
+
+ if (decl_is_tm_clone (fndecl))
+ return true;
+
+ if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL)
+ {
+ switch (DECL_FUNCTION_CODE (fndecl))
+ {
+ case BUILT_IN_TM_COMMIT:
+ case BUILT_IN_TM_COMMIT_EH:
+ case BUILT_IN_TM_ABORT:
+ case BUILT_IN_TM_IRREVOCABLE:
+ case BUILT_IN_TM_GETTMCLONE_IRR:
+ case BUILT_IN_TM_MEMCPY:
+ case BUILT_IN_TM_MEMMOVE:
+ case BUILT_IN_TM_MEMSET:
+ CASE_BUILT_IN_TM_STORE (1):
+ CASE_BUILT_IN_TM_STORE (2):
+ CASE_BUILT_IN_TM_STORE (4):
+ CASE_BUILT_IN_TM_STORE (8):
+ CASE_BUILT_IN_TM_STORE (FLOAT):
+ CASE_BUILT_IN_TM_STORE (DOUBLE):
+ CASE_BUILT_IN_TM_STORE (LDOUBLE):
+ CASE_BUILT_IN_TM_STORE (M64):
+ CASE_BUILT_IN_TM_STORE (M128):
+ CASE_BUILT_IN_TM_STORE (M256):
+ CASE_BUILT_IN_TM_LOAD (1):
+ CASE_BUILT_IN_TM_LOAD (2):
+ CASE_BUILT_IN_TM_LOAD (4):
+ CASE_BUILT_IN_TM_LOAD (8):
+ CASE_BUILT_IN_TM_LOAD (FLOAT):
+ CASE_BUILT_IN_TM_LOAD (DOUBLE):
+ CASE_BUILT_IN_TM_LOAD (LDOUBLE):
+ CASE_BUILT_IN_TM_LOAD (M64):
+ CASE_BUILT_IN_TM_LOAD (M128):
+ CASE_BUILT_IN_TM_LOAD (M256):
+ case BUILT_IN_TM_LOG:
+ case BUILT_IN_TM_LOG_1:
+ case BUILT_IN_TM_LOG_2:
+ case BUILT_IN_TM_LOG_4:
+ case BUILT_IN_TM_LOG_8:
+ case BUILT_IN_TM_LOG_FLOAT:
+ case BUILT_IN_TM_LOG_DOUBLE:
+ case BUILT_IN_TM_LOG_LDOUBLE:
+ case BUILT_IN_TM_LOG_M64:
+ case BUILT_IN_TM_LOG_M128:
+ case BUILT_IN_TM_LOG_M256:
+ return true;
+ default:
+ break;
+ }
+ }
+ return false;
+}
+
/* Detect flags (function attributes) from the function decl or type node. */
int
if (TREE_NOTHROW (exp))
flags |= ECF_NOTHROW;
+ if (flag_tm)
+ {
+ if (is_tm_builtin (exp))
+ flags |= ECF_TM_BUILTIN;
+ else if ((flags & ECF_CONST) != 0
+ || lookup_attribute ("transaction_pure",
+ TYPE_ATTRIBUTES (TREE_TYPE (exp))))
+ flags |= ECF_TM_PURE;
+ }
+
flags = special_function_p (exp, flags);
}
- else if (TYPE_P (exp) && TYPE_READONLY (exp))
- flags |= ECF_CONST;
+ else if (TYPE_P (exp))
+ {
+ if (TYPE_READONLY (exp))
+ flags |= ECF_CONST;
+
+ if (flag_tm
+ && ((flags & ECF_CONST) != 0
+ || lookup_attribute ("transaction_pure", TYPE_ATTRIBUTES (exp))))
+ flags |= ECF_TM_PURE;
+ }
if (TREE_THIS_VOLATILE (exp))
{
|| (GET_CODE (args[i].value) == SUBREG
&& REG_P (SUBREG_REG (args[i].value)))))
&& args[i].mode != BLKmode
- && rtx_cost (args[i].value, SET, optimize_insn_for_speed_p ())
+ && set_src_cost (args[i].value, optimize_insn_for_speed_p ())
> COSTS_N_INSNS (1)
&& ((*reg_parm_seen
&& targetm.small_register_classes_for_mode_p (args[i].mode))
emit_move_insn (reg, const0_rtx);
bytes -= bitsize / BITS_PER_UNIT;
- store_bit_field (reg, bitsize, endian_correction, word_mode,
- word);
+ store_bit_field (reg, bitsize, endian_correction, 0, 0,
+ word_mode, word);
}
}
}
partial_mode = mode_for_size (units_on_stack * BITS_PER_UNIT,
MODE_INT, 1);
args[i].stack = gen_rtx_MEM (partial_mode, addr);
- set_mem_size (args[i].stack, GEN_INT (units_on_stack));
+ set_mem_size (args[i].stack, units_on_stack);
}
else
{
Generate a simple memory reference of the correct size.
*/
args[i].stack_slot = gen_rtx_MEM (partial_mode, addr);
- set_mem_size (args[i].stack_slot, GEN_INT (units_on_stack));
+ set_mem_size (args[i].stack_slot, units_on_stack);
}
else
{
&& (XEXP (addr, 0) == crtl->args.internal_arg_pointer
|| XEXP (addr, 1) == crtl->args.internal_arg_pointer))
return true;
+ /* If the address comes in a register, we have no idea of its origin so
+ give up and conservatively return true. */
+ else if (REG_P(addr))
+ return true;
else
return false;
if (GET_CODE (reg) == PARALLEL)
use_group_regs (call_fusage, reg);
else if (nregs == -1)
- use_reg (call_fusage, reg);
+ use_reg_mode (call_fusage, reg,
+ TYPE_MODE (TREE_TYPE (args[i].tree_value)));
else if (nregs > 0)
use_regs (call_fusage, REGNO (reg), nregs);
}
code = GET_CODE (x);
+ /* We need not check the operands of the CALL expression itself. */
+ if (code == CALL)
+ return 0;
+
if (code == MEM)
return mem_overlaps_already_clobbered_arg_p (XEXP (x, 0),
GET_MODE_SIZE (GET_MODE (x)));
}
if (args[i].stack)
- call_fusage = gen_rtx_EXPR_LIST (VOIDmode,
- gen_rtx_USE (VOIDmode,
- args[i].stack),
- call_fusage);
+ call_fusage
+ = gen_rtx_EXPR_LIST (TYPE_MODE (TREE_TYPE (args[i].tree_value)),
+ gen_rtx_USE (VOIDmode, args[i].stack),
+ call_fusage);
}
/* If we have a parm that is passed in registers but not in memory
if (old_stack_level)
{
+ rtx prev = get_last_insn ();
+
emit_stack_restore (SAVE_BLOCK, old_stack_level);
stack_pointer_delta = old_stack_pointer_delta;
+
+ fixup_args_size_notes (prev, get_last_insn (), stack_pointer_delta);
+
pending_stack_adjust = old_pending_adj;
old_stack_allocated = stack_pointer_delta - pending_stack_adjust;
stack_arg_under_construction = old_stack_arg_under_construction;
argvec[count].partial
= targetm.calls.arg_partial_bytes (args_so_far, mode, NULL_TREE, 1);
- locate_and_pad_parm (mode, NULL_TREE,
+ if (argvec[count].reg == 0
+ || argvec[count].partial != 0
+ || reg_parm_stack_space > 0)
+ {
+ locate_and_pad_parm (mode, NULL_TREE,
#ifdef STACK_PARMS_IN_REG_PARM_AREA
- 1,
+ 1,
#else
- argvec[count].reg != 0,
+ argvec[count].reg != 0,
+#endif
+ argvec[count].partial,
+ NULL_TREE, &args_size, &argvec[count].locate);
+ args_size.constant += argvec[count].locate.size.constant;
+ gcc_assert (!argvec[count].locate.size.var);
+ }
+#ifdef BLOCK_REG_PADDING
+ else
+ /* The argument is passed entirely in registers. See at which
+ end it should be padded. */
+ argvec[count].locate.where_pad =
+ BLOCK_REG_PADDING (mode, NULL_TREE,
+ GET_MODE_SIZE (mode) <= UNITS_PER_WORD);
#endif
- argvec[count].partial,
- NULL_TREE, &args_size, &argvec[count].locate);
-
- gcc_assert (!argvec[count].locate.size.var);
-
- if (argvec[count].reg == 0 || argvec[count].partial != 0
- || reg_parm_stack_space > 0)
- args_size.constant += argvec[count].locate.size.constant;
targetm.calls.function_arg_advance (args_so_far, mode, (tree) 0, true);
}
rtx val = argvec[argnum].value;
rtx reg = argvec[argnum].reg;
int partial = argvec[argnum].partial;
-
+#ifdef BLOCK_REG_PADDING
+ int size = 0;
+#endif
+
/* Handle calls that pass values in multiple non-contiguous
locations. The PA64 has examples of this for library calls. */
if (reg != 0 && GET_CODE (reg) == PARALLEL)
emit_group_load (reg, val, NULL_TREE, GET_MODE_SIZE (mode));
else if (reg != 0 && partial == 0)
- emit_move_insn (reg, val);
+ {
+ emit_move_insn (reg, val);
+#ifdef BLOCK_REG_PADDING
+ size = GET_MODE_SIZE (argvec[argnum].mode);
+
+ /* Copied from load_register_parameters. */
+
+ /* Handle case where we have a value that needs shifting
+ up to the msb. eg. a QImode value and we're padding
+ upward on a BYTES_BIG_ENDIAN machine. */
+ if (size < UNITS_PER_WORD
+ && (argvec[argnum].locate.where_pad
+ == (BYTES_BIG_ENDIAN ? upward : downward)))
+ {
+ rtx x;
+ int shift = (UNITS_PER_WORD - size) * BITS_PER_UNIT;
+
+ /* Assigning REG here rather than a temp makes CALL_FUSAGE
+ report the whole reg as used. Strictly speaking, the
+ call only uses SIZE bytes at the msb end, but it doesn't
+ seem worth generating rtl to say that. */
+ reg = gen_rtx_REG (word_mode, REGNO (reg));
+ x = expand_shift (LSHIFT_EXPR, word_mode, reg, shift, reg, 1);
+ if (x != reg)
+ emit_move_insn (reg, x);
+ }
+#endif
+ }
NO_DEFER_POP;
}
valreg,
old_inhibit_defer_pop + 1, call_fusage, flags, args_so_far);
+ /* Right-shift returned value if necessary. */
+ if (!pcc_struct_value
+ && TYPE_MODE (tfom) != BLKmode
+ && targetm.calls.return_in_msb (tfom))
+ {
+ shift_return_value (TYPE_MODE (tfom), false, valreg);
+ valreg = gen_rtx_REG (TYPE_MODE (tfom), REGNO (valreg));
+ }
+
/* For calls to `setjmp', etc., inform function.c:setjmp_warnings
that it should complain if nonvolatile values are live. For
functions that cannot return, inform flow that control does not
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