+2008-06-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/36506
+ * omp-low.c (expand_omp_sections): Handle #pragma omp sections with
+ reductions.
+
+2008-06-12 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/36345
+ * tree-flow.h (struct ptr_info_def): Align escape_mask,
+ add memory_tag_needed flag.
+ (may_alias_p): Declare.
+ * tree-ssa-alias.c (may_alias_p): Export.
+ (set_initial_properties): Use memory_tag_needed flag.
+ (update_reference_counts): Likewise.
+ (reset_alias_info): Reset memory_tag_needed flag.
+ (create_name_tags): Check memory_tag_needed flag.
+ (dump_points_to_info_for): Dump it.
+ * tree-ssa-structalias.c (struct variable_info): Remove
+ directly_dereferenced flag.
+ (new_var_info): Do not initialize it.
+ (process_constraint_1): Do not set it.
+ (update_alias_info): Set is_dereferenced flag.
+ (set_uids_in_ptset): Use may_alias_p.
+ (set_used_smts): Check memory_tag_needed flag.
+ (find_what_p_points_to): Likewise. Pass is_dereferenced flag.
+ * tree-ssa-alias.c (verify_flow_sensitive_alias_info): Check
+ memory_tag_needed flag.
+ * tree-ssa-alias-warnings.c (dsa_named_for): Try to recover
+ from broken design.
+
+2008-06-12 Kai Tietz <kai.tietz@onevision.com>
+
+ * config/i386/i386.c (ix86_compute_frame_layout): Disable red zone for
+ w64 abi.
+ (ix86_expand_prologue): Likewise.
+ (ix86_force_to_memory): Likewise.
+ (ix86_free_from_memory): Likewise.
+
+2008-06-11 Edmar Wienskoski <edmar@freescale.com>
+
+ PR target/36425
+ * config/rs6000/rs6000.c (rs6000_override_options): Set
+ rs6000_isel conditionally to the absence of comand line
+ override.
+ * config/rs6000/linuxspe.h (SUBSUBTARGET_OVERRIDE_OPTIONS):
+ Remove duplicate rs6000_isel setting.
+ * config/rs6000/eabispe.h: Ditto.
+
+2008-06-11 Richard Guenther <rguenther@suse.de>
+
+ * alias.c (get_alias_set): Use the element alias-set for arrays.
+ (record_component_aliases): For arrays and vectors do nothing.
+ * c-common.c (strict_aliasing_warning): Handle the cases
+ of alias set zero explicitly.
+ * Makefile.in (dfp.o-warn): Add -Wno-error.
+
+2008-06-11 Joseph Myers <joseph@codesourcery.com>
+
+ * config.gcc (all_defaults): Add arch_32 arch_64 cpu_32 cpu_64
+ tune_32 tune_64.
+ (i[34567]86-*-* | x86_64-*-*): Add arch_32 arch_64 cpu_32 cpu_64
+ tune_32 tune_64 to supported_defaults. Allow values not
+ supporting 64-bit mode for arch_32, cpu_32 and tune_32 for
+ x86_64. Do not override cpu_32 or cpu_64 values from target name.
+ (i[34567]86-*-linux*, i[34567]86-*-solaris2.1[0-9]*): Only default
+ with_cpu_64 to generic for 64-bit-supporting configurations, not
+ with_cpu. Remove FIXMEs.
+ * doc/install.texi (--with-cpu-32, --with-cpu-64, --with-arch-32,
+ --with-arch-64, --with-tune-32, --with-tune-64): Document.
+ * config/i386/i386.h (OPT_ARCH32, OPT_ARCH64): Define.
+ (OPTION_DEFAULT_SPECS): Add tune_32, tune_64, cpu_32, cpu_64,
+ arch_32 and arch_64.
+
+2008-06-11 Eric Botcazou <ebotcazou@adacore.com>
+ Olivier Hainque <hainque@adacore.com>
+
+ * builtins.c (get_memory_rtx): Accept byte-addressable bitfields.
+ Use DECL_SIZE_UNIT to retrieve the size of the field.
+
+2008-06-11 Joseph Myers <joseph@codesourcery.com>
+
+ * config/arm/arm.c (arm_init_neon_builtins): Move initialization
+ with function calls after declarations. Lay out
+ neon_float_type_node before further use.
+
+2008-06-11 Richard Guenther <rguenther@suse.de>
+
+ * tree-flow.h (may_point_to_global_var): Declare.
+ * tree-ssa-alias.c (may_point_to_global_var): New function.
+ * tree-ssa-sink.c (is_hidden_global_store): Use it.
+
+2008-06-10 Kazu Hirata <kazu@codesourcery.com>
+
+ * configure.ac: Teach that fido supports .debug_line.
+ * configure: Regenerate.
+
+2008-06-10 Tom Tromey <tromey@redhat.com>
+
+ * c-lex.c (fe_file_change): Pass SOURCE_LINE to start_source_file
+ debug hook.
+
+2008-06-10 Joseph Myers <joseph@codesourcery.com>
+
+ * dfp.c (WORDS_BIGENDIAN): Define to 0 if not defined.
+ (encode_decimal64, decode_decimal64, encode_decimal128,
+ decode_decimal128): Reverse order of 32-bit parts of value if host
+ and target endianness differ.
+
+2008-06-10 Vinodha Ramasamy <vinodha@google.com>
+ * value_prob.c (tree_divmod_fixed_value_transform): Use gcov_type.
+ Avoid division by 0.
+ (tree_mod_pow2_value_transform): Likewise.
+ (tree_ic_transform): Likewise.
+ (tree_stringops_transform): Likewise.
+ (tree_mod_subtract_transform): Likewise.
+ * tree-inline-c (copy_bb): Corrected int type to gcov_type.
+ (copy_edges_for_bb): Likewise.
+ (initialize_cfun): Likewise.
+
+2008-06-10 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*btdi_rex64): Change operand 1 predicate to
+ nonmemory_operand. Add "N" operand constraint.
+ (*btsi): Ditto.
+ (*jcc_btdi_mask_rex64): New instruction and split pattern.
+ (*jcc_btsi_mask): Ditto.
+ (*jcc_btsi_mask_1): Ditto.
+
+2008-06-10 Joseph Myers <joseph@codesourcery.com>
+
+ * config/rs6000/rs6000.c (build_opaque_vector_type): Set
+ TYPE_CANONICAL for copied element type.
+
+2008-06-10 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/36473
+ * config/i386/i386.c (ix86_tune_features) [TUNE_USE_BT]:
+ Add m_CORE2 and m_GENERIC.
+ * config/i386/predicates.md (bt_comparison_operator): New predicate.
+ * config/i386/i386.md (*btdi_rex64): New instruction pattern.
+ (*btsi): Ditto.
+ (*jcc_btdi_rex64): New instruction and split pattern.
+ (*jcc_btsi): Ditto.
+ (*jcc_btsi_1): Ditto.
+ (*btsq): Fix Intel asm dialect operand order.
+ (*btrq): Ditto.
+ (*btcq): Ditto.
+
+2008-06-09 Andy Hutchinson <hutchinsonandy@aim.com>
+
+ PR middle-end/36447
+ * simplify-rtx.c (simplify_subreg): Add check for shift count
+ greater than size.
+
+2008-06-09 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * doc/md.texi: Synchronize with later constraints.md change.
+ * longlong.h (umul_ppmm): Replace the MIPS asm implementation
+ with a C implementation.
+ * config/mips/mips.c (mips_legitimize_move): Remove MFHI and
+ MFLO handling.
+ (mips_subword): Assume TImode for CONST_INTs if TARGET_64BIT.
+ (mips_split_doubleword_move): Use special MTHI and MFHI instructions
+ when moving to and from MD_REGNUM.
+ (mips_output_move): Don't handle moves from GPRs to HI_REGNUM.
+ Handle moves from LO_REGNUM to GPRs using MFLO, MACC or DMACC.
+ Handle byte and halfword moves.
+ (mips_hard_regno_mode_ok_p): Handle MD_REGS and DSP_ACC_REGS
+ separately.
+ * config/mips/constraints.md (h): Turn into NO_REGS.
+ (l, x): Update documentation.
+ * config/mips/mips.md (UNSPEC_MFHILO): Delete.
+ (UNSPEC_MFHI, UNSPEC_MTHI, UNSPEC_SET_HILO): New.
+ (UNSPEC_TLS_LDM, UNSPEC_TLS_GET_TP): Renumber.
+ (HILO): New mode iterator.
+ (MOVE128): Add TI.
+ (any_div): New code iterator.
+ (u): Extend code attribute to div and udiv.
+ (*add<mode>3_mips16, *movdi_64bit_mips16, *movsi_mips16): Use
+ d_operand in the splitters. Remove redundant CONST_INT checks.
+ (mulsi3_mult3, mul<mode>3_internal, mul<mode>3_r4000, *mul_acc_si)
+ (*macc, *msac, *msac_using_macc, *macc2, *msac2, *mul_sub_si)
+ (*muls): Remove "=h" clobbers. Adjust peephole2s and define_splits
+ accordingly, using normal moves instead of unspecs to move LO into
+ a GPR. Use d_operand and lo_operand instead of *_REG_P checks.
+ (<u>mulsidi3): Handle expansion in C code.
+ (<u>mulsidi3_32bit_internal): Rename to...
+ (<u>mulsidi3_32bit): ...this.
+ (<u>mulsidi3_32bit_r4000): Fix insn separator.
+ (*<u>mulsidi3_64bit): Rename to...
+ (<u>mulsidi3_64bit): ...this. Combine DImode "=h" and "=l" clobbers
+ into a TImode "=x" clobber. In the split, use an UNSPEC_SET_HILO
+ to set LO and HI to the multiplication result. Use a normal move
+ for MFLO and an unspec for MFHI.
+ (*<u>mulsidi3_64bit_parts): Replace with...
+ (<u>mulsidi3_64bit_hilo): ...this new instruction.
+ (<su>mulsi3_highpart): Extend to TARGET_FIX_R4000.
+ (<su>mulsi3_highpart_internal): Turn into a define_insn_and_split
+ and extend it to TARGET_FIX_R4000. Store the destination in a GPR
+ instead of HI. Split the instruction into a separate multiplication
+ and MFHI if !TARGET_FIX_R4000.
+ (<su>muldi3_highpart): Likewise.
+ (<su>mulsi3_highpart_mulhi_internal): Remove the first alternative
+ and the "=h" clobber.
+ (*<su>mulsi3_highpart_neg_mulhi_internal): Likewise.
+ (<u>mulditi3): New expander.
+ (<u>mulditi3_internal, <u>mulditi3_r4000): New patterns.
+ (madsi): Remove "=h" clobber.
+ (divmod<mode>4, udivmod<mode>4): Turn into define_insn_and_splits.
+ Force the modulus result to be a GPR and split the instruction into
+ a division followed by an MFHI after reload.
+ (<u>divmod<GPR:mode>4_hilo_<HILO:mode>): New instruction.
+ (*lea_high64): Use d_operand in the define_peephole2. Likewise
+ the MIPS16 HIGH define_split.
+ (*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16): Change type
+ of acc<->gpr moves to "multi".
+ (*movdi_64bit): Replace the single "x" alternative with
+ alternatives for moving into and out of "a".
+ (*movhi_internal, *movqi_internal): Likewise. Use mips_output_move.
+ (*movsi_internal): Extend the "d<-A" alternative to "d<-a".
+ (*movdi_64bit_mips16, *movsi_mips16): Add d<-a alternatives.
+ Use d_operand in the splitters. Remove redundant CONST_INT checks.
+ (*movhi_mips16, *movqi_mips16): Likewise. Use mips_output_move.
+ (movti): New expander.
+ (*movti, *movti_mips16): New insns.
+ (mfhilo_<mode>, *mfhilo_<mode>, *mfhilo_<mode>_macc): Delete.
+ (mfhi<GPR:mode>_<HILO:mode>): New pattern.
+ (mthi<GPR:mode>_<HILO:mode>): Likewise.
+ * config/mips/predicates.md (fpr_operand): Delete.
+ (d_operand): New predicate.
+
+2008-06-09 Michael Meissner <michael.meissner@amd.com>
+
+ * config.gcc (i[34567]86-*-*): Put test in quotes to prevent
+ failure on some Bourne shells.
+ (x86_64-*-*): Ditto.
+
2008-06-09 Kai Tietz <kai.tietz@onevision.com>
* config/i386/cygming.h (TARGET_SUBTARGET64_DEFAULT): New.