+2010-08-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/linux.h (TARGET_HAS_SINCOS): Replace | with ||.
+
+2010-08-30 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45449
+ * tree-ssa-live.c (remove_unused_locals): Also remove address-taken
+ variables.
+
+2010-08-30 Joseph Myers <joseph@codesourcery.com>
+
+ * opts.h (CL_ERR_NEGATIVE): Define.
+ * opts.c (unknown_option_callback): Don't postpone warnings for
+ options marked with CL_ERR_NEGATIVE.
+ * opts-common.c (decode_cmdline_option): Set CL_ERR_NEGATIVE error
+ for negative versions of CL_REJECT_NEGATIVE options.
+
+2010-08-30 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (zero_extendsidi2_1): Rename from
+ zero_extendsidi2_32.
+ (zero_extend<mode>di2): Macroize insn from zero_extend{qi,hi}di2
+ using SWI12 mode iterator.
+ (zero_extendhisi2_and): Merge insn pattern and corresponding spliter
+ to define_insn_and_split pattern.
+ (zero_extendqi<mode>2): Macroize expander from zero_extendqi{hi,si}2
+ using SWI24 mode iterator.
+ (*zero_extendqi<mode>2_and): Macroize insn from
+ *zero_extendqi{hi,si}2_and using SWI24 mode iterator.
+ (*zero_extendqi<mode>2_movzbl_and): Macroize insn from
+ *zero_extendqihi2_movzbw_and and *zero_extendqisi2_movzbl_and using
+ SWI24 mode iterator.
+ (*zero_extendqi<mode>2_movzbl): Ditto from
+ *zero_extendqi{hi,si}2_movzbl.
+ (extendsidi2_1): Rename from extendsidi2_32.
+ (extend<mode>di2): Macroize insn from extend{qi,hi}di2 using
+ SWI12 mode iterator.
+
+2010-08-29 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/ia64/ia64.h (HARD_REGNO_NREGS): Return 1 for CCImode in
+ general purpose registers.
+ (HARD_REGNO_MODE_OK): Accept CCImode in general purpose registers.
+ * config/ia64/ia64.md (*movcci): Change to named pattern. Deal
+ with general purpose registers and memory operands. Add associated
+ CCImode post-reload splitter.
+ * config/ia64/div.md: Change BImode to CCImode throughout.
+
+2010-08-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/ia64/ia64.md (cstorebi4): Fix thinko.
+
+2010-08-28 Hariharan Sandanagobalane <hariharan@picochip.com>
+
+ * config/picochip/picochip.c (reorder_var_tracking_notes): This
+ function was dropping debug insns which caused PR45299.
+
+2010-08-28 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (extsuffix): New code attribute.
+ (sse4_1_<code>v8qiv8hi2): Macroize insn from sse4_1_extendv8qiv8hi2
+ and sse4_1_zero_extendv8qiv8hi2 using any_extend code iterator.
+ (sse4_1_<code>v4qiv4si2): Ditto from sse4_1_extendv4qiv4si2
+ and sse4_1_zero_extendv4qiv4si2.
+ (sse4_1_<code>v2qiv2di2): Ditto from sse4_1_extendv2qiv2di2
+ and sse4_1_zero_extendv2qiv2di2.
+ (sse4_1_<code>v4hiv4si2): Ditto from sse4_1_extendv4hiv4si2
+ and sse4_1_zero_extendv4hiv4si2.
+ (sse4_1_<code>v2hiv2di2): Ditto from sse4_1_extendv2hiv2di2
+ and sse4_1_zero_extendv2hiv2di2.
+ (sse4_1_extendv2siv2di2): Ditto from sse4_1_extendv2siv2di2
+ and sse4_1_zero_extendv2siv2di2
+
+ (<s>mulv8hi3_highpart): Macroize expander from {u,s}mulv8hi3_highpart
+ using any_extend code iterator.
+ (*avx_<s>mulv8hi3_highpart): Macroize insn from
+ *avx_{u,s}mulv8hi3_highpart using any_extend code iterator.
+ (*<s>mulv8hi3_highpart): Ditto from *{u,s}mulv8hi3_highpart.
+
+ * config/i386/i386.c (ix86_expand_sse4_unpack): Update for renamed
+ gen_sse4_1_sign_extend* functions.
+ (struct builtin_description bdesc_args): Ditto.
+
+2010-08-27 Xinliang David Li <davidxl@google.com>
+
+ PR/45422
+ * tree-ssa-loop-ivopts.c (iv_ca_get_num_inv_exprs): Remove.
+ (iv_ca_set_no_cp): Update used inv expr count.
+ (iv_ca_set_cp): Ditto.
+ (iv_ca_new): Initialize new member.
+ (iv_ca_free): Free memory.
+
+2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
+
+ * config/sh/sh-protos.h (sh_function_arg): Delete.
+ (sh_function_arg_advance): Delete.
+ * config/sh/sh.h (FUNCTION_ARG, FUNCTION_ARG_ADVANCE): Delete.
+ (PASS_IN_REG_P): Eliminate cast.
+ * config/sh/sh.c (sh_function_arg_advance): Make static. Take a
+ const_tree and a bool.
+ (sh_function_arg): Likewise.
+ (sh_output_mi_thunk): Call sh_function_arg_advance) and
+ sh_function_arg.
+ (TARGET_FUNCTION_ARG, TARGET_FUNCTION_ARG_ADVANCE): Define.
+
+2010-08-27 Naveen H.S <naveen.S@kpitcummins.com>
+ Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/sh/sh.c (push_regs): Emit movml for interrupt handler
+ when possible.
+ (sh_expand_epilogue): Likewise.
+ * config/sh/sh.md (movml_push_banked): New insn.
+ (movml_pop_banked): Likewise.
+
+2010-08-28 Bernd Schmidt <bernds@codesourcery.com>
+
+ * genautomata.c (gen_regexp_repeat, gen_regexp_allof,
+ gen_regexp_oneof, gen_regexp_sequence): Use the string found
+ in vector element 0 rather than the original string when there's
+ only one element.
+ (gen_regexp): Remove extra semicolon.
+
+ * config/arm/vfp.md (arm_movsi_vfp, thumb2_movsi_vfp, movsf_vfp,
+ thumb2_movsf_vfp): Set attribute "insn".
+ * config/arm/arm.md (arm_ashrdi3_1bit, arm_lshrdi3_1bit, not_shiftsi,
+ not_shiftsi_compare0, not_shiftsi_compare0_scratch, arm_one_cmplsi2,
+ thumb1_one_cmplsi2, notsi_compare0, notsi_compare0_scratch,
+ arm_zero_extendsidi2, arm_extendsidi2, thumb1_movdi_insn,
+ arm_movsi_insn, movhi_insn_arch4, movhi_bytes, arm_movqi_insn,
+ thumb1_movqi_insn arm32_movhf, thumb1_movhf, arm_movsf_soft_insn,
+ thumb1_movsf_insn, thumb_movdf_insn, mov_scc, mov_negscc, mov_notscc,
+ movsicc_insn, movsfcc_soft_insn, and_scc, cond_move, if_move_not,
+ if_not_move, if_shift_move, if_move_shift, if_shift_shift,
+ if_not_arith, if_arith_not, cond_move_not): Likewise.
+
2010-08-23 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_address_for_fpconvert):
2010-08-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.md (enabled): Test the value of arch_enabled
- rather than just using it.
+ rather than just using it.
2010-08-27 Olivier Hainque <hainque@adacore.com>
- Eric Botcazou <ebotcazou@adacore.com>
+ Eric Botcazou <ebotcazou@adacore.com>
* dse.c (group_info.base_mem, get_group_info): Use BLKmode to
cover all the possible offsets from this base.