+2010-08-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/linux.h (TARGET_HAS_SINCOS): Replace | with ||.
+
+2010-08-30 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45449
+ * tree-ssa-live.c (remove_unused_locals): Also remove address-taken
+ variables.
+
+2010-08-30 Joseph Myers <joseph@codesourcery.com>
+
+ * opts.h (CL_ERR_NEGATIVE): Define.
+ * opts.c (unknown_option_callback): Don't postpone warnings for
+ options marked with CL_ERR_NEGATIVE.
+ * opts-common.c (decode_cmdline_option): Set CL_ERR_NEGATIVE error
+ for negative versions of CL_REJECT_NEGATIVE options.
+
+2010-08-30 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (zero_extendsidi2_1): Rename from
+ zero_extendsidi2_32.
+ (zero_extend<mode>di2): Macroize insn from zero_extend{qi,hi}di2
+ using SWI12 mode iterator.
+ (zero_extendhisi2_and): Merge insn pattern and corresponding spliter
+ to define_insn_and_split pattern.
+ (zero_extendqi<mode>2): Macroize expander from zero_extendqi{hi,si}2
+ using SWI24 mode iterator.
+ (*zero_extendqi<mode>2_and): Macroize insn from
+ *zero_extendqi{hi,si}2_and using SWI24 mode iterator.
+ (*zero_extendqi<mode>2_movzbl_and): Macroize insn from
+ *zero_extendqihi2_movzbw_and and *zero_extendqisi2_movzbl_and using
+ SWI24 mode iterator.
+ (*zero_extendqi<mode>2_movzbl): Ditto from
+ *zero_extendqi{hi,si}2_movzbl.
+ (extendsidi2_1): Rename from extendsidi2_32.
+ (extend<mode>di2): Macroize insn from extend{qi,hi}di2 using
+ SWI12 mode iterator.
+
+2010-08-29 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/ia64/ia64.h (HARD_REGNO_NREGS): Return 1 for CCImode in
+ general purpose registers.
+ (HARD_REGNO_MODE_OK): Accept CCImode in general purpose registers.
+ * config/ia64/ia64.md (*movcci): Change to named pattern. Deal
+ with general purpose registers and memory operands. Add associated
+ CCImode post-reload splitter.
+ * config/ia64/div.md: Change BImode to CCImode throughout.
+
+2010-08-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/ia64/ia64.md (cstorebi4): Fix thinko.
+
+2010-08-28 Hariharan Sandanagobalane <hariharan@picochip.com>
+
+ * config/picochip/picochip.c (reorder_var_tracking_notes): This
+ function was dropping debug insns which caused PR45299.
+
+2010-08-28 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (extsuffix): New code attribute.
+ (sse4_1_<code>v8qiv8hi2): Macroize insn from sse4_1_extendv8qiv8hi2
+ and sse4_1_zero_extendv8qiv8hi2 using any_extend code iterator.
+ (sse4_1_<code>v4qiv4si2): Ditto from sse4_1_extendv4qiv4si2
+ and sse4_1_zero_extendv4qiv4si2.
+ (sse4_1_<code>v2qiv2di2): Ditto from sse4_1_extendv2qiv2di2
+ and sse4_1_zero_extendv2qiv2di2.
+ (sse4_1_<code>v4hiv4si2): Ditto from sse4_1_extendv4hiv4si2
+ and sse4_1_zero_extendv4hiv4si2.
+ (sse4_1_<code>v2hiv2di2): Ditto from sse4_1_extendv2hiv2di2
+ and sse4_1_zero_extendv2hiv2di2.
+ (sse4_1_extendv2siv2di2): Ditto from sse4_1_extendv2siv2di2
+ and sse4_1_zero_extendv2siv2di2
+
+ (<s>mulv8hi3_highpart): Macroize expander from {u,s}mulv8hi3_highpart
+ using any_extend code iterator.
+ (*avx_<s>mulv8hi3_highpart): Macroize insn from
+ *avx_{u,s}mulv8hi3_highpart using any_extend code iterator.
+ (*<s>mulv8hi3_highpart): Ditto from *{u,s}mulv8hi3_highpart.
+
+ * config/i386/i386.c (ix86_expand_sse4_unpack): Update for renamed
+ gen_sse4_1_sign_extend* functions.
+ (struct builtin_description bdesc_args): Ditto.
+
+2010-08-27 Xinliang David Li <davidxl@google.com>
+
+ PR/45422
+ * tree-ssa-loop-ivopts.c (iv_ca_get_num_inv_exprs): Remove.
+ (iv_ca_set_no_cp): Update used inv expr count.
+ (iv_ca_set_cp): Ditto.
+ (iv_ca_new): Initialize new member.
+ (iv_ca_free): Free memory.
+
+2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
+
+ * config/sh/sh-protos.h (sh_function_arg): Delete.
+ (sh_function_arg_advance): Delete.
+ * config/sh/sh.h (FUNCTION_ARG, FUNCTION_ARG_ADVANCE): Delete.
+ (PASS_IN_REG_P): Eliminate cast.
+ * config/sh/sh.c (sh_function_arg_advance): Make static. Take a
+ const_tree and a bool.
+ (sh_function_arg): Likewise.
+ (sh_output_mi_thunk): Call sh_function_arg_advance) and
+ sh_function_arg.
+ (TARGET_FUNCTION_ARG, TARGET_FUNCTION_ARG_ADVANCE): Define.
+
+2010-08-27 Naveen H.S <naveen.S@kpitcummins.com>
+ Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/sh/sh.c (push_regs): Emit movml for interrupt handler
+ when possible.
+ (sh_expand_epilogue): Likewise.
+ * config/sh/sh.md (movml_push_banked): New insn.
+ (movml_pop_banked): Likewise.
+
+2010-08-28 Bernd Schmidt <bernds@codesourcery.com>
+
+ * genautomata.c (gen_regexp_repeat, gen_regexp_allof,
+ gen_regexp_oneof, gen_regexp_sequence): Use the string found
+ in vector element 0 rather than the original string when there's
+ only one element.
+ (gen_regexp): Remove extra semicolon.
+
+ * config/arm/vfp.md (arm_movsi_vfp, thumb2_movsi_vfp, movsf_vfp,
+ thumb2_movsf_vfp): Set attribute "insn".
+ * config/arm/arm.md (arm_ashrdi3_1bit, arm_lshrdi3_1bit, not_shiftsi,
+ not_shiftsi_compare0, not_shiftsi_compare0_scratch, arm_one_cmplsi2,
+ thumb1_one_cmplsi2, notsi_compare0, notsi_compare0_scratch,
+ arm_zero_extendsidi2, arm_extendsidi2, thumb1_movdi_insn,
+ arm_movsi_insn, movhi_insn_arch4, movhi_bytes, arm_movqi_insn,
+ thumb1_movqi_insn arm32_movhf, thumb1_movhf, arm_movsf_soft_insn,
+ thumb1_movsf_insn, thumb_movdf_insn, mov_scc, mov_negscc, mov_notscc,
+ movsicc_insn, movsfcc_soft_insn, and_scc, cond_move, if_move_not,
+ if_not_move, if_shift_move, if_move_shift, if_shift_shift,
+ if_not_arith, if_arith_not, cond_move_not): Likewise.
+
+2010-08-23 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000-protos.h (rs6000_address_for_fpconvert):
+ New declaration.
+ (rs6000_allocate_stack_temp): Ditto.
+ (rs6000_expand_convert_si_to_sfdf): Ditto.
+
+ * config/rs6000/rs6000.c (rs6000_override_options): Adjust long
+ line. Update the options set if power6 or power7 server/embedded
+ type options are used. If we give a warning for no vsx under
+ -mcpu=power7 -mno-altivec, mark -mvsx as an explicit option.
+ (rs6000_allocate_stack_temp): New function to allocate a stack
+ tempoary and adjust the address so it meets either REG+OFFSET or
+ REG+REG addressing requirements.
+ (rs6000_address_for_fpconvert): Adjust REG+OFFSET addresses so
+ that they can be used with the LFIWAX/LFIWZX instrucitons.
+ (rs6000_expand_convert_si_to_sfdf): New helper funciton for
+ converting signed/unsigned SImode to either SFmode/DFmode.
+
+ * config/rs6000/rs6000.h (TARGET_FCFID): New macros to determine
+ whether certain instructions can be generated.
+ (TARGET_FCTIDZ): Ditto.
+ (TARGET_STFIWX): Ditto.
+ (TARGET_LFIWAX): Ditto.
+ (TARGET_LFIWZX): Ditto.
+ (TARGET_FCFIDS): Ditto.
+ (TARGET_FCFIDU): Ditto.
+ (TARGET_FCFIDUS): Ditto.
+ (TARGET_FCTIDUZ): Ditto.
+ (TARGET_FCTIWUZ): Ditto.
+
+ * config/rs6000/rs6000.md (UNSPEC_FCTIW): New unspec constants.
+ (UNSPEC_FCTID): Ditto.
+ (UNSPEC_LFIWAX): Ditto.
+ (UNSPEC_LFIWZX): Ditto.
+ (UNSPEC_FCTIWUZ): Ditto.
+ (rreg): Use correct constraints.
+ (SI_CONVERT_FP): New mode attribute for floating point conversion
+ tests.
+ (E500_CONVERT): Ditto.
+ (lfiwax): New insns for converting from integer to floating point
+ utilizing newer instructions. Attempt to optimize conversions
+ that come from memory so that we don't load the value into a GPR,
+ spill it to the stack and reload it into a FPR.
+ (floatsi<mode>2_lfiwax): Ditto.
+ (floatsi<mode>2_lfiwax_mem): Ditto.
+ (floatsi<mode>2_lfiwax_mem2): Ditto.
+ (lfiwzx): Ditto.
+ (floatunssi<mode>2_lfiwzx): Ditto.
+ (floatunssi<mode>2_lfiwzx_mem): Ditto.
+ (floatunssi<mode>2_lfiwzx_mem2): Ditto.
+ (floatdidf2_mem): Ditto.
+ (floatunsdidf2_fcfidu): Ditto.
+ (floatunsdidf2_mem): Ditto.
+ (floatunsdisf2): Ditto.
+ (floatunsdisf2_fcfidus): Ditto.
+ (floatunsdisf2_mem): Ditto.
+ (floatsidf2): Add support for LFIWAX/LFIWZX/FCFIDS/FCFIDU/FCFIDUS.
+ Use FCFID on 32-bit hosts that support it.
+ (floatsidf2_internal): Ditto.
+ (floatunssisf2): Ditto.
+ (floatunssidf2): Ditto.
+ (floatunssidf2_internal): Ditto.
+ (floatsisf2): Ditto.
+ (floatdidf2): Ditto.
+ (floatdidf2_fpr): Ditto.
+ (floatunsdidf2): Ditto.
+ (floatdisf2): Ditto.
+ (floatdisf2_fcfids): Ditto.
+ (floatdisf2_internal1): Ditto.
+ (fixuns_truncsfsi2): Delete, merge into common pattern for both
+ SF/DF. Add power7 support.
+ (fix_truncsfsi2): Ditto.
+ (fixuns_truncdfsi2): Ditto.
+ (fixuns_truncdfdi2): Ditto.
+ (fix_truncdfsi2): Ditto.
+ (fix_truncdfsi2_internal): Ditto.
+ (fix_truncdfsi2_internal_gfxopt): Ditto.
+ (fix_truncdfsi2_mfpgpr): Ditto.
+ (fctiwz): Ditto.
+ (btruncdf2): Ditto.
+ (btruncdf2_fpr): Ditto.
+ (btructsf2): Ditto.
+ (ceildf2): Ditto.
+ (ceildf2_fpr): Ditto.
+ (ceilsf2): Ditto.
+ (floordf2): Ditto.
+ (floordf2_fpr): Ditto.
+ (floorsf2): Ditto.
+ (rounddf2): Ditto.
+ (rounddf2_fpr): Ditto.
+ (roundsf2): Ditto.
+ (fix_trunc<mode>si2): Combine SF/DF conversion into one insn.
+ (fix_trunc<mode>di2): Ditto.
+ (fixuns_trunc<mode>si2): Ditto.
+ (fixuns_trunc<mode>di2): Ditto.
+ (fctiwz_<mode>): Ditto.
+ (btrunc<mode>2): Ditto.
+ (btrunc<mode>2_fpr): Ditto.
+ (ceil<mode>2): Ditto.
+ (ceil<mode>2_fpr): Ditto.
+ (floor<mode>2): Ditto.
+ (float<mode>2_fpr): Ditto.
+ (round<mode>2): Ditto.
+ (round<mode>2_fpr): Ditto.
+ (fix_trunc<mode>si2_stfiwx): New insn for machines with STFIWX.
+ (fixuns_trunc<mode>si2_stfiwx): Ditto.
+ (fix_truncdfsi2_internal): Ditto.
+ (fix_trunc<mode>si2_mem): Combiner pattern to eliminate storing
+ converted value on stack, loaded into GPR, and then stored into
+ the final destination.
+ (fix_trunc<mode>di2_fctidz): New pattern for targets supporting
+ FCTIDZ.
+ (lrint<mode>di2): New insn, provide the lrint builtin functions.
+ (ftruncdf2): Delete, unused.
+ (fix_trunctfsi2_internal): Use gen_fctiwz_df, not gen_fctiwz.
+
+ * config/rs6000/vsx.md (toplevel): Update copyright year.
+ (VSr2): Use "ws" contraint for DFmode, not "!r#r".
+ (VSr3): Ditto.
+
+2010-08-27 Basile Starynkevitch <basile@starynkevitch.net>
+ Jeremie Salvucci <jeremie.salvucci@free.fr>
+
+ * gengtype.c (output_type_enum): Test the right union member.
+
+2010-08-27 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/41484
+ * config/i386/sse.md (sse4_1_extendv8qiv8hi2): Also accept memory
+ operands for operand 1.
+ (sse4_1_extendv4qiv4si2): Ditto.
+ (sse4_1_extendv2qiv2di2): Ditto.
+ (sse4_1_extendv4hiv4si2): Ditto.
+ (sse4_1_extendv2hiv2di2): Ditto.
+ (sse4_1_extendv2siv2di2): Ditto.
+ (sse4_1_zero_extendv8qiv8hi2): Ditto.
+ (sse4_1_zero_extendv4qiv4si2): Ditto.
+ (sse4_1_zero_extendv2qiv2di2): Ditto.
+ (sse4_1_zero_extendv4hiv4si2): Ditto.
+ (sse4_1_zero_extendv2hiv2di2): Ditto.
+ (sse4_1_zero_extendv2siv2di2): Ditto.
+ (*sse4_1_extendv8qiv8hi2): Remove insn pattern.
+ (*sse4_1_extendv4qiv4si2): Ditto.
+ (*sse4_1_extendv2qiv2di2): Ditto.
+ (*sse4_1_extendv4hiv4si2): Ditto.
+ (*sse4_1_extendv2hiv2di2): Ditto.
+ (*sse4_1_extendv2siv2di2): Ditto.
+ (*sse4_1_zero_extendv8qiv8hi2): Ditto.
+ (*sse4_1_zero_extendv4qiv4si2): Ditto.
+ (*sse4_1_zero_extendv2qiv2di2): Ditto.
+ (*sse4_1_zero_extendv4hiv4si2): Ditto.
+ (*sse4_1_zero_extendv2hiv2di2): Ditto.
+ (*sse4_1_zero_extendv2siv2di2): Ditto.
+
+2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
+
+ * config/mips/mips-protos.h (mips_function_arg_advance): Delete
+ (mips_function_arg): Delete.
+ (mips_function_arg_boundary): Take a const_tree.
+ * config/mips/mips.c (mips_function_arg_boundary): Likewise.
+ (mips_arg_info): Likewise.
+ (mips_setup_incoming_varargs): Call mips_function_arg_advance
+ instead of FUNCTION_ARG_ADVANCE.
+ (mips_function_arg_advance): Adjust prototype. Make static.
+ (mips_function_arg): Likewise.
+ (TARGET_FUNCTION_ARG, TARGET_FUNCTION_ARG_ADVANCE): Define.
+ * config/mips/mips.h (FUNCTION_ARG_ADVANCE, FUNCTION_ARG): Delete.
+
+2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
+
+ * config/rs6000/rs6000.h (FUNCTION_ARG, FUNCTION_ARG_ADVANCE): Delete.
+ * config/rs6000/rs6000-protos.h (function_arg_advance): Delete.
+ (function_arg): Delete.
+ (function_arg_boundary): Take a const_tree.
+ * config/rs6000/rs6000.c (function_arg_boundary): Likewise.
+ (rs6000_spe_function_arg): Likewise.
+ (rs6000_parm_start): Likewise.
+ (rs6000_arg_size): Likewise.
+ (rs6000_darwin64_record_arg_advance_recurse): Likewise.
+ (rs6000_darwin64_record_arg): Likewise. Take a bool instead of an int.
+ (rs6000_mixed_function_arg): Likewise.
+ (function_arg): Rename to...
+ (rs6000_function_arg): ...this.
+ (function_arg_advance): Rename to...
+ (rs6000_function_arg_advance_1): ...this
+ (rs6000_function_arg_advance): New function. Call it.
+ (setup_incoming_varargs): Call rs6000_function_arg_advance_1.
+ (rs6000_return_in_memory): Adjust call to rs6000_darwin64_record_arg.
+ (rs6000_function_value): Likewise.
+ (TARGET_FUNCTION_ARG, TARGET_FUNCTION_ARG_ADVANCE): Define.
+
+2010-08-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/arm/arm.md (enabled): Test the value of arch_enabled
+ rather than just using it.
+
+2010-08-27 Olivier Hainque <hainque@adacore.com>
+ Eric Botcazou <ebotcazou@adacore.com>
+
+ * dse.c (group_info.base_mem, get_group_info): Use BLKmode to
+ cover all the possible offsets from this base.
+ (scan_reads_nospill): Pass base_mem's mode to canon_true_dependence.
+
+2010-08-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/44485
+ * calls.c (flags_from_decl_or_type): For const or pure
+ noreturn functions return ECF_LOOPING_CONST_OR_PURE|ECF_NORETURN
+ together with ECF_CONST resp. ECF_PURE.
+ * builtins.c (expand_builtin): Use flags_from_decl_or_type
+ instead of querying flags directly.
+ * tree-ssa-loop-niter.c (finite_loop_p): Likewise.
+ * tree-ssa-dce.c (find_obviously_necessary_stmts): Likewise.
+
+2010-08-26 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45255
+ * tree.c (decl_address_invariant_p): DECL_DLLIMPORT_P statics
+ and externals are also invariant.
+
+2010-08-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/44858
+ * combine.c (try_combine): If recog_for_combine added CLOBBERs to
+ newi2pat, make sure they don't affect newpat.
+
+ PR rtl-optimization/45400
+ * combine.c (simplify_shift_const_1) <case SUBREG>: Only use
+ SUBREG_REG if both modes are of MODE_INT class.
+
+2010-08-25 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm.c (arm_issue_rate): Return 2 for Cortex-A5.
+ * config/arm/arm.md (generic_sched): No for Cortex-A5.
+ (generic_vfp): Likewise.
+ (cortex-a5.md): Include.
+ * config/arm/cortex-a5.md: New.
+
+2010-08-25 Richard Guenther <rguenther@suse.de>
+
+ * alias.c (get_alias_set): Assign a single alias-set to all pointers.
+ * gimple.c (gimple_get_alias_set): Remove special handling
+ for pointers.
+
+2010-08-25 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR middle-end/45355
+ * combine.c (try_combine): Use reg_overlap_mentioned_p rather than
+ dead_or_set_p when computing i0_feeds_i2_n.
+
+ * combine.c (find_split_point): Undo canonicalization of multiply-add
+ to (minus x (mult)) when it seems likely that this will increase the
+ chances of a split.
+
+2010-08-25 Richard Guenther <rguenther@suse.de>
+
+ PR lto/44562
+ * lto-streamer.c (lto_record_common_node): Do not mess with
+ TYPE_CANONICAL when not in lto.
+ * gimple.c (gimple_register_type): Likewise.
+
+2010-08-25 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45316
+ * tree-ssa-pre.c (eliminate): Properly clean EH info.
+
+2010-08-25 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45393
+ * tree-ssa-math-opts.c (execute_cse_sincos_1): Properly transfer
+ and clean EH info. Avoid SSA update.
+ (execute_cse_sincos): Cleanup the CFG if it has changed.
+
+2010-08-25 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/45379
+ * emit-rtl.c (set_mem_attributes_minus_bitpos): Handle
+ TARGET_MEM_REF in alignment computation.
+
+2010-08-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/45059
+ * tree-ssa-reassoc.c (eliminate_redundant_comparison): Strip useless
+ type conversions from newop{1,2}. Assert t is a comparison and
+ newop{1,2} after the stripping are gimple vals.
+
+2010-08-25 Tejas Belagod <tejas.belagod@arm.com>
+
+ * config/arm/iterators.md (VU, SE, V_widen_l): New.
+ (V_unpack, US): New.
+ * config/arm/neon.md (vec_unpack<US>_hi_<mode>): Expansion for vmovl.
+ (vec_unpack<US>_lo_<mode>): Likewise.
+ (neon_vec_unpack<US>_hi_<mode>): Instruction pattern for vmovl.
+ (neon_vec_unpack<US>_lo_<mode>): Likewise.
+ (vec_widen_<US>mult_lo_<mode>): Expansion for vmull.
+ (vec_widen_<US>mult_hi_<mode>): Likewise.
+ (neon_vec_<US>mult_lo_<mode>"): Instruction pattern for vmull.
+ (neon_vec_<US>mult_hi_<mode>"): Likewise.
+ (neon_unpack<US>_<mode>): Widening move intermediate step for
+ vectorizing without -mvectorize-with-neon-quad.
+ (neon_vec_<US>mult_<mode>): Widening multiply intermediate step
+ for vectorizing without -mvectorize-with-neon-quad.
+ * config/arm/predicates.md (vect_par_constant_high): Check for
+ high-half lanes of a vector.
+ (vect_par_constant_low): Check for low-half lanes of a vector.
+
+2010-08-24 Sebastian Pop <sebastian.pop@amd.com>
+
+ * tree-if-conv.c (struct ifc_dr): New.
+ (IFC_DR): New.
+ (DR_WRITTEN_AT_LEAST_ONCE): New.
+ (DR_RW_UNCONDITIONALLY): New.
+ (memref_read_or_written_unconditionally): Use the cached values
+ when possible.
+ (write_memref_written_at_least_once): Same.
+ (if_convertible_loop_p): Initialize and free DR->aux fields.
+
+2010-08-24 Sebastian Pop <sebastian.pop@amd.com>
+
+ * gimple.c (gimple_could_trap_p_1): Not static anymore.
+ Pass an extra bool parameter include_mem.
+ (gimple_could_trap_p): Adjust call to gimple_could_trap_p_1.
+ (gimple_assign_rhs_could_trap_p): Same.
+ * gimple.h (gimple_could_trap_p_1): Declared.
+ * tree-data-ref.h (same_data_refs_base_objects): New.
+ (same_data_refs): New.
+ * tree-if-conv.c (memrefs_read_or_written_unconditionally): New.
+ (write_memrefs_written_at_least_once): New.
+ (ifcvt_memrefs_wont_trap): New.
+ (operations_could_trap): New.
+ (ifcvt_could_trap_p): New.
+ (if_convertible_gimple_assign_stmt_p): Call ifcvt_could_trap_p.
+ Gets a vector of data refs.
+ (if_convertible_stmt_p): Same.
+ (if_convertible_loop_p_1): New.
+ (if_convertible_loop_p): Call if_convertible_loop_p_1.
+
+2010-08-24 Sebastian Pop <sebastian.pop@amd.com>
+
+ * common.opt (ftree-loop-if-convert-stores): New flag.
+ * doc/invoke.texi (ftree-loop-if-convert-stores): Documented.
+ * tree-if-conv.c (ifc_temp_var): Pass an extra parameter GSI. Insert
+ the created statement before GSI.
+ (if_convertible_phi_p): Allow virtual phi nodes when
+ flag_loop_if_convert_stores is set.
+ (if_convertible_gimple_assign_stmt_p): Allow memory reads and writes
+ Do not handle types that do not match is_gimple_reg_type.
+ Remove loop and bb parameters. Call gimple_could_trap_p instead of
+ when flag_loop_if_convert_stores is set, as LHS can contain
+ memory refs.
+ (if_convertible_stmt_p): Remove loop and bb parameters. Update calls
+ to if_convertible_gimple_assign_stmt_p.
+ (if_convertible_loop_p): Update call to if_convertible_stmt_p.
+ (replace_phi_with_cond_gimple_assign_stmt): Renamed
+ predicate_scalar_phi. Do not handle virtual phi nodes.
+ (ifconvert_phi_nodes): Renamed predicate_all_scalar_phis.
+ Call predicate_scalar_phi.
+ (insert_gimplified_predicates): Insert the gimplified predicate of a BB
+ just after the labels for flag_loop_if_convert_stores, otherwise
+ insert the predicate in the end of the BB.
+ (predicate_mem_writes): New.
+ (combine_blocks): Call predicate_all_scalar_phis. When
+ flag_loop_if_convert_stores is set, call predicate_mem_writes.
+ (tree_if_conversion): Call mark_sym_for_renaming when
+ flag_loop_if_convert_stores is set.
+ (main_tree_if_conversion): Return TODO_update_ssa_only_virtuals when
+ flag_loop_if_convert_stores is set.
+
+2010-08-24 Anatoly Sokolov <aesok@post.ru>
+
+ * config/pa/pa.c (hppa_register_move_cost, pa_libcall_value,
+ pa_function_value_regno_p, pa_print_operand_punct_valid_p): New.
+ (pa_function_value): Make static.
+ (override_options): Rename to...
+ (pa_option_override): ...this. Make static.
+ (TARGET_PRINT_OPERAND_PUNCT_VALID_P, TARGET_REGISTER_MOVE_COST,
+ TARGET_LIBCALL_VALUE, TARGET_FUNCTION_VALUE_REGNO_P,
+ TARGET_OPTION_OVERRIDE): Define.
+ * config/pa/pa.h (OVERRIDE_OPTIONS, FUNCTION_VALUE_REGNO_P,
+ LIBCALL_VALUE, REGISTER_MOVE_COST, PRINT_OPERAND_PUNCT_VALID_P):
+ Remove.
+ * config/pa/pa-protos.h (override_options): Remove.
+
+2010-08-24 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/45379
+ * tree-ssa-address.c (create_mem_ref_raw): Drop to MEM_REF
+ if addr->index is NULL or zero.
+ * tree-ssa-alias.c (indirect_refs_may_alias_p): Handle
+ TARGET_MEM_REF more properly.
+ (indirect_ref_may_alias_decl_p): Likewise.
+ * emit-rtl.c (set_mem_attributes_minus_bitpos): Keep TARGET_MEM_REFs.
+ * alias.c (ao_ref_from_mem): Handle TARGET_MEM_REF more properly.
+
+2010-08-23 Anatoly Sokolov <aesok@post.ru>
+
+ * config/m32c/m32c.c (m32c_function_value_regno_p): Make static.
+ (m32c_override_options): Rename to...
+ (m32c_option_override): ...this. Make static.
+ (TARGET_FUNCTION_VALUE_REGNO_P, TARGET_OPTION_OVERRIDE): Define.
+ * config/m32c/m32c.h (OVERRIDE_OPTIONS, FUNCTION_VALUE_REGNO_P):
+ Remove.
+ * config/m32c/m32c-protos.h (m32c_override_options,
+ m32c_function_value_regno_p): Remove.
+
+2010-08-23 Changpeng Fang <changpeng.fang@amd.com>
+
+ * tree-ssa-loop-prefetch.c (gather_memory_references_ref) :
+ Fix a typo in a previous commit.
+
+2010-08-23 Kai Tietz <kai.tietz@onevision.com>
+
+ * tree-vect-loop.c (vect_get_single_scalar_iteraion_cost):
+ Pre-initialize innerloop_iters to one.
+
+2010-08-23 Changpeng Fang <changpeng.fang@amd.com>
+
+ * tree-flow.h (may_be_nonaddressable_p): New definition. Make the
+ existing static function global.
+
+ * tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): This function
+ is changed to global.
+
+ * tree-ssa-loop-prefetch.c (gather_memory_references_ref): Call
+ may_be_nonaddressable_p on base, and don't collect this reference
+ if the address of the base could not be taken.
+
+2010-08-23 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000.opt (-mveclibabi=mass): New option to
+ enable the compiler to autovectorize mathmetical functions for
+ power7 using the Mathematical Acceleration Subsystem library.
+
+ * config/rs6000/rs6000.c (rs6000_veclib_handler): New variable to
+ handle which vector math library we have.
+ (rs6000_override_options): Add -mveclibabi=mass support.
+ (rs6000_builtin_vectorized_libmass): New function to handle auto
+ vectorizing math functions that are in the MASS library.
+ (rs6000_builtin_vectorized_function): Call it.
+
+ * doc/invoke.texi (RS/6000 and PowerPC Options): Document
+ -mveclibabi=mass.
+
+2010-08-22 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR boehm-gc/34544
+ * gthr-posix.h (__gthread_active_init): Delete.
+ (__gthread_active_p): Do activity check here.
+ Don't include errno.h on hppa-hpux. Update comment.
+ * gthr-posix95.h (__gthread_active_init): Delete.
+ (__gthread_active_p): Do activity check here.
+ Don't include errno.h on hppa-hpux. Update comment.
+ * config.gcc (hppa[12]*-*-hpux11*): Define extra_parts.
+ * config/pa/pa64-hpux.h (LIB_SPEC): When -static is specified, only
+ add -lpthread when -mt or -pthread is specified.
+ * config/pa/pa-hpux11.h (LIB_SPEC): likewise.
+ (LINK_GCC_C_SEQUENCE_SPEC): Define.
+ * config/pa/t-pa-hpux11 (LIBGCCSTUB_OBJS): Define.
+ (stublib.c, pthread_default_stacksize_np-stub.o,
+ pthread_mutex_lock-stub.o, pthread_mutex_unlock-stub.o,
+ $(T)libgcc_stub.a): Add methods.
+ * config/pa/t-pa64 (LIBGCCSTUB_OBJS): Add pthread stubs.
+ (stublib.c, pthread_default_stacksize_np-stub.o,
+ pthread_mutex_lock-stub.o, pthread_mutex_unlock-stub.o): Add methods.
+ * config/pa/stublib.c (pthread_default_stacksize_np, pthread_mutex_lock,
+ pthread_mutex_unlock): New stubs.
+
+2010-08-22 Joseph Myers <joseph@codesourcery.com>
+
+ * Makefile.in (gccspec.o, cppspec.o): Update dependencies.
+ * common.opt (L, nodefaultlibs, nostdlib, pg, static): New
+ options.
+ * config/avr/avr.h (LIBSTDCXX): Remove initial "-l".
+ * config/freebsd.h (MATH_LIBRARY_PROFILE): Remove initial "-l".
+ * config/i386/djgpp.h (LIBSTDCXX): Remove initial "-l".
+ * config/rs6000/aix.h (LIBSTDCXX_STATIC): Remove initial "-l".
+ * config/s390/tpf.h (MATH_LIBRARY, LIBSTDCXX): Remove initial
+ "-l".
+ * cppspec.c: Include opts.h.
+ (lang_specific_driver): Use cl_decoded_option structures.
+ * doc/tm.texi.in (MATH_LIBRARY): Update documentation.
+ * doc/tm.texi: Regenerate.
+ * gcc.c (translate_options): Translate -d to -foutput-class-dir=.
+ (driver_handle_option): Allow driver options needing no special
+ processing.
+ (process_command): Decode options before call to
+ lang_specific_driver. Pass decoded options to
+ lang_specific_driver.
+ * gcc.h (lang_specific_driver): Update prototype.
+ * gccspec.c: Include opts.h.
+ (lang_specific_driver): Use cl_decoded_option structures.
+ * opts-common.c (option_ok_for_language, generate_option,
+ generate_option_input_file): New.
+ (decode_cmdline_option): Use option_ok_for_language.
+ (decode_cmdline_options_to_array): Use generate_option_input_file.
+ (handle_generated_option): Use generate_option.
+ * opts.h (generate_option, generate_option_input_file): Declare.
+
+2010-08-22 Anatoly Sokolov <aesok@post.ru>
+
+ * config/mips/mips.c (mips_override_options): Rename to...
+ (mips_option_override): ...this. Make static.
+ (TARGET_OPTION_OVERRIDE): Define.
+ (mips_in_small_data_p): Update comment.
+ * config/mips/mips.h (OVERRIDE_OPTIONS): Remove.
+ (FIXED_REGISTERS): Update comment.
+ * config/mips/mips-protos.h (mips_override_options): Remove.
+
+2010-08-21 Olivier Hainque <hainque@adacore.com>
+
+ * config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Define __PPC__.
+
+2010-08-21 Olivier Hainque <hainque@adacore.com>
+
+ * config/rs6000/vxworks.h (PREFERRED_STACK_BOUNDARY,
+ ABI_STACK_BOUNDARY): Ensure STACK_BOUNDARY is honored despite EABI.
+
+2010-08-20 Jan Hubicka <jh@suse.cz>
+
+ * tree-pass.h (pass_ipa_cdtor_merge): New function.
+ * cgraphunit.c (static_ctors, static_dtors): Move to ipa.c; make
+ heap allocated.
+ (record_cdtor_fn): Move to ipa.c; do not test for
+ have_ctors_dtors.
+ (build_cdtor): Move to ipa.c; add code avoiding construction
+ when target have ctors/dtors and there is only one ctor/dtor at given
+ priority.
+ (compare_ctor, compare_dtor): Move to ipa.c; use DECL_UID to stabilize
+ sort; reverse order of constructors.
+ (cgraph_build_cdtor_fns): Move to ipa.c; rename to build_cdtor_fns.
+ (cgraph_finalize_function): Do not call record_cdtor_fn.
+ (cgraph_finalize_compilation_unit): Do not call cgraph_build_cdtor_fns.
+ (cgraph_build_static_cdtor): Move to ipa.c.
+ * ipa.c: Include target.h and tree-iterator.h.
+ (cgraph_build_static_cdtor, static_ctors, static_dtors,
+ record_cdtor_fn, build_cdtor, compare_ctor, compare_dtor,
+ build_cdtor_fns, ipa_cdtor_merge, gate_ipa_cdtor_merge,
+ pass_ipa_cdtor_merge): New.
+ * passes.c (init_optimization_passes): Enqueue pass_ipa_cdtor_merge.
+ * ipa-prop.c (update_indirect_edges_after_inlining): Avoid out of
+ bounds access.
+
+2010-08-20 Jan Hubicka <jh@suse.cz>
+
+ PR c++/45307
+ PR c++/17736
+ * cgraph.h (cgraph_only_called_directly_p,
+ cgraph_can_remove_if_no_direct_calls_and_refs_p): Handle
+ static cdtors.
+ * cgraphunit.c (cgraph_decide_is_function_needed): Static cdtors
+ are not needed.
+ (cgraph_finalize_function): Static cdtors are reachable.
+ (cgraph_mark_functions_to_output): Use cgraph_only_called_directly_p.
+
+2010-08-20 Jan Hubicka <jh@suse.cz>
+
+ * lto-cgraph.c (lto_output_edge): Use gimple_has_body_p instead of
+ flag_wpa.
+ * lto-streamer-out.c (lto_output): Likewise.
+ * passes.c (ipa_write_optimization_summaries): Initialize statement
+ uids.
+
+2010-08-20 Olivier Hainque <hainque@adacore.com>
+
+ * tree.h (alias_diag_flags): New enum.
+ (alias_pair): Add an 'emitted_diags' field.
+ * varasm.c (finish_aliases_1): Honor and update p->emitted_diags.
+ (assemble_alias): Initialize emitted_diags of new pairs.
+
+2010-08-20 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/rs6000/aix.h (STACK_CHECK_STATIC_BUILTIN): Define to 1.
+ * config/rs6000/linux.h (STACK_CHECK_STATIC_BUILTIN): Likewise.
+ * config/rs6000/linux64.h (STACK_CHECK_STATIC_BUILTIN): Likewise.
+ (STACK_CHECK_PROTECT): Define.
+ * config/rs6000/rs6000.c (rs6000_emit_probe_stack_range): New function.
+ (output_probe_stack_range): Likewise.
+ (rs6000_emit_prologue): Invoke rs6000_emit_probe_stack_range if static
+ builtin stack checking is enabled.
+ * config/rs6000/rs6000-protos.h (output_probe_stack_range): Declare.
+ * config/rs6000/rs6000.md (UNSPECV_PROBE_STACK_RANGE): New constant.
+ (probe_stack_range): New insn.
+
+2010-08-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/45336
+ * config/i386/emmintrin.h (_mm_extract_epi16): Cast to unsigned
+ short first.
+
+ * config/i386/smmintrin.h (_mm_extract_epi8): Cast to unsigned
+ char first.
+
+2010-08-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/45336
+ * config/i386/sse.md (*sse4_1_pextrb): Add SWI48 mode iterator
+ to cover zero extension into 64-bit register.
+ (*sse2_pextrw): Likewise.
+ (*sse4_1_pextrd_zext): New insn.
+
+2010-08-20 Iain Sandoe <iains@gcc.gnu.org>
+
+ revert r163410, partially revert r163267.
+ * config/rs6000/darwin.h (LIB_SPEC): Remove.
+ * config/darwin.h (REAL_LIBGCC_SPEC): Link lgcc for all
+ Darwin versions.
+
+2010-08-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/44974
+ * builtins.c (expand_builtin): Don't optimize away
+ calls to DECL_LOOPING_CONST_OR_PURE_P builtins.
+
+2010-08-20 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (ashift %rsp splitter): Remove splitter.
+ (pro_epilogue_adjust_stack_di_2): Use "l" constraint for
+ alternative 1 of operand 2.
+
+2010-08-20 Jakub Jelinek <jakub@redhat.com>
+ Paolo Bonzini <bonzini@gnu.org>
+
+ * simplify-rtx.c (simplify_unary_operation_1): Optimize
+ (sign_extend (zero_extend (...)) and
+ ({sign,zero}_extend (lshiftrt (ashift X (const_int I)) (const_int I))).
+
+2010-08-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/45353
+ * sel-sched-ir.c (sel_bb_head): Return NULL even if next_nonnote_insn
+ after bb_note is a BARRIER.
+
2010-08-20 Iain Sandoe <iains@gcc.gnu.org>
- * config/rs6000/darwin.h (LIB_SPEC): New. Provide save/restFP by
+ * config/rs6000/darwin.h (LIB_SPEC): New. Provide saveFP/restFP by
linking libgcc.a.
-
+
2010-08-20 Jakub Jelinek <jakub@redhat.com>
Michael Matz <matz@suse.de>
- * tree-ssa-address.c (tree_mem_ref_addr): Convert offset to
- sizetype.
+ * tree-ssa-address.c (tree_mem_ref_addr): Convert offset to sizetype.
2010-08-20 Nathan Froyd <froydnj@codesourcery.com>
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