SMS: Minor misc fixes

[pf3gnuchains/gcc-fork.git] / gcc / ChangeLog

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 733d076..ea1635c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,81 @@
+2008-02-19  Revital Eres  <eres@il.ibm.com> 
+
+       * modulo-sched.c (sms_schedule): Change dump message when
+       create_ddg function fails.
+       (try_scheduling_node_in_cycle): Rename row to cycle.
+       (print_partial_schedule): Rename CYCLE to ROW.
+
+2008-02-19  Christian Bruel  <christian.bruel@st.com>
+            Zdenek Dvorak  <ook@ucw.cz>
+       
+        * tree-ssa-loop-ivopts.c (may_be_unaligned_p): Check step alignment.
+       
+2008-02-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33555
+       * config/i386/i386.md (*x86_movsicc_0_m1_se): New insn pattern.
+       (*x86_movdicc_0_m1_se): Ditto.
+
+2008-02-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sfp-machine.h (__gcc_CMPtype): New typedef.
+       (CMPtype): Define as __gcc_CMPtype.
+       * config/rs6000/sfp-machine.h (__gcc_CMPtype): New typedef.
+       (CMPtype): Define as __gcc_CMPtype.
+
+2008-02-19  Hans-Peter Nilsson  <hp@axis.com>
+
+       Support valgrind 3.3 for --enable-checking=valgrind.
+       * system.h: Consolidate ENABLE_VALGRIND_CHECKING-dependent defines
+       here.
+       [!VALGRIND_MAKE_MEM_NOACCESS]: Define as VALGRIND_MAKE_NOACCESS.
+       [!VALGRIND_MAKE_MEM_DEFINED]: Define as VALGRIND_MAKE_READABLE.
+       [!VALGRIND_MAKE_MEM_UNDEFINED]: Define as VALGRIND_MAKE_WRITABLE.
+       * ggc-common.c: Remove ENABLE_VALGRIND_CHECKING-dependent defines.
+       Replace use of VALGRIND_MAKE_READABLE, VALGRIND_MAKE_WRITABLE, and
+       VALGRIND_MAKE_NOACCESS with VALGRIND_MAKE_MEM_DEFINED,
+       VALGRIND_MAKE_MEM_UNDEFINED, and VALGRIND_MAKE_MEM_NOACCESS
+       respectively.
+       * ggc-zone.c: Similar.
+       * ggc-page.c: Similar.
+
+2008-02-19  Paul Brook  <paul@codesourcery.com>
+
+       PR target/35071
+       * config/arm/ieee754-df.S: Fix do_it typo.
+       * config/arm/ieee754-sf.S: Fix do_it typo.
+
+2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/35189
+       * config/i386/i386.c (OPTION_MASK_ISA_MMX_SET): New.
+       (OPTION_MASK_ISA_3DNOW_SET): Likewise.
+       (OPTION_MASK_ISA_SSE_SET): Likewise.
+       (OPTION_MASK_ISA_SSE2_SET): Likewise.
+       (OPTION_MASK_ISA_SSE3_SET): Likewise.
+       (OPTION_MASK_ISA_SSSE3_SET): Likewise.
+       (OPTION_MASK_ISA_SSE4_1_SET): Likewise.
+       (OPTION_MASK_ISA_SSE4_2_SET): Likewise.
+       (OPTION_MASK_ISA_SSE4_SET): Likewise.
+       (OPTION_MASK_ISA_SSE4A_SET): Likewise.
+       (OPTION_MASK_ISA_SSE5_SET): Likewise.
+       (OPTION_MASK_ISA_3DNOW_A_UNSET): Likewise.
+       (OPTION_MASK_ISA_MMX_UNSET): Updated.
+       (OPTION_MASK_ISA_3DNOW_UNSET): Updated.
+       (OPTION_MASK_ISA_SSE_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE3_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSSE3_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE4_1_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE4_2_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE4A_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE5_UNSET): Likewise.
+       (OPTION_MASK_ISA_SSE4): Removed.
+       (ix86_handle_option): Turn on bits in ix86_isa_flags and
+       ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for
+       -mXXX.
+       (override_options): Don't turn on implied SSE/MMX bits in
+       ix86_isa_flags.
+
 2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/i386/i386-modes.def: Use 4 byte alignment on DI for