+2011-06-03 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm-cores.def (strongarm, strongarm110, strongarm1100)
+ (strongarm1110): Use strongarm tuning.
+ * config/arm/arm-protos.h (tune_params): Add max_insns_skipped
+ field.
+ * config/arm/arm.c (arm_strongarm_tune): New.
+ (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune)
+ (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a5_tune)
+ (arm_cortex_a9_tune, arm_fa726te_tune): Add max_insns_skipped field
+ setting, using previous defaults or 1 for Cortex-A5.
+ (arm_option_override): Set max_insns_skipped from current tuning.
+
+2011-06-03 Nathan Sidwell <nathan@codesourcery.com>
+
+ * doc/install.texi (Options specification): Document --with-specs.
+
+2011-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ * config/arm/neon.md (orndi3_neon): Actually split it.
+
+2011-06-02 Alexandre Oliva <aoliva@redhat.com>
+
+ * params.def (PARAM_MAX_VARTRACK_EXPR_DEPTH): Bump default to 10.
+ * var-tracking.c (reverse_op): Limite recurse depth to 5.
+
+2011-06-02 Alexandre Oliva <aoliva@redhat.com>
+
+ PR debug/47590
+ * target.def (delay_sched2, delay_vartrack): New.
+ * doc/tm.texi.in: Update.
+ * doc/tm.texi: Rebuild.
+ * sched-rgn.c (gate_handle_sched2): Fail if delay_sched2.
+ * var-tracking.c (gate_handle_var_tracking): Likewise.
+ * config/bfin/bfin.c (bfin_flag_schedule_insns2): Drop.
+ (bfin_flag_var_tracking): Drop.
+ (output_file_start): Don't save and override flag_var_tracking.
+ (bfin_option_override): Ditto flag_schedule_insns_after_reload.
+ (bfin_reorg): Test original variables.
+ (TARGET_DELAY_SCHED2, TARGET_DELAY_VARTRACK): Define.
+ * config/ia64/ia64.c (ia64_flag_schedule_insns2): Drop.
+ (ia64_flag_var_tracking): Drop.
+ (TARGET_DELAY_SCHED2, TARGET_DELAY_VARTRACK): Define.
+ (ia64_file_start): Don't save and override flag_var_tracking.
+ (ia64_override_options_after_change): Ditto
+ flag_schedule_insns_after_reload.
+ (ia64_reorg): Test original variables.
+ * config/picochip/picochip.c (picochip_flag_schedule_insns2): Drop.
+ (picochip_flag_var_tracking): Drop.
+ (TARGET_DELAY_SCHED2, TARGET_DELAY_VARTRACK): Define.
+ (picochip_option_override): Don't save and override
+ flag_schedule_insns_after_reload.
+ (picochip_asm_file_start): Ditto flag_var_tracking.
+ (picochip_reorg): Test original variables.
+ * config/spu/spu.c (spu_flag_var_tracking): Drop.
+ (TARGET_DELAY_VARTRACK): Define.
+ (spu_var_tracking): New.
+ (spu_machine_dependent_reorg): Call it.
+ (asm_file_start): Don't save and override flag_var_tracking.
+
+2011-06-02 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/49163
+ * config/sh/predicates.md (general_movsrc_operand): Return 0
+ for memory and memory subreg of which address is an invalid
+ indexed address for QI and HImode.
+ (general_movdst_operand): Likewise.
+
+2011-06-02 Eric Botcazou <ebotcazou@adacore.com>
+
+ * cse.c (cse_find_path): Refine change to exclude EDGE_ABNORMAL_CALL
+ edges only, when there is a non-local label in the function.
+ * postreload-gcse.c (bb_has_well_behaved_predecessors): Likewise.
+
+2011-06-02 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/constraints.md (Y3): New register constraint.
+ * config/i386/sse.md (*vec_interleave_highv2df): Merge with
+ *sse3_interleave_highv2df and *sse2_interleave_highv2df.
+ (*vec_interleave_lowv2df): Merge with *sse3_interleave_lowv2df and
+ *sse2_interleave_lowv2df.
+
+2011-06-02 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm-cores.def (cortex-a5): Use cortex_a5 tuning.
+ * config/arm/arm.c (arm_cortex_a5_branch_cost): New.
+ (arm_cortex_a5_tune): New.
+
+2011-06-02 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm-protos.h (tune_params): Add branch_cost hook.
+ * config/arm/arm.c (arm_default_branch_cost): New.
+ (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune)
+ (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a9_tune)
+ (arm_fa726_tune): Set branch_cost field using
+ arm_default_branch_cost.
+ * config/arm/arm.h (BRANCH_COST): Use branch_cost hook from
+ current_tune structure.
+ * dojump.c (tm_p.h): Include file.
+
+2011-06-02 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2
+ tuning.
+ (cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
+ (cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
+ * config/arm/arm-protos.h (tune_params): Add prefer_constant_pool
+ field.
+ * config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune)
+ (arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune)
+ (arm_fa726te_tune): Add prefer_constant_pool setting.
+ (arm_v6t2_tune, arm_cortex_tune): New.
+ * config/arm/arm.h (TARGET_USE_MOVT): Make dependent on
+ prefer_constant_pool setting.
+
+2011-06-02 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (standard_sse_constant_p) <case 1>: Simplify
+ switch statement.
+ * config/i386/i386.md (*movdf_internal_rex64) <case 8,9,10>: Ditto.
+ (*movdf_internal) <case 6,7,8>: Ditto.
+
+ * config/i386/constraints.md (Y4): New register constraint.
+ * config/i386/sse.md (vec_set<mode>_0): Merge with
+ *vec_set<mode>_0_sse4_1 and *vec_set<mode>_0_sse2.
+ (*vec_extractv2di_1): Merge from *vec_extractv2di_1_sse2 and
+ *vec_extractv2di_1_sse.
+ (*vec_concatv2di_rex64): Merge from *vec_concatv2di_rex64_sse4_1
+ and *vec_concatv2di_rex64_sse.
+
+2011-06-02 Stuart Henderson <shenders@gcc.gnu.org>
+
+ PR target/48807
+ * config/bfin/bfin.c (bfin_function_ok_for_sibcall): Check return value
+ of cgraph_local_info for null before attempting to use it.
+
2011-06-02 Eric Botcazou <ebotcazou@adacore.com>
* function.h (struct stack_usage): Remove dynamic_alloc_count field.
(sigill_hdlr): New function.
(set_fast_math) [!__x86_64__ && __sun__ && __svr4__]: Check if SSE
insns can be executed.
- * config/sol2.h (ENDFILE_SPEC): Use crtfastmath.o if -ffast-math
- etc.
+ * config/sol2.h (ENDFILE_SPEC): Use crtfastmath.o if -ffast-math etc.
* config/sparc/sol2.h (ENDFILE_SPEC): Remove.
2011-06-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/t-slibgcc-darwin: Move to ...
- * config/t-slibgcc-dummy: .. this.
- Clarify comments.
+ * config/t-slibgcc-dummy: ... this. Clarify comments.
* config.gcc (i[34567]86-*-darwin*, x86_64-*-darwin*,
powerpc-*-darwin*, powerpc64-*-darwin*): Reflect this.
(i[3456x]86-*-netware*): Add t-slibgcc-dummy to tmake_file.
- (i[34567]86-*-rtems*): Remove extra_parts.
- Use i386/t-rtems.
+ (i[34567]86-*-rtems*): Remove extra_parts. Use i386/t-rtems.
Remove i386/t-crtstuff from tmake_file.
(i[34567]86-*-solaris2*): Remove t-svr4,
t-slibgcc-elf-ver, t-slibgcc-sld from tmake_file, add
2011-05-30 H.J. Lu <hongjiu.lu@intel.com>
PR target/49168
- * config/i386/i386.md (*movtf_internal): Handle misaligned
- load/store.
+ * config/i386/i386.md (*movtf_internal): Handle misaligned load/store.
2011-05-30 Jakub Jelinek <jakub@redhat.com>
OSDN Git Service
