+2011-10-05 Richard Henderson <rth@redhat.com>
+
+ * tree-vect-generic.c (vector_element): Never fail. Use
+ build_zero_cst. Tidy up type references.
+ (lower_vec_shuffle): Never fail. Mask shuffle indicies. Reduce
+ code duplication. Do update_stmt here ...
+ (expand_vector_operations_1): ... not here.
+
+ * config/i386/i386.c (ix86_expand_vshuffle): Never fail. Handle
+ TARGET_XOP. Fix pshufb constant vector creation. Reduce code
+ duplication. Handle V2DI without SSE4.1.
+ * config/i386/i386-protos.h (ix86_expand_vshuffle): Update decl.
+ * config/i386/i386.md (vshuffle<V_128>): Remove assert for ok.
+
+2011-10-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (distance_non_agu_define): Simplify calculation
+ of "found". Simplify return value calculation.
+ (distance_agu_use): Ditto.
+
+2011-10-05 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR bootstrap/50621
+ * config/i386/i386.c (ix86_add_cfa_restore_note): Omit notes only
+ if the function was not shrink-wrapped.
+ (ix86_expand_epilogue): Ensure queued cfa_adjust notes are attached
+ to an insn.
+ * function.c (thread_prologue_and_epilogue_insns): Make sure the
+ shrink_wrapped flag is set even if there is no dump file.
+
+2011-10-05 DJ Delorie <dj@redhat.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * config/rx/rx.opt (mpid): Define.
+ * config/rx/t-rx (MULTILIB_OPTIONS): Add -mpid
+ (MULTILIB_DIRNAMES): Add pid.
+ * config/rx/rx.c (rx_gp_base_regnum_val, rx_pid_base_regnum_val)
+ (rx_num_interrupt_regs): New variable.
+ (rx_gp_base_regnum): New function. Returns the number of the
+ small data area register.
+ (rx_pid_base_regnum): New function. Returns the number of the pid
+ base register.
+ (rx_decl_for_addr): New function. Returns the symbolic part of a MEM.
+ (rx_pid_data_operand): New function. Returns whether an object is
+ in the position independent data area.
+ (rx_legitimize_address): New function. Puts undecided PID
+ objects in the PID data area.
+ (rx_is_legitimate_address): Add support for PID operands.
+ (rx_print_operand_address): Likewise.
+ (rx_print_operand): Likewise.
+ (rx_maybe_pidify_operand): New function. Determine if an operand
+ is suitable for PID addressing.
+ (rx_gen_move_template): Add PID support.
+ (rx_conditional_register_usage): Likewise.
+ (rx_option_override): Initialise rx_num_interrupt_regs.
+ (rx_is_legitimate_constant): Add support for PID constants.
+ (TARGET_LEGITIMIZE_ADDRESS): Define.
+ * config/rx/constraints.md (Rpid): Define.
+ (Rpda): Define.
+ * config/rx/rx.md (UNSPEC_PID_ADDR): Define.
+ (tablejump): Add PID support.
+ (mov<>): Likewise.
+ (mov<>_internal): Likewise.
+ (addsi3): Convert to an expander. Add PID support.
+ (pid_addr): New pattern.
+ * config/rx/rx.h (CPP_SPEC): Define.
+ (ASM_SPEC): Pass -mpid and -mint-register on to assembler.
+ (CASE_VECTOR_PC_RELATIVE): Define.
+ (JUMP_TABLES_IN_TEXT_SECTION): Enable for PID mode.
+ * config/rx/rx-protos.h (rx_maybe_pidify_operand): Prototype.
+ * doc/invoke.texi (RX Options): Document -mpid command line option.
+
+2011-10-05 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/38885
+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle partial reads
+ from constants.
+
+2011-10-05 Bernd Schmidt <bernds@codesourcery.com>
+
+ * doc/invoke.texi (-fshrink-wrap): Document.
+ * opts.c (default_options_table): Add it.
+ * common.opt (fshrink-wrap): Add.
+ * function.c (emit_return_into_block): Remove useless declaration.
+ (record_hard_reg_uses_1, record_hard_reg_uses, frame_required_for_rtx,
+ requires_stack_frame_p, gen_return_pattern): New static functions.
+ (emit_return_into_block): New arg simple_p. All callers changed.
+ Use gen_return_pattern.
+ (thread_prologue_and_epilogue_insns): Implement shrink-wrapping.
+ * config/i386/i386.md (return): Expand into a simple_return.
+ (simple_return): New expander):
+ (simple_return_internal, simple_return_internal_long,
+ simple_return_pop_internal_long, simple_return_indirect_internal):
+ Renamed from return_internal, return_internal_long,
+ return_pop_internal_long and return_indirect_internal; changed to use
+ simple_return.
+ * config/i386/i386.c (ix86_expand_epilogue): Adjust to expand
+ simple returns.
+ (ix86_pad_returns): Likewise.
+ * function.h (struct rtl_data): Add member shrink_wrapped.
+ * cfgcleanup.c (outgoing_edges_match): If shrink-wrapped, edges that
+ are not jumps or sibcalls can't be compared.
+
+2011-10-05 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-sccvn.c (vn_get_expr_for): Handle CONSTRUCTOR of
+ vector type.
+ (simplify_unary_expression): Handle BIT_FIELD_REFs.
+ (try_to_simplify): Handle BIT_FIELD_REFs.
+
+2011-10-05 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-protos.h (avr_out_addto_sp): New prototype.
+ * config/avr/avr.c (avr_out_addto_sp): New function.
+ (adjust_insn_length): Handle ADJUST_LEN_ADDTO_SP.
+ * config/avr/avr.md (adjust_len): Add "addto_sp".
+ (*movhi_sp): Remove insn.
+ (*addhi3_sp_R_pc2, *addhi3_sp_R_pc3): Merge to *addhi3_sp_R.
+
+2011-10-05 Richard Guenther <rguenther@suse.de>
+
+ * gimple-fold.c (gimple_fold_stmt_to_constant_1): For ternary ops
+ with an embedded expression valueize and fold that as well.
+ * tree-ssa-sccvn.c (try_to_simplify): Also allow SSA name
+ results from gimple_fold_stmt_to_constant_1.
+
+2011-10-05 Nick Clifton <nickc@redhat.com>
+
+ * config/rx/rx.md (tablejump): Add missing label.
+ (adddi3_internal): Mark operand 0 as early-clobbered.
+ (smaxsi3): Revert previous delta.
+ (adc_internal): Fix whitespace in generated asm.
+ (adc_flags): Likewise.
+
+2011-10-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * expmed.c (expand_mult_highpart_optab): Replace optab_handler
+ with the new widening_optab_handler.
+
+2011-10-05 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/50609
+ * gimple-fold.c (fold_array_ctor_reference): Also handle
+ vector typed constructors.
+ (fold_ctor_reference): Dispatch to fold_array_ctor_reference
+ for vector typed constructors.
+
+2011-10-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_emit_binop): New static function.
+ (ix86_split_lea_for_addr): Use ix86_emit_binop to emit add and shl
+ instructions.
+ (x86_output_mi_thunk): Use ix86_emit_binop to emit add instructions.
+
+2011-10-04 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (UNSPEC_FHADD, UNSPEC_FHSUB,
+ UNSPEC_XMUL): New unspecs.
+ (muldi3_v8plus): Use output_v8plus_mult.
+ (*naddsf3, *nadddf3, *nmulsf3, *nmuldf3, *nmuldf3_extend):
+ New VIS 3.0 combiner patterns.
+ (fhaddsf_vis, fhadddf_vis, fhsubsf_vis, fhsubdf_vis,
+ fnhaddsf_vis, fnhaddf_vis, umulxhi_vis, *umulxhi_sp64,
+ umulxhi_v8plus, xmulx_vis, *xmulx_sp64, xmulx_v8plus,
+ xmulxhi_vis, *xmulxhi_sp64, xmulxhi_v8plus): New VIS 3.0
+ builtins patterns.
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Emit new builtins.
+ (output_v8plus_mult): New function.
+ * config/sparc/sparc-protos.h: Declare it.
+ * config/sparc/visintrin.h (__vis_fhadds, __vis_fhaddd,
+ __vis_fhsubs, __vis_fhsubd, __vis_fnhadds, __vis_fnhaddd,
+ __vis_umulxhi, __vis_xmulx, __vis_xmulxhi): New intrinsics.
+ * doc/extend.texi: Document new builtins.
+
+2011-10-04 Richard Henderson <rth@redhat.com>
+
+ * c-typeck.c (c_build_vec_shuffle_expr): Fix uninitialized variable.
+ Avoid save_expr unless two_arguments.
+
+2011-10-04 Ozkan Sezer <sezeroz@gmail.com>
+
+ * config/i386/mingw-w64.h (CPP_SPEC): Rename _REENTRANCE to _REENTRANT.
+ * config/i386/mingw32.h (CPP_SPEC): Likewise.
+
+2011-10-04 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/driver-sparc.c (cpu_names): Fix string for supersparc
+ under Linux.
+
+2011-10-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/50604
+ * builtins.c (fold_builtin_strcpy, fold_builtin_stpcpy,
+ fold_builtin_strncpy, fold_builtin_stxcpy_chk): Ensure
+ last argument to memcpy has size_type_node type instead of ssizetype.
+ * tree-ssa-strlen.c (handle_builtin_memcpy): Use size_type_node
+ instead of TREE_TYPE (len) as type for newlen.
+
+ PR tree-optimization/50522
+ * tree-ssa-alias.c (ptr_deref_may_alias_decl_p): Don't test
+ TYPE_RESTRICT.
+ (ptr_derefs_may_alias_p): Call pt_solutions_same_restrict_base
+ unconditionally.
+
+ * fold-const.c (fold_unary_loc): Don't optimize
+ POINTER_PLUS_EXPR casted to TYPE_RESTRICT pointer by
+ casting the inner pointer if it isn't TYPE_RESTRICT.
+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Don't through
+ casts from non-TYPE_RESTRICT pointer to TYPE_RESTRICT pointer.
+
+2011-10-04 Joseph Myers <joseph@codesourcery.com>
+
+ * config.gcc (i[34567]86-*-elf*, x86_64-*-elf*): Use i386/t-crtstuff.
+
+2011-10-04 Jan Hubicka <jh@suse.cz>
+
+ * lto-streamer.h (lto_input_toplevel_asms): Add order_base parameter.
+ * lto-streamer-in.c (lto_input_toplevel_asms): Stream in order.
+ * lto-streamer-out.c (lto_output_toplevel_asms): Stream out order.
+ * lto-cgraph.c (order_base): New static var.
+ (lto_output_node): Stream in order.
+ (lto_output_varpool_node): Stream out order.
+ (input_node): Stream in order.
+ (input_varpool_node): Stream out order.
+ (input_cgraph_1): Initialize order base; update call of
+ lto_input_toplevel_asms.
+
+2011-10-04 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50566
+ * config/avr/avr-protos.h (avr_legitimize_reload_address): New
+ prototype.
+ * config/avr/avr.h (LEGITIMIZE_RELOAD_ADDRESS): Copy worker code
+ from here...
+ * config/avr/avr.c (avr_legitimize_reload_address) ...to this new
+ function. Log if avr_log.legitimize_reload_address.
+
+2011-10-04 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/sparc/sparc.c (sparc_fold_builtin): Use a sequence of tests.
+
+2011-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * longlong.h (smul_ppmm, sdiv_qrnnd): Add underscores to the local
+ variables. Fix second operand of DR. Swap inputs for sdiv_qrnnd.
+
+2011-10-03 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (fpack16_vis, fpackfix_vis, fpack32_vis): Make
+ GSR_REG an input operand to UNSPEC instead of a parallel USE.
+ (faligndata<V64I:mode>_vis): Likewise and use DI mode.
+ (alignaddrsi_vis, alignaddrdi_vis, alignaddrlsi_vis, alignaddrldi_vis):
+ Reference GSR_REG in DI mode, simplify convoluted expressions by using
+ zero_extract.
+ (bshuffle<V64I:mode>_vis): Reference GSR_REG in DI mode.
+
+2011-10-03 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * tree-eh.c (remove_unreachable_handlers): Obvious cleanup.
+
+2011-10-03 Jakub Jelinek <jakub@redhat.com>
+ Ian Lance Taylor <iant@google.com>
+
+ * godump.c (go_output_typedef): Support printing enum values that
+ don't fit in a signed HOST_WIDE_INT.
+
+2011-10-03 Anatoly Sokolov <aesok@post.ru>
+
+ * config/cris/cris.c (cris_output_addr_const_extra): Make static.
+ (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Define.
+ * config/cris/cris.h (OUTPUT_ADDR_CONST_EXTRA): Remove.
+ * config/cris/cris-protos.h (cris_output_addr_const_extra): Remove.
+
+2011-10-03 Anatoly Sokolov <aesok@post.ru>
+
+ * config/m68k/m68k.c (m68k_output_addr_const_extra): Make static.
+ (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Define.
+ * config/m68k/m68k.h (OUTPUT_ADDR_CONST_EXTRA): Remove.
+ * config/m68k/m68k-protos.h (m68k_output_addr_const_extra): Remove.
+
+2011-10-03 Steve Ellcey <sje@cup.hp.com>
+
+ PR target/49967
+ * configure.ac (gcc_cv_ld_static_dynamic): Define for *-*-hpux*.
+ (gcc_cv_ld_static_option): Ditto.
+ (gcc_cv_ld_dynamic_option): Ditto.
+ * configure: Regenerate.
+
+2011-10-03 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (bmask<P:mode>_vis): Split into explicit 'di'
+ and 'si' patterns which describe the GSR changes explicitly in the
+ RTL using zero_extract.
+ (bshuffle<V64I:mode>_vis): Put the GSR use inside of the unspec.
+
+ * config/sparc/sparc.md (bshuffle<V64I:mode>_vis): Don't wrap
+ GSR_REG in a USE, since it's now a true arg to the UNSPEC.
+
+2011-10-03 Artjoms Sinkarovs <artyom.shinkaroff@gmail.com>
+
+ * optabs.c (expand_vec_shuffle_expr_p): New function. Checks
+ if given expression can be expanded by the target.
+ (expand_vec_shuffle_expr): New function. Expand VEC_SHUFFLE_EXPR
+ using target vector instructions.
+ * optabs.h: New optab vshuffle.
+ (expand_vec_shuffle_expr_p): New prototype.
+ (expand_vec_shuffle_expr): New prototype.
+ (vshuffle_optab): New optab.
+ * genopinit.c: Adjust to support vecshuffle.
+ * c-tree.h (c_build_vec_shuffle_expr): New prototype.
+ * expr.c (expand_expr_real_2): Adjust.
+ * c-typeck.c: (c_build_vec_shuffle_expr): Build a VEC_SHUFFLE_EXPR
+ recognizing the cases of two and three arguments.
+ (convert_arguments) (build_binary_op)
+ (scalar_to_vector) (build_array_ref): Spurious whitespace.
+ * gimplify.c (gimplify_exp): Adjusted to support VEC_SHUFFLE_EXPR.
+ * tree.def: New tree code VEC_SHUFFLE_EXPR.
+ * tree-inline.c (estimate_operator_cost): Recognize VEC_SHUFFLE_EXPR.
+ * tree-vect-generic.c (vector_element): New function. Returns an
+ element of the vector at the given position.
+ (lower_vec_shuffle): Checks if VEC_SHUFLLE_EXPR is supported
+ by the backend or expand an expression piecewise.
+ (expand_vector_operations_1): Adjusted.
+ (gate_expand_vector_operations_noop): New gate function.
+ * Makefile.in (tree-vect-generic.o): New include.
+ * gimple.c (get_gimple_rhs_num_ops): Adjust.
+ * tree-cfg.c (verify_gimple_assign_trenary): Verify VEC_SHUFFLE_EXPR.
+ * passes.c: Move veclower down.
+ * tree-pretty-print.c (dump_generic_node): Recognize
+ VEC_SHUFFLE_EXPR as valid expression.
+ * c-parser.c (c_parser_get_builtin_args): Helper function for the
+ builtins with variable number of arguments.
+ (c_parser_postfix_expression): Use a new helper function for
+ RID_CHOOSE_EXPR, RID_BUILTIN_COMPLEX and RID_BUILTIN_SHUFFLE.
+ * tree-ssa-operands: Adjust.
+ * c-family/c-common.c: New __builtin_shuffle keyword.
+ * c-family/c-common.h: New __builtin_shuffle keyword.
+ * gcc/doc/extend.texi: Adjust.
+
+ * gcc/config/i386/sse.md: (sseshuffint) New mode_attr. Correspondence
+ between the vector and the type of the mask when shuffling.
+ (vecshuffle<mode>): New expansion.
+ * gcc/config/i386/i386-protos.h (ix86_expand_vshuffle): New prototype.
+ * gcc/config/i386/i386.c (ix86_expand_vshuffle): New function.
+ (ix86_vectorize_builtin_vec_perm_ok): Adjust.
+
+2011-10-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/50587
+ * tree-ssa-reassoc.c (init_range_entry): Stop iterating when
+ arg0 is not a SSA_NAME.
+
+2011-10-03 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * ipa-inline-analysis.c (MAX_TIME): Update comment.
+
+2011-10-02 Richard Henderson <rth@redhat.com>
+ David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (ashlsi3, *ashldi3_sp64): Remove
+ conditional insn type setting, we always emit a shift.
+ (*ashlsi3_extend, *lshrsi3_extend0): New patterns.
+ (*lshrsi3_extend): Rename to *lshrsi3_extend1.
+ * config/sparc/predicates.md (const_one_operand): Delete.
+
+2011-10-02 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * invoke.texi (SPARC Options): Refer to GNU/Linux.
+
+2011-10-02 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_frame_barrier): New function.
+ (mips_expand_prologue): Call it after allocating stack space.
+ (mips_deallocate_stack): New function.
+ (mips_expand_epilogue): Call mips_frame_barrier and
+ mips_deallocate_stack.
+
+2011-10-02 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR target/49696
+ * config/mips/sync.md (sync_<optab>_12): Allow zero operands.
+ (sync_old_<optab>_12, sync_new_<optab>_12, sync_nand_12): Likewise.
+ (sync_old_nand_12, sync_new_nand_12, test_and_set_12): Likewise.
+
+2011-10-02 Jan Hubicka <jh@suse.cz>
+
+ * cgraphunit.c (verify_edge_count_and_frequency): Bounds check.
+
+ * cgraphunit.c (ipa_passes): Remove unrechable nodes.
+ * lto-streamer-out.c (produce_symtab): Skip unused extern declarations.
+ * ipa.c (cgraph_remove_unreachable_nodes): Do not assume that external
+ functions are reachable when address is taken.
+ * tree-sra.c (modify_function): Free dominance info.
+
+2011-10-02 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analysis.c (inline_summary_alloc): Bounds check.
+
+ * ipa-inline-analysis.c (reset_inline_edge_summary): New function.
+ (reset_inline_summary): New function.
+ (compute_inline_parameters, inline_node_removal_hook,
+ inline_edge_removal_hook): Use it.
+ (inline_free_summary): Reset holders correctly.
+ (inline_generate_summary): Free summary before computing it.
+
+2011-10-02 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR preprocessor/36819
+ * incpath.c (merge_include_chains): Call free_path on
+ heads[QUOTE] and tails[QUOTE].
+
+2011-10-02 Jan Hubicka <jh@suse.cz>
+
+ PR lto/47247
+ * lto-symtab.c (lto_symtab_resolve_symbols): Do not resolve
+ when resolution is already availbale from plugin.
+ (lto_symtab_merge_decls_1): Handle LDPR_PREVAILING_DEF_IRONLY_EXP.
+ * cgraph.c (ld_plugin_symbol_resolution): Add
+ prevailing_def_ironly_exp.
+ * lto-cgraph.c (LDPR_NUM_KNOWN): Update.
+ * ipa.c (varpool_externally_visible_p): IRONLY variables are never
+ externally visible.
+ * varasm.c (resolution_to_local_definition_p): Add
+ LDPR_PREVAILING_DEF_IRONLY_EXP.
+ (resolution_local_p): Likewise.
+
+2011-10-01 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.opt (VIS3): New option.
+ * doc/invoke.texi: Document it.
+ * config/sparc/sparc.h: Force TARGET_VIS3 to zero if assembler is
+ not capable of such instructions.
+ * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__
+ to 0x300 when TARGET_VIS3.
+ * config/sparc/sparc-modes.def: Create 16-byte vector modes.
+ * config/sparc/sparc.md (UNSPEC_CMASK8, UNSPEC_CMASK16, UNSPEC_CMASK32,
+ UNSPEC_FCHKSM16, UNSPEC_PDISTN, UNSPC_FUCMP): New unspecs.
+ (V64N8, VASS): New mode iterators.
+ (vis3_shift, vis3_addsub_ss): New code iterators.
+ (vbits, vconstr): New mode attributes.
+ (vis3_shift_insn, vis3_addsub_ss_insn): New code attributes.
+ (cmask8<P:mode>_vis, cmask16<P:mode>_vis, cmask32<P:mode>_vis,
+ fchksm16_vis, <vis3_shift_insn><vbits>_vis, pdistn<mode>_vis,
+ fmean16_vis, fpadd64_vis, fpsub64_vis,
+ <vis3_addsub_ss_insn><vbits>_vis, fucmp<code>8<P:mode>_vis): New
+ VIS 3.0 instruction patterns.
+ * config/sparc/sparc.c (sparc_option_override): Set MASK_VIS3 by
+ default when targetting capable cpus. TARGET_VIS3 implies
+ TARGET_VIS2 and TARGET_VIS, and clear them when TARGET_FPU is disabled.
+ (sparc_vis_init_builtins): Emit new VIS 3.0 builtins.
+ (sparc_fold_builtin): Do not eliminate cmask{8,16,32} when result
+ is ignored.
+ * config/sparc/visintrin.h (__vis_cmask8, __vis_cmask16,
+ __vis_cmask32, __vis_fchksm16, __vis_fsll16, __vis_fslas16,
+ __vis_fsrl16, __vis_fsra16, __vis_fsll32, __vis_fslas32,
+ __vis_fsrl32, __vis_fsra32, __vis_pdistn, __vis_fmean16,
+ __vis_fpadd64, __vis_fpsub64, __vis_fpadds16, __vis_fpadds16s,
+ __vis_fpsubs16, __vis_fpsubs16s, __vis_fpadds32, __vis_fpadds32s,
+ __vis_fpsubs32, __vis_fpsubs32s, __vis_fucmple8, __vis_fucmpne8,
+ __vis_fucmpgt8, __vis_fucmpeq8): New VIS 3.0 interfaces.
+ * doc/extend.texi: Document new VIS 3.0 builtins.
+
+2011-10-01 Eric Botcazou <ebotcazou@adacore.com>
+
+ * ira-color.c (assign_hard_reg): Fix typo.
+
+2011-09-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/extend.texi: Add missing ','.
+
+2011-09-30 Bernd Schmidt <bernds@codesourcery.com>
+
+ * common/config/c6x/c6x-common.c (c6x_option_optimization_table):
+ Enable -fmodulo-sched at -O2 and above.
+ * config/c6x/c6x.md (doloop_end): New expander.
+ (mvilc, sploop, spkernel, loop_end): New patterns.
+ (loop_end with memory destination splitter): New.
+ * config/c6x/c6x.c: Include "hw-doloop.h".
+ (enum unitreqs): New.
+ (unit_req_table): New typedef.
+ (unit_reqs): New static variable.
+ (unit_req_factor, get_unit_reqs, count_unit_reqs, merge_unit_reqs,
+ res_mii, split_delayed_nonbranch, undo_split_delayed_nonbranch,
+ hwloop_pattern_reg, bb_earliest_end_cycle, filter_insns_above,
+ hwloop_optimize, hwloop_fail, c6x_hwloops): New static functions.
+ (struct c6x_sched_context): New member last_scheduled_iter0.
+ (init_sched_state): Initialize it.
+ (c6x_variable_issue): Update it.
+ (sploop_max_uid_iter0): New static variable.
+ (c6x_sched_reorder_1): Be careful about issuing sploop.
+ (c6x_reorg): Call c6x_hwlooops before the final schedule.
+
+2011-09-30 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50566
+ * config/avr/avr-protos.h (avr_log_t): New field address_cost.
+ * config/avr/avr.c (avr_address_cost): Use it.
+ * config/avr/avr-log.c (avr_log_set_avr_log): Initialize it.
+ (avr_log_vadump): Unknown %-codes finish printing.
+
+2011-09-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR inline-asm/50571
+ * gimple-fold.c (fold_stmt_1) <case GIMPLE_ASM>: If
+ input constraints allow mem and not reg, pass true instead of
+ false as second argument to maybe_fold_reference.
+
+ PR tree-optimization/46309
+ * fold-const.c (make_range, merge_ranges): Remove prototypes.
+ (make_range_step): New function.
+ (make_range): Use it.
+ * tree.h (make_range_step): New prototypes.
+ * Makefile.in (tree-ssa-reassoc.o): Depend on $(DIAGNOSTIC_CORE_H).
+ * tree-ssa-reassoc.c: Include diagnostic-core.h.
+ (struct range_entry): New type.
+ (init_range_entry, range_entry_cmp, update_range_test,
+ optimize_range_tests): New functions.
+ (reassociate_bb): Call optimize_range_tests.
+
+2011-09-30 Jakub Jelinek <jakub@redhat.com>
+ Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-structalias.c (find_func_aliases_for_builtin_call): Handle
+ BUILT_IN_STRDUP and BUILT_IN_STRNDUP.
+ * tree-ssa-alias.c (call_may_clobber_ref_p_1): Likewise. Fix
+ handling of BUILT_IN_STRNCAT and BUILT_IN_STRNCAT_CHK.
+ (ref_maybe_used_by_call_p_1): Fix handling of BUILT_IN_STRCAT,
+ BUILT_IN_STRNCAT, BUILT_IN_STRCAT_CHK and BUILT_IN_STRNCAT_CHK.
+
+2011-09-30 Jan Beulich <jbeulich@suse.com>
+
+ * lto-cgraph.c (output_cgraph): Remove processing of
+ 'cgraph_asm_nodes', call lto_output_toplevel_asms() instead.
+ (input_cgraph_1): Remove loop calling cgraph_add_asm_node(), call
+ lto_input_toplevel_asms() instead.
+ * lto-section-in.c (lto_section_name): Add "asm" entry.
+ * lto-streamer-in.c (lto_input_toplevel_asms): New.
+ * lto-streamer-out.c (lto_output_toplevel_asms): New.
+ * lto-streamer.h (LTO_minor_version): Bump.
+ (enum lto_section_type): Add LTO_section_asm.
+ (struct lto_asm_header): New.
+ (lto_input_toplevel_asms, lto_output_toplevel_asms): Declare.
+ * tree-streamer.h (streamer_write_string_cst): Declare.
+ * tree-streamer-out.c (write_string_cst): Rename to
+ streamer_write_string_cst and make global. Handle incoming string
+ being NULL.
+ (streamer_write_tree_header): Adjust call to renamed function.
+
+2011-09-30 Bernd Schmidt <bernds@codesourcery.com>
+
+ * haifa-sched.c (modulo_ii, modulo_max_states, modulo_n_insns,
+ modulo_insns_scheduled, modulo_iter0_max_uid, modulo_backtracks_left,
+ modulo_last_stage): New static variables.
+ (set_modulo_params, discard_delay_pairs_above): New functions.
+ (struct delay_pair): New member stages.
+ (htab_i2_traverse, htab_i1_traverse): New static functions.
+ (record_delay_slot_pair): New arg stages. All callers changed.
+ Record it.
+ (pair_delay): Take stages into account.
+ (add_delay_dependencies): Don't do so for stage pairs.
+ (struct sched_block_state): New member modulo_epilogue.
+ (save_backtrack_point): Don't set SHADOW_P for stage pairs.
+ (unschedule_insns_until): Decrease modulo_insns_scheduled.
+ Set HARD_DEP without using or.
+ (resolve_dependencies): New static function.
+ (prune_ready_list): New arg modulo_epilogue_p. All callers changed.
+ If it is true, allow only insns with INSN_EXACT_TICK set.
+ (schedule_block): Return bool, always true for normal scheduling,
+ true or false depending on modulo scheduling success otherwise.
+ Add bookkeeping for modulo scheduling, and call resolve_dependencies
+ on everything left over after a modulo schedule.
+ (haifa_sched_init): Remove check_cfg call. Clear modulo_ii.
+ * sched-int.h (schedule_block, record_delay_slot_pair): Adjust
+ declarations.
+ (set_modulo_params, discard_delay_pairs_above): Declare.
+ * params.def (PARAM_MAX_MODULO_BACKTRACK_ATTEMPS): New.
+ * doc/invoke.texi (--param): Document it.
+
+ * sched-ebb.c (schedule_ebb): No longer static. Remove declaration.
+ New arg modulo_scheduling. All callers changed. Move note handling
+ code here from schedule_ebbs.
+ (schedule_ebbs_finish, schedule_ebbs_init): New functions, broken
+ out of schedule_ebbs.
+ (schedule_ebbs): Call them. Remove note handling code moved to
+ schedule_ebb.
+ * sched-int.h (schedule_ebb, schedule_ebbs_init,
+ schedule_ebbs_finish): Declare.
+
+2011-09-30 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/50574
+ * tree-cfg.c (verify_gimple_comparison): Compare component
+ mode sizes for vector comparisons.
+
+2011-09-30 Revital Eres <revital.eres@linaro.org>
+
+ * ddg.c (autoinc_var_is_used_p): New function.
+ (create_ddg_dep_from_intra_loop_link,
+ add_cross_iteration_register_deps): Call it.
+ * ddg.h (autoinc_var_is_used_p): Declare.
+ * modulo-sched.c (generate_reg_moves): Call autoinc_var_is_used_p.
+ (sms_schedule): Handle instructions with REG_INC.
+
+2011-09-30 Revital Eres <revital.eres@linaro.org>
+
+ * modulo-sched.c (generate_reg_moves): Skip instructions that
+ do not set a register and verify no regmoves are created for
+ !single_set instructions.
+
+2011-09-30 Bernd Schmidt <bernds@codesourcery.com>
+
+ * hw-doloop.c (scan_loop): Compute register usage only for non-debug
+ insns.
+
+2011-09-30 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ PR target/50099
+ * config/arm/iterators.md (qhs_zextenddi_cstr): New.
+ (qhs_zextenddi_op): New.
+ * config/arm/arm.md ("zero_extend<mode>di2"): Use them.
+ * config/arm/predicates.md ("arm_extendqisi_mem_op"):
+ Distinguish between ARM and Thumb2 states.
+
+2011-09-30 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.opt (VIS2): New option.
+ * doc/invoke.texi: Document it.
+ * config/sparc/sparc.md (UNSPEC_EDGE8N, UNSPEC_EDGE8LN,
+ UNSPEC_EDGE16N, UNSPEC_EDGE16LN, UNSPEC_EDGE32N,
+ UNSPEC_EDGE32LN, UNSPEC_BSHUFFLE): New unspecs.
+ (define_attr type): New insn type 'edgen'.
+ (bmask<P:mode>_vis, bshuffle<V64I:mode>_vis, edge8n<P:mode>_vis,
+ edge8ln<P:mode>_vis, edge16n<P:mode>_vis, edge16ln<P:mode>_vis,
+ edge32n<P:mode>_vis, edge32ln<P:mode>_vis): New insn VIS 2.0
+ patterns.
+ * niagara.md: Handle edgen.
+ * niagara2.md: Likewise.
+ * ultra1_2.md: Likewise.
+ * ultra3.md: Likewise.
+ * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__
+ to 0x200 when TARGET_VIS2.
+ * config/sparc/sparc.c (sparc_option_override): Set MASK_VIS2 by
+ default when targetting capable cpus. TARGET_VIS2 implies
+ TARGET_VIS, clear and it when TARGET_FPU is disabled.
+ (sparc_vis_init_builtins): Emit new VIS 2.0 builtins.
+ (sparc_expand_builtin): Fix predicate indexing when builtin returns
+ void.
+ (sparc_fold_builtin): Do not eliminate bmask when result is ignored.
+ * config/sparc/visintrin.h (__vis_bmask, __vis_bshuffledi,
+ __vis_bshufflev2si, __vis_bshufflev4hi, __vis_bshufflev8qi,
+ __vis_edge8n, __vis_edge8ln, __vis_edge16n, __vis_edge16ln,
+ __vis_edge32n, __vis_edge32ln): New VIS 2.0 interfaces.
+ * doc/extend.texi: Document new VIS 2.0 builtins.
+
+2011-09-29 Nick Clifton <nickc@redhat.com>
+ Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/frv/frvbegin.c: Fix location of unwind-dw2-fde.h header file.
+ * config/frv/frvend.c: Likewise.
+ * config/frv/frv.c (frv_function_prologue): Move misplaced
+ CALL_ARG_LOCATION notes back to their proper locations.
+
+2011-09-29 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50566
+ * config/avr/avr-log.c (avr_log_vadump): Use %b to print bool.
+ * config/avr/avr.c (avr_rtx_costs_1): New static function, renamed
+ from avr_rtx_costs.
+ (avr_legitimate_address_p): Use avr_edump to print log information
+ filtered by avr_log.
+ (extra_constraint_Q): Ditto.
+ (avr_legitimize_address): Ditto.
+ (avr_rtx_costs): Ditto. Rewrite as wrapper for avr_rtx_costs_1.
+ (final_prescan_insn): Use avr_log.rtx_costs as filter.
+
+2011-09-29 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/arm/arm-protos.h (arm_modes_tieable_p): Declare.
+ * config/arm/arm.h (MODES_TIEABLE_P): Use it.
+ * config/arm/arm.c (arm_modes_tieable_p): New function. Allow
+ NEON vector and structure modes to be tied.
+
+2011-09-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * graphite-scop-detection.c (make_close_phi_nodes_unique): New
+ forward declaration.
+ (remove_duplicate_close_phi): Detect and repair creation of
+ duplicate close-phis for a containing loop.
+
+2011-09-27 Andi Kleen <ak@linux.intel.com>
+
+ * gcc.c (get_local_tick). Rename to get_random_number. Read from
+ /dev/urandom. Add getpid call.
+ (compare_debug_dump_opt_spec_function): Drop getpid call.
+
+2011-09-26 Andi Kleen <ak@linux.intel.com>
+
+ * toplev.c (init_local_tick): Try reading random seed
+ from /dev/urandom.
+
+2011-09-26 Andi Kleen <ak@linux.intel.com>
+
+ * hwint.h (HOST_WIDE_INT_PRINT_HEX_PURE): Add.
+ * lto-streamer.c (lto_get_section_name): Remove crc32_string.
+ Handle numerical random seed.
+ * lto-streamer.h (lto_file_decl_data): Change id to
+ unsigned HOST_WIDE_INT.
+ * toplev.c (random_seed): Add.
+ (init_random_seed): Change for numerical random seed.
+ (get_random_seed): Return as HOST_WIDE_INT.
+ (set_random_seed): Crc32 existing string.
+ * toplev.h (get_random_seed): Change to numercal return.
+ * tree.c (get_file_function_name): Remove CRC. Handle
+ numerical random seed.
+
+2011-09-29 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50566
+ * config.gcc (extra_objs): Add avr-log.o for $target in:
+ avr-*-rtems*, avr-*-*.
+ * config/avr/t-avr (avr-log.o): New rule to compile...
+ * config/avr/avr-log.c: ...this new file.
+ * config/avr/avr.opt (mlog=): New option.
+ * config/avr/avr-protos.h (avr_edump, avr_fdump): New macros.
+ (avr_log_set_caller_e, avr_log_set_caller_f): New prototypes.
+ (avr_log_set_avr_log): New prototype.
+ (avr_log_t): New typedef.
+ (avr_log): New declaration.
+ * config/avr/avr.c (avr_option_override): Call avr_log_set_avr_log.
+
+2011-09-29 Artjoms Sinkarovs <artyom.shinkaroff@gmail.com>
+
+ * expr.c (do_store_flag): Expand vector comparison by
+ building an appropriate VEC_COND_EXPR.
+ * c-typeck.c (build_binary_op): Typecheck vector comparisons.
+ (c_objc_common_truthvalue_conversion): Adjust.
+ * tree-vect-generic.c (do_compare): Helper function.
+ (expand_vector_comparison): Check if hardware supports
+ vector comparison of the given type or expand vector piecewise.
+ (expand_vector_operation): Treat comparison as binary
+ operation of vector type.
+ (expand_vector_operations_1): Adjust.
+
+2011-09-29 Richard Guenther <rguenther@suse.de>
+
+ * tree.c (build_opaque_vector_type): Make opaque vectors
+ variant types of the corresponding non-opaque type. Make
+ sure to share opaque vector types properly.
+
+2011-09-29 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (UNSPEC_ARRAY8, UNSPEC_ARRAY16,
+ UNSPEC_ARRAY32): New unspec.
+ (define_attr type): New type 'array'.
+ (array{8,16,32}<P:mode>_vis): New patterns.
+ * config/sparc/ultra1_2.md: Add reservations for 'array'.
+ * config/sparc/ultra3.md: Likewise.
+ * config/sparc/niagara.md: Likewise.
+ * config/sparc/niagara2.md: Likewise.
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Build new
+ array builtins.
+ * config/sparc/visintrin.h (__vis_array8, __vis_array16,
+ __vis_array32): New.
+ * doc/extend.texi: Document new VIS builtins.
+
+ * config/sparc/sparc.md (gcond_name): Delete unnecessary code attr.
+ (VIS pixel-compare insn): Just use <gcond:name>.
+
+ * config/sparc/sparc.md (VIS pixel-compare insn): There is only one
+ code iterator used, so just use <code>. There are two mode iterators
+ so explicitly use <GCM:gcm_name>.
+
+2011-09-29 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Enable for
+ Darwin >= 9.
+
+2011-09-28 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (UNSPEC_FCMPLE, UNSPEC_FCMPNE,
+ UNSPEC_FCMPGT, UNSPEC_FCMPEQ): Delete and reduce to...
+ (UNSPEC_FCMP): New unspec.
+ (gcond): New code iterator.
+ (gcond_name): New code attr.
+ (GCM): New mode iterator.
+ (gcm_name): New mode attr.
+ (fcmp{le,ne,gt,eq}{16,32}_vis): Reimplement using iterators.
+
+2011-09-28 Oleg Endo <oleg.endo@t-online.de>
+
+ PR target/49486
+ * config/sh/sh.md (negdi2): Move expansion into split to
+ allow more combination options. Add T_REG clobber.
+ (abssi2): New expander.
+ (*negdi2, *abssi2, *negabssi2): New insns.
+ (cneg): Change from insn to insn_and_split. Rename to
+ negsi_cond. Add alternative for non-SH4.
+
+2011-09-28 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/arm/neon.md (neon_move_lo_quad_<mode>): Delete.
+ (neon_move_hi_quad_<mode>): Likewise.
+ (move_hi_quad_<mode>, move_lo_quad_<mode>): Use subreg moves.
+
+2011-09-28 Nick Clifton <nickc@redhat.com>
+
+ * config/rx/predicates.md (rx_minmax_operand): New predicate.
+ Accepts immediates and a restricted subset of MEMs.
+ * config/rx/rx.md (int_modes): New iterator.
+ (smaxsi3, sminsi3): Delete and replace with...
+ (smax<int_mode>3, smin<int_mode>3): New patterns.
+ (umax<>3_u, umax<>3_ur, umax<>3, umin<>3): New patterns.
+
+2011-09-28 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/50460
+ * fold-const.c (try_move_mult_to_index): Handle &a.array the
+ same as &a.array[0].
+
+2011-09-28 Kai Tietz <ktietz@redhat.com>
+
+ * configure.ac: Add test for new section attribute
+ specifier "e" via define HAVE_GAS_SECTION_EXCLUDE.
+ * config.in: Regenerated.
+ * configure: Regenerated.
+ * config/i386/winnt.c (i386_pe_asm_named_section): Emit
+ new section flag "e" for excluded sections, if supported.
+ Otherwise we mark section withc SECTION_EXCLUDE flag as never-load.
+
+2011-09-28 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/m32r/m32r.md: Use match_test rather than eq/ne symbol_ref
+ throughout file.
+
2011-09-28 Richard Sandiford <rdsandiford@googlemail.com>
* config/iq2000/iq2000.md: Use match_test rather than eq/ne symbol_ref
2011-09-27 Sriraman Tallam <tmsriram@google.com>
* output.h (SECTION_EXCLUDE): New macro.
- * varasm.c (default_elf_asm_named_section): Check for
- SECTION_EXCLUDE.
+ * varasm.c (default_elf_asm_named_section): Check for SECTION_EXCLUDE.
2011-09-27 Richard Sandiford <rdsandiford@googlemail.com>
2011-09-27 Jeff Law <law@redhat.com>
* ifcvt.c (cheap_bb_rtx_cost_p): Add SCALE argument. Scale
- non-jumping insns by REG_BR_PROB_BASE and the maximum cost
- by SCALE.
+ non-jumping insns by REG_BR_PROB_BASE and the maximum cost by SCALE.
(find_if_case_1): Use the probability of the THEN clause when
determining if speculation is profitable.
(find_if_case_2): Similarly for the ELSE clause.
* tree-ssa-pre.c (execute_pre): Use tail_merge_optimize.
* Makefile.in (OBJS-common): Add tree-ssa-tail-merge.o.
(tree-ssa-tail-merge.o): New rule.
- * opts.c (default_options_table): Set OPT_ftree_tail_merge by default at
- OPT_LEVELS_2_PLUS.
+ * opts.c (default_options_table): Set OPT_ftree_tail_merge by
+ default at OPT_LEVELS_2_PLUS.
* tree-ssa-sccvn.c (vn_valueize): Move to ...
* tree-ssa-sccvn.h (vn_valueize): Here.
* timevar.def (TV_TREE_TAIL_MERGE): New timevar.
2011-09-27 Jan Hubicka <jh@suse.cz>
- * ipa-inline-analysis.c (eliminated_by_inlining_prob): Handle parameters
- passed by reference; handle loads from non-SSA scalars and update comments.
+ * ipa-inline-analysis.c (eliminated_by_inlining_prob): Handle
+ parameters passed by reference; handle loads from non-SSA scalars
+ and update comments.
2011-09-27 Bernd Schmidt <bernds@codesourcery.com>
* rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(CONSTM1_RTX): Define.
- * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
- from 3 x MAX_MACHINE_MODE.
+ * emit-rtl.c (const_tiny_rtx): Change into array of
+ 4 x MAX_MACHINE_MODE from 3 x MAX_MACHINE_MODE.
(gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
CONSTM1_RTX.
(init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
(REG_CLASS_CONTENTS): Add GSR to ALL_REGS.
(REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end.
(REGISTER_NAMES): Add "%gsr".
- * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL):
- Delete.
+ * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL): Delete.
(UNSPEC_WRGSR): New unspec.
(GSR_REG): New constant.
(type): Add new insn type 'gsr'.
(evaluate_conditions_for_edge): Handle change probabilities.
(inline_edge_duplication_hook): Copy param summaries.
(inline_edge_removal_hook): Free param summaries.
- (dump_inline_edge_summary): Fix dumping of indirect edges and callee sizes;
- dump param summaries.
+ (dump_inline_edge_summary): Fix dumping of indirect edges and callee
+ sizes; dump param summaries.
(will_be_nonconstant_predicate): Use CHANGED predicate.
(record_modified_bb_info): New structure.
(record_modified): New function.
(remap_edge_change_prob): New function.
(remap_edge_summaries): Rename from ...; use remap_edge_change_prob.
(remap_edge_predicates): ... this one.
- (inline_merge_summary): Remap edge summaries; handle predicate probabilities;
- remove param summaries after we are done.
+ (inline_merge_summary): Remap edge summaries; handle predicate
+ probabilities; remove param summaries after we are done.
(do_estimate_edge_time): Update.
(do_estimate_edge_growth): Update.
(read_inline_edge_summary): Read param info.
* config/i386/sse.md (i128): New mode_attr.
(vec_extract_hi_<mode>, vec_extract_hi_<mode>,
avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full,
- *avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
+ *avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the
patterns, use "<sseinsnmode>" for "mode" attribute.
(vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi,
2011-09-23 Bin Cheng <bin.cheng@arm.com>
- * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-m arch
- and processors.
+ * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-m arch and processors.
2011-09-22 Maxim Kuvyrkov <maxim@codesourcery.com>
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