+2010-10-18 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-mips.c (macro)[ldd_std]: Fix the relaxation variant
+ for absolute addressing.
+
+2010-10-18 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Handle 64-bit ABIs.
+
+2010-10-18 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * config/tc-mips.c (mips_pseudo_table): Add "sbss".
+ (s_change_sec): Handle it.
+
+2010-10-15 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (BYTEOP2M): Call BYTEOP2M().
+
+2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Check checkregsize
+ instead of w for register size check.
+
+2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Add disp32_encoding.
+ (md_assemble): Don't call optimize_disp if disp32_encoding is
+ set.
+ (parse_insn): Support .d32 to force 32bit displacement.
+ (output_branch): Use BIG if disp32_encoding is set.
+
+ * doc/c-i386.texi: Document .d32 encoding suffix.
+
+2010-10-11 Steve Kilbane <steve.kilbane@analog.com>
+
+ * config/bfin-lex.l (FLAGS): New state.
+ (X, Z, S, M, T): Require FLAGS state.
+ ("(", ")"): Start/stop FLAGS state.
+
+2010-10-11 David Gibson <david.gibson@analog.com>
+
+ * config/bfin-aux.h (bfin_loop_attempt_create_label): New prototype.
+ * config/bfin-parse.y (LOOP_BEGIN, LOOP_END): Handle numeric labels.
+ * config/tc-bfin.c (bfin_loop_attempt_create_label): New funtion.
+
+2010-10-11 David Gibson <david.gibson@analog.com>
+
+ * config/tc-bfin.c (bfin_gen_loop): Check symbol before removing.
+
+2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
+
+ Fix build with -DDEBUG=7
+ * config/obj-coff.c (s_get_name, symbol_dump): Add prototypes.
+
+2010-10-07 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field
+ in SPKERNEL instructions.
+
+2010-10-06 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-arm.c (encode_branch): Remove superfluous braces.
+ (do_t_branch): Move reloc setting to end of routine.
+
+2010-10-04 David Daney <ddaney@caviumnetworks.com>
+
+ * config/tc-mips.c (mips_fix_cn63xxp1): New variable.
+ (mips_ip): Add errata work around when mips_fix_cn63xxp1 set.
+ (OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
+ enumerations.
+ (md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
+ (md_parse_option): Handle OPTION_FIX_CN63XXP1 and
+ OPTION_NO_FIX_CN63XXP1.
+ (md_show_usage): Add documentation for -mfix-cn63xxp1.
+ * doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
+ the new options.
+
+2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
+
+ * gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
+ * gas/tic6x/insns-bad-1.l: Likewise.
+ * gas/tic6x/insns-c674x.d: Add test for writeable tscl.
+ * gas/tic6x/insns-c674x.s: Likewise.
+
+2010-09-29 Alan Modra <amodra@gmail.com>
+
+ * expr.c (expr): Correct returned segment value.
+
+2010-09-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2010-09-27 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/tc-tic6x.c (tic6x_fix_adjustable): New function.
+ * config/tc-tic6x.h (tic6x_fix_adjustable): Declare.
+ (tc_fix_adjustable): New macro.
+
+2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/tc-s390.c: (md_parse_option): New option -march=z196.
+ * doc/c-s390.texi: Document new option.
+
+2010-09-27 Tejas Belagod <tejas.belagod@arm.com>
+
+ * config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative
+ VSTR, issue an error in THUMB mode.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_ext_virt): New variable.
+ (arm_reg_type): Add REG_TYPE_RNB for banked registers.
+ (reg_entry): Allow registers to be larger than a byte.
+ (reg_alias): Fix type warning.
+ (parse_operands): Parse banked registers when appropriate.
+ (do_mrs): Add support for Virtualization Extensions.
+ (do_hvc): New function.
+ (do_t_mrs): Add support for Virtualization Extensions.
+ (do_t_msr): Likewise.
+ (do_t_hvc): New function.
+ (SPLRBANK): New define.
+ (reg_names): Add banked registers.
+ (insns): Add support for Virtualization Extensions.
+ (md_apply_fixup): Likewise.
+ (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
+ (arm_extensions): Add 'virt' extension.
+ (aeabi_set_public_attributes): Add support for Virtualization
+ Extensions.
+ * doc/c-arm.texi: Document 'virt' extension.
+
+2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * config/tc-arm.c (arm_ext_adiv): New variable.
+ (do_div): New function.
+ (insns): Accept UDIV and SDIV in ARM state.
+ (arm_cpus): The cortex-a15 option has all current v7-A extensions.
+ (arm_extensions): Add 'idiv' extension.
+ (aeabi_set_public_attributes): Update Tag_DIV_use values for the
+ Integer Divide extension.
+ * doc/c-arm.texi: Document the idiv extension.
+
2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (arm_ext_v6m): New variable.
(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
- (arm_cpus): The cortex-m1 and cortex-m0 options have the OS
+ (arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(arm_option_cpu_table): Rename...
(arm_option_fpu_table): ...to this.
(arm_fpus): Change type.
- (arm_parse_extension): Enforce alphabetical order. Allow
+ (arm_parse_extension): Enforce alphabetical order. Allow
extensions to be removed.
(arm_parse_arch): Allow extensions to be specified with -march.
(s_arm_arch_extension): Add.
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