+2007-05-11 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-spu.c (md_pseudo_table): Add int, long, quad. Call
+ spu_cons for word.
+ (md_assemble): Tidy use of insn.flag.
+ (get_imm): Likewise. Handle uppercase input too.
+ (spu_cons): New function.
+ * config/tc-spu.h (tc_fix_adjustable): Don't adjust SPU_PPU relocs.
+ (TC_FORCE_RELOCATION): Don't resolve them either.
+
+2007-05-05 Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Generate more accurate
+ diagnostic when 8-bit immediate range is exceeded for
+ BFD_RELOC_ARM_OFFSET_IMM8.
+
+2007-05-04 Alan Modra <amodra@bigpond.net.au>
+
+ PR gas/4460
+ * config/tc-i386.c (lex_got): Don't replace the reloc token with
+ a space if we already have a space.
+
+2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Don't explicitly check
+ suffix for crc32 in Intel mode.
+ (process_suffix): Issue an error for crc32 if the operand size
+ is ambiguous.
+
+2007-05-03 Vincent Riviere <vincent.riviere@freesbee.fr>
+ Nick Clifton <nickc@redhat.com>
+
+ PR gas/3041
+ * config/tc-m68k.c (relaxable_symbol): Do not relax weak symbols.
+ (tc_gen_reloc): Adjust the addend of relocs against weak symbols.
+ (md_apply_fix): Put zero values into the frags referencing weak
+ symbols.
+
+2007-05-02 Alan Modra <amodra@bigpond.net.au>
+
+ PR 4448
+ * config/tc-ppc.c (ppc_insert_operand): Don't increase min for
+ PPC_OPERAND_PLUS1.
+
+2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_template): Check suffix for crc32 in
+ Intel mdoe.
+ (process_suffix): Default the suffix of 8bit crc32 to
+ BYTE_MNEM_SUFFIX.
+ (check_byte_reg): Skip check for 8bit crc32.
+
+2007-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_assemble): Use register_prefix in
+ error/warning message.
+ (check_byte_reg): Likewise.
+ (check_long_reg): Likewise.
+ (check_qword_reg): Likewise.
+ (check_word_reg): Likewise.
+ (process_operands): Likewise.
+
+2007-04-30 Alan Modra <amodra@bigpond.net.au>
+
+ PR 4436
+ * config/tc-ppc.c (ppc_insert_operand): Disable range check if
+ min > max.
+
+2007-04-28 Thiemo Seufer <ths@networkno.de>
+
+ * config/tc-mips.c: Fix comment.
+
+2007-04-26 Anatoly Sokolov <aesok@post.ru>
+
+ * config/tc-avr.c (mcu_types): Add support for atmega8hva and
+ atmega16hva devices. Move at90usb82 device to 'avr5' architecture.
+ * doc/c-avr.texi: Document new devices.
+
+2007-04-24 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-04-23 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (mcf54455_ctrl): New.
+ (HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
+ (m68k_archs): Add isac.
+ (m68k_cpus): Add 54455 family.
+ (m68k_ip): Split Bg into Bb, Bs, Bg.
+ (m68k_elf_final_processing): Add ISA_C.
+ * doc/c-m68k.texi (M680x0 Options): Add isac.
+
+2007-04-22 Alan Modra <amodra@bigpond.net.au>
+
+ * read.c (read_a_source_file): Skip multiple spaces to
+ cover hack in mmix md_start_line_hook which overwrites a
+ colon with a space. Delete sermon and needless assertion.
+
+2007-04-21 Alan Modra <amodra@bigpond.net.au>
+
+ * config/atof-vax.c (atof_vax_sizeof): Change return type to unsigned.
+ (md_atof): Make number_of_chars unsigned. Revert last change.
+ * config/tc-or32.c (md_apply_fix): Delete bogus assertions.
+ * config/tc-sh.c (sh_optimize_expr): Only define for OBJ_ELF.
+ * config/tc-sh.h (md_optimize_expr): Likewise.
+ * config/tc-sh64.c (shmedia_md_pcrel_from_section): Delete bogus
+ assertion.
+ * config/tc-xtensa.c (convert_frag_immed_finish_loop): Likewise.
+
+2007-04-21 Nick Clifton <nickc@redhat.com>
+
+ * config/atof-vax.c (md_atof): Fix comparison inside know().
+
+ * config/tc-ia64.c (emit_one_bundle): Fix typo.
+
+2007-04-21 Alan Modra <amodra@bigpond.net.au>
+
+ * expr.c (expr): Assert on rankarg, not rank which can be unsigned.
+ * read.c (read_a_source_file): Remove buffer_limit[-1] assertion.
+ Don't skip over NUL char.
+ (pseudo_set): Set X_op for registers to O_register.
+ * symbols.c (symbol_clone): Remove assertion that sym is defined.
+ (resolve_symbol_value): Resolve O_register symbols.
+ * config/tc-i386.c (parse_real_register): Don't use i386_float_regtab.
+ Instead find st(0) by hash lookup.
+ * config/tc-ppc.c (ppc_macro): Warning fix.
+
+ * as.h (ENABLE_CHECKING): Default define to 0.
+ (know): Assert if ENABLE_CHECKING.
+ (struct relax_type): Remove superfluous declaration.
+ * configure.in (--enable-checking): New.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * config/tc-ppc.c (ppc_setup_opcodes): Do checks when ENABLE_CHECKING.
+ Check for duplicate powerpc_operands entries.
+
+2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-m68k.c (mcf5253_ctrl): New.
+ (mcf52223_ctrl): New.
+ (m68k_cpus): Add 5253, 52221, 52223.
+
+ * config/m68k-parse.h (RAMBAR_ALT): New.
+ * config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
+ (mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
+ mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
+ mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
+ mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
+ RAMBAR1.
+ (mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
+ (m68k_cpus): Adjust 5206, 5206e & 5307 entries.
+ (m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it
+ to control register mapping.
+
+2007-04-20 Alan Modra <amodra@bigpond.net.au>
+
+ * messages.c (as_internal_value_out_of_range): Fix typo in
+ error message. Return after printing domain error.
+ * config/tc-ppc.c (ppc_insert_operand): Preserve low zero bits
+ in max when shifting right.
+
+2007-04-20 Alan Modra <amodra@bigpond.net.au>
+
+ * messages.c (as_internal_value_out_of_range): Extend to report
+ errors for values with invalid low bits set.
+ * config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
+ fields. Check that operands and opcode fields are disjoint.
+ (ppc_insert_operand): Check operands using mask rather than bit
+ count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust
+ insertion code.
+ (md_apply_fix): Adjust for struct powerpc_operand change.
+
+2007-04-19 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
+ Thumb-1. Add sanity check for bogus relaxations.
+
+2007-04-19 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.
+
+2007-04-19 Alan Modra <amodra@bigpond.net.au>
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
+
+ * doc/c-ppc.texi (PowerPC-Opts): Document -me500, -me500x2, -mspe.
+
+2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/c-i386.texi; Document .ssse3, .sse4.1, .sse4.2 and .sse4.
+
+2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
+ (match_template): Handle operand size for crc32 in SSE4.2.
+ (process_suffix): Handle operand type for crc32 in SSE4.2.
+ (output_insn): Support SSE4.2.
+
+2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .sse4.1.
+ (process_operands): Adjust implicit operand for blendvpd,
+ blendvps and pblendvb in SSE4.1.
+ (output_insn): Support SSE4.1.
+
+2007-04-18 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
+
+2007-04-16 Kaz Kojima <kkojima@rr.iij4u.or.jp>
+
+ * config/tc-sh.c (sh_handle_align): Call as_bad_where instead
+ of as_warn_where for misaligned data.
+
+2007-04-15 Kaz Kojima <kkojima@rr.iij4u.or.jp>
+
+ * config/tc-sh.c (align_test_frag_offset_fixed_p): Handle
+ rs_fill frags.
+
+2007-04-14 Steve Ellcey <sje@cup.hp.com>
+
+ * Makefile.am: Add ACLOCAL_AMFLAGS.
+ * Makefile.in: Regenerate.
+
+2007-04-14 Kaz Kojima <kkojima@rr.iij4u.or.jp>
+
+ * config/tc-sh.c (align_test_frag_offset_fixed_p): New.
+ (sh_optimize_expr): Likewise.
+ * config/tc-sh.h (md_optimize_expr): Define.
+ (sh_optimize_expr): Prototype.
+
+2007-04-06 Matt Thomas <matt@netbsd.org>
+
+ * config/tc-vax.c (vax_cons): Added to support %pcrel{8,16,32}(exp)
+ to emit pcrel relocations by DWARF2 in non-code sections. Borrowed
+ heavily from tc-sparc.c. (vax_cons_fix_new): Likewise.
+
+2007-04-04 Kazu Hirata <kazu@codesourcery.com>
+
+ * config/tc-m68k.c (HAVE_LONG_BRANCH): Add fido_a.
+
+2007-04-04 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_neon_ext): Enforce immediate range.
+ (insns): Use I15 for vext.
+
+2007-04-04 Paul Brook <paul@codesourcery.com>
+
+ * configure.tgt: Loosen checks for arm uclinux eabi targets.
+
+2007-04-02 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xtensa_flush_pending_output): Check
+ outputting_stabs_line_debug.
+
+2007-03-26 Anatoly Sokolov <aesok@post.ru>
+
+ * config/tc-avr.c (mcu_types): Add support for at90pwm1, at90usb82,
+ at90usb162, atmega325p, atmega329p, atmega3250p and atmega3290p
+ devices.
+ * doc/c-avr.texi: Document new devices.
+
+2007-04-02 Richard Sandiford <richard@codesourcery.com>
+
+ * doc/as.texinfo: Add -mvxworks-pic to the list of MIPS options.
+ * doc/c-mips.texi (-KPIC, -mvxworks-pic): Document.
+ * config/tc-mips.c (md_show_usage): Mention -mvxworks-pic.
+
+2007-03-30 Sterling Augustine <sterling@tensilica.com>
+ Bob Wilson <bob.wilson@acm.org>
+
+ * config/tc-xtensa.c (xtensa_move_labels): Remove loops_ok argument.
+ Do not check is_loop_target flag.
+ (xtensa_frob_label): Adjust calls to xtensa_move_labels.
+ (xg_assemble_vliw_tokens): Likewise. Also avoid calling
+ xtensa_move_labels for alignment of loop opcodes.
+
+2007-03-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Reindent a bit.
+
+2007-03-30 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (encode_thumb2_ldmstm): New function.
+ (do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm.
+ (do_t_push_pop): Use encode_thumb2_ldmstm.
+
+2007-03-29 DJ Delorie <dj@redhat.com>
+
+ * config/tc-m32c.c (rl_for, relaxable): Protect argument.
+ (md_relax_table): Add entries for ADJNZ macros.
+ (M32C_Macros): Add ADJNZ macros.
+ (subtype_mappings): Add entries for ADJNZ macros.
+ (insn_to_subtype): Check for adjnz and sbjnz insns.
+ (md_estimate_size_before_relax): Pass insn to insn_to_subtype.
+ (md_convert_frag): Convert adjnz and sbjnz.
+
+2007-03-29 Nick Clifton <nickc@redhat.com>
+
+ * itbl-ops.c (itbl_entry): Remove unnecessary and excessively long
+ initialization.
+ * itbl-ops.h (enum e_processor): Initialise the e_nprocs field
+ using ITBL_NUMBER_OF_PROCESSORS.
+ * itbl-parse.y (yyerror): Remove use of redundant macro PARAMS.
+
+2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_modrm_byte): For instructions with 2
+ register operands, encode destination in i.rm.regmem if its
+ RegMem bit is set.
+
+2007-03-28 Richard Sandiford <richard@codesourcery.com>
+ Phil Edwards <phil@codesourcery.com>
+
+ * doc/as.texinfo: Put the contents after the title page rather
+ than at the end of the document.
+
+2007-03-27 Alan Modra <amodra@bigpond.net.au>
+
+ * NEWS: Mention ".reloc".
+
+2007-03-26 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xg_translate_idioms): Allow assembly idioms
+ in FLIX instructions.
+
+2007-03-26 Julian Brown <julian@codesourcery.com>
+
+ * config/tc-arm.c (arm_it): Add immisfloat field.
+ (parse_qfloat_immediate): Disallow integer syntax for floating-point
+ immediates. Fix hex immediates, handle 0.0 and -0.0 specially.
+ (parse_neon_mov): Set immisfloat bit for operand if it parsed as a
+ float.
+ (neon_cmode_for_move_imm): Reject non-float immediates for float
+ operands.
+ (neon_move_immediate): Pass immisfloat bit to neon_cmode_for_move_imm.
+
+2007-03-26 Julian Brown <julian@codesourcery.com>
+
+ * doc/c-arm.texi: Add documentation for .dn/.qn directives.
+
+2007-03-26 Alan Modra <amodra@bigpond.net.au>
+
+ * doc/as.texinfo (Reloc): Document.
+ * read.c (potable): Add "reloc".
+ (s_reloc): New function.
+ * write.c (reloc_list): New global var.
+ (resolve_reloc_expr_symbols): New function.
+ (write_object_file): Call it.
+ (write_relocs): Process reloc_list.
+ * write.h (struct reloc_list): New.
+ (reloc_list): Declare.
+
+2007-03-24 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_t_ldmstm): Error on Thumb-2 addressing modes.
+
+2007-03-24 Paul Brook <paul@codesourcery.com>
+ Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/tc-arm.c (operand_parse_code): Add OP_oRRw.
+ (parse_operands): Don't expect comma if first operand missing.
+ Handle OP_oRRw.
+ (do_srs): Encode register number, checking it is r13. Update comment.
+ (insns): Update SRS entries to take a register.
+
+2007-03-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_begin): Allow '.' in mnemonic.
+
+2007-03-23 Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/tc-arm.c (md_apply_fix): Turn CBZ instructions that
+ attempt to jump to the next instruction into NOPs.
+
+2007-03-23 Alan Modra <amodra@bigpond.net.au>
+
+ * config/tc-spu.c: Don't include opcode/spu.h.
+ (md_assemble): Set tc_fix_data.insn_tag and arg_format.
+ (md_apply_fix): Adjust.
+ * config/tc-spu.h: Include opcode/spu.h.
+ (struct tc_fix_info): New.
+ (TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
+ (TC_FORCE_RELOCATION): Define.
+
+2007-03-22 Joseph Myers <joseph@codesourcery.com>
+
+ * doc/as.texinfo: Include VERSION_PACKAGE when reporting version.
+
+2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (process_suffix): Check 0x90 instead of
+ xchg for xchg %rax,%rax.
+
+2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
+ and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
+
+2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/4218
+ * config/tc-i386.c (match_template): Properly handle 64bit mode
+ "xchg %eax, %eax".
+
+2007-03-21 Anton Ertl <anton@mips.complang.tuw>
+
+ PR gas/4124
+ * config/tc-alpha.c (emit_ustX): Fix ustq code generation.
+
2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run dep-am.
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