; P1.0 - led1 red
; P1.1 - led2 green
+; PORTx default wanted state : pins as input with pullup resistor
+
+ BIS #3,&PADIR ; all pins 0 as input else LEDs
+ MOV #0FFFCh,&PAOUT ; all pins high else LEDs
+ BIC #3,&PAREN ; all pins 1 with pull resistors else LEDs
+
+
; PORT2 FastForth usage
-Deep_RST_IN .equ P2IN ; TERMINAL TX pin as FORTH Deep_RST
-Deep_RST .equ 1 ; P2.0 = TX
-TERM_TXRX .equ 003h ; P2.1 = RX
+ .IFDEF UCB0_SD
+SD_SEL .equ PASEL1 ; to configure UCB0
+SD_REN .equ PAREN ; to configure pullup resistors
+SD_BUS .equ 04C0h ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
+ .ENDIF
+
+ .IFDEF UCA0_TERM
+; P2.0 UCA0-TXD --> USB2UART RXD
+; P2.1 UCA0-RXD <-- USB2UART TXD
+TXD .equ 1 ; P2.0 = TXD + FORTH Deep_RST pin
+RXD .equ 2 ; P2.1 = RXD
+TERM_BUS .equ 3
+TERM_IN .equ P2IN
TERM_SEL .equ P2SEL1
TERM_REN .equ P2REN
+ .ENDIF
-; PORTx default wanted state : pins as input with pullup resistor
+ .IFDEF UCA1_TERM
+; P2.5 UCA0-TXD --> USB2UART RXD
+; P2.6 UCA0-RXD <-- USB2UART TXD
+TXD .equ 20h ; P2.5 = TXD + FORTH Deep_RST pin
+RXD .equ 40h ; P2.6 = RXD
+TERM_BUS .equ 60h
+TERM_IN .equ P2IN
+TERM_SEL .equ P2SEL1
+TERM_REN .equ P2REN
+ .ENDIF
- BIS #3,&PADIR ; all pins 0 as input else LEDs
- MOV #0FFFCh,&PAOUT ; all pins high else LEDs
- BIC #3,&PAREN ; all pins 1 with pull resistors else LEDs
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
; PORT3 FastForth usage
; PORT4 FastForth usage
+SD_CS .equ 1 ; P4.0 as SD_CS
+SD_CSOUT .equ P4OUT
+SD_CSDIR .equ P4DIR
- .IFDEF TERMINALCTSRTS
+
+ .IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; CTS is not used by FORTH terminal
; configure RTS as output high to disable RX TERM during start FORTH
-RTS .equ 4 ; P4.2
-;CTS .equ 8 ; P4.3
HANDSHAKOUT .equ P4OUT
HANDSHAKIN .equ P4IN
- BIS #00400h,&PBDIR ; all pins as input else P4.2
+
+RTS .equ 4 ; P4.2
+
+ BIS #00400h,&PBDIR ; all pins as input else P4.2 (RTS)
BIS #-1,&PBREN ; all input pins with resistor
- MOV #-1,&PBOUT ; that acts as pull up, and P4.2 as output HIGH
+
+ .IFDEF TERMINAL5WIRES
+
+CTS .equ 8 ; P4.3
+
+ MOV #0F7FFh,&PBOUT ; P4.2 (RTS) as output HIGH, P4.3 (CTS) I pull down, others I pull up,
.ELSEIF
+ MOV #-1,&PBOUT ; P4.2 (RTS) as output HIGH, others I pull up,
+
+ .ENDIF ; TERMINAL5WIRES
+
+ .ELSEIF
+
; PORTx default wanted state : pins as input with pullup resistor
MOV #-1,&PBOUT ; OUT1
BIS #-1,&PBREN ; REN1 all pullup resistors
- .ENDIF
+ .ENDIF ; TERMINAL4WIRES
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT5/6
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
; PORT5 FastForth usage
-; P5.6 Switch S1 used for hard reset (WIPE+COLD)
+; P5.6 Switch S1
; P5.5 Switch S2
SWITCHIN .set P5IN ; port
s1 .set 020h ; P5.5 bit position
+ .IFDEF UCB1_SD
+SD_SEL .equ PCSEL1 ; to configure UCB0
+SD_REN .equ PCREN ; to configure pullup resistors
+SD_BUS .equ 0007h ; pins P5.2 as UCB1CLK, P5.0 as UCB1SIMO & P5.1 as UCB1SOMI
+ .ENDIF
+
; PORT6 FastForth usage
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
; PORT7 FastForth usage
+SD_CD .equ 4 ; P7.2 as SD_CD
+SD_CDIN .equ P7IN
+
; PORT8 FastForth usage
; ----------------------------------------------------------------------
; DCOCLK: Internal digitally controlled oscillator (DCO).
-; Startup clock system in max. DCO setting ~8MHz
-; CS code for MSP430FR5969
+; CS code for MSP430FR5948
MOV.B #CSKEY,&CSCTL0_H ; Unlock CS registers
.IF FREQUENCY = 0.25
.ELSEIF FREQUENCY = 0.5
MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
MOV #DIVA_2 + DIVS_2 + DIVM_2,&CSCTL3 ; set all dividers as 2
- MOV #4,X
+ MOV #8,X
.ELSEIF FREQUENCY = 1
MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
- MOV #8,X
+ MOV #16,X
.ELSEIF FREQUENCY = 2
MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3
- MOV #16,X
+ MOV #32,X
.ELSEIF FREQUENCY = 4
MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
- MOV #32,X
+ MOV #64,X
.ELSEIF FREQUENCY = 8
; MOV #DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 8MHZ DCO setting (default value)
MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
- MOV #64,X
+ MOV #128,X
.ELSEIF FREQUENCY = 16
MOV #DCORSEL+DCOFSEL2,&CSCTL1 ; Set 16MHZ DCO setting
MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
- MOV #128,X
+ MOV #256,X
.ELSEIF
.error "bad frequency setting, only 0.5,1,2,4,8,16 MHz"
CMP #2,&SAVE_SYSRSTIV ; POWER ON ?
JZ ClockWaitX ; yes
.word 0759h ; no RRUM #2,X --> wait only 125 ms
-ClockWaitX MOV #41666,Y ; wait 0.5s before starting after POWER ON
-ClockWaitY SUB #1,Y ;
- JNZ ClockWaitY ; 41666x3 = 125000 cycles delay = 125ms @ 1MHz
- SUB #1,X ; x 4 @ 1 MHZ
- JNZ ClockWaitX ; time to stabilize power source ( 1s )
+ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POWER ON
+ClockWaitY SUB #1,Y ;1
+ JNZ ClockWaitY ;2 5209x3 = 15625 cycles delay = 15.625ms @ 1MHz
+ SUB #1,X ; x 32 @ 1 MHZ = 500ms
+ JNZ ClockWaitX ; time to stabilize power source ( 500ms )
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : REF
MOV #8, &REFCTL
; ----------------------------------------------------------------------
-; POWER ON RESET AND INITIALIZATION : RTC REGISTERS
+; POWER ON RESET AND INITIALIZATION : RTC_C REGISTERS
; ----------------------------------------------------------------------
.IFDEF LF_XTAL
; LFXIN : PJ.4, LFXOUT : PJ.5
BIS.B #010h,&PJSEL0 ; SEL0 for only LFXIN
- BIC.B #RTCHOLD,&RTCCTL1 ; Clear RTCHOLD = start RTC_B
+ MOV.B #0A5h,&RTCCTL0_H ; unlock RTC_C
+ BIC.B #RTCHOLD,&RTCCTL1 ; Clear RTCHOLD = start RTC_C
.ENDIF
; ----------------------------------------------------------------------
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