* config/i386/i386-aout.h, config/i386/i386-coff.h,

[pf3gnuchains/gcc-fork.git] / gcc / config / i386 / i386.h

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 8677875..c3d4507 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1,21 +1,21 @@
-/* Definitions of target machine for GNU compiler for IA-32.
+/* Definitions of target machine for GCC for IA-32.

    Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
    2001, 2002, 2003 Free Software Foundation, Inc.
 
    Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
    2001, 2002, 2003 Free Software Foundation, Inc.
 

-This file is part of GNU CC.
+This file is part of GCC.

 
 

-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify

 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2, or (at your option)
 any later version.
 
 it under the terms of the GNU General Public License as published by
 the Free Software Foundation; either version 2, or (at your option)
 any later version.
 

-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,

 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License

-along with GNU CC; see the file COPYING.  If not, write to
+along with GCC; see the file COPYING.  If not, write to

 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 


@@ -97,8 +97,12 @@ extern int target_flags;
 /* configure can arrange to make this 2, to force a 486.  */
 
 #ifndef TARGET_CPU_DEFAULT
 /* configure can arrange to make this 2, to force a 486.  */
 
 #ifndef TARGET_CPU_DEFAULT

+#ifdef TARGET_64BIT_DEFAULT
+#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8
+#else

 #define TARGET_CPU_DEFAULT 0
 #endif
 #define TARGET_CPU_DEFAULT 0
 #endif

+#endif

 
 /* Masks for the -m switches */
 #define MASK_80387             0x00000001      /* Hardware floating point */
 
 /* Masks for the -m switches */
 #define MASK_80387             0x00000001      /* Hardware floating point */


@@ -117,11 +121,13 @@ extern int target_flags;
 #define MASK_MMX               0x00002000      /* Support MMX regs/builtins */
 #define MASK_SSE               0x00004000      /* Support SSE regs/builtins */
 #define MASK_SSE2              0x00008000      /* Support SSE2 regs/builtins */
 #define MASK_MMX               0x00002000      /* Support MMX regs/builtins */
 #define MASK_SSE               0x00004000      /* Support SSE regs/builtins */
 #define MASK_SSE2              0x00008000      /* Support SSE2 regs/builtins */

-#define MASK_3DNOW             0x00010000      /* Support 3Dnow builtins */
-#define MASK_3DNOW_A           0x00020000      /* Support Athlon 3Dnow builtins */
-#define MASK_128BIT_LONG_DOUBLE 0x00040000     /* long double size is 128bit */
-#define MASK_64BIT             0x00080000      /* Produce 64bit code */
-#define MASK_MS_BITFIELD_LAYOUT 0x00100000     /* Use native (MS) bitfield layout */
+#define MASK_PNI               0x00010000      /* Support PNI regs/builtins */
+#define MASK_3DNOW             0x00020000      /* Support 3Dnow builtins */
+#define MASK_3DNOW_A           0x00040000      /* Support Athlon 3Dnow builtins */
+#define MASK_128BIT_LONG_DOUBLE 0x00080000     /* long double size is 128bit */
+#define MASK_64BIT             0x00100000      /* Produce 64bit code */
+#define MASK_MS_BITFIELD_LAYOUT 0x00200000     /* Use native (MS) bitfield layout */
+#define MASK_TLS_DIRECT_SEG_REFS 0x00400000    /* Avoid adding %gs:0  */

 
 /* Unused:                     0x03e0000       */
 
 
 /* Unused:                     0x03e0000       */
 


@@ -201,6 +207,9 @@ extern int target_flags;
 #endif
 #endif
 
 #endif
 #endif
 

+/* Avoid adding %gs:0 in TLS references; use %gs:address directly.  */
+#define TARGET_TLS_DIRECT_SEG_REFS (target_flags & MASK_TLS_DIRECT_SEG_REFS)
+

 #define TARGET_386 (ix86_tune == PROCESSOR_I386)
 #define TARGET_486 (ix86_tune == PROCESSOR_I486)
 #define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM)
 #define TARGET_386 (ix86_tune == PROCESSOR_I386)
 #define TARGET_486 (ix86_tune == PROCESSOR_I486)
 #define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM)


@@ -292,8 +301,9 @@ extern int x86_prefetch_sse;
 
 #define ASSEMBLER_DIALECT (ix86_asm_dialect)
 
 
 #define ASSEMBLER_DIALECT (ix86_asm_dialect)
 

-#define TARGET_SSE ((target_flags & (MASK_SSE | MASK_SSE2)) != 0)
+#define TARGET_SSE ((target_flags & MASK_SSE) != 0)

 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)
 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)

+#define TARGET_PNI ((target_flags & MASK_PNI) != 0)

 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
                             && (ix86_fpmath & FPMATH_387))
 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
                             && (ix86_fpmath & FPMATH_387))


@@ -389,6 +399,10 @@ extern int x86_prefetch_sse;
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",                  -MASK_SSE2,                                  \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",                  -MASK_SSE2,                                  \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \

+  { "pni",                      MASK_PNI,                                    \
+    N_("Support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
+  { "no-pni",                   -MASK_PNI,                                   \
+    N_("Do not support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\

   { "128bit-long-double",       MASK_128BIT_LONG_DOUBLE,                     \
     N_("sizeof(long double) is 16") },                                       \
   { "96bit-long-double",       -MASK_128BIT_LONG_DOUBLE,                     \
   { "128bit-long-double",       MASK_128BIT_LONG_DOUBLE,                     \
     N_("sizeof(long double) is 16") },                                       \
   { "96bit-long-double",       -MASK_128BIT_LONG_DOUBLE,                     \


@@ -405,12 +419,21 @@ extern int x86_prefetch_sse;
     N_("Use red-zone in the x86-64 code") },                                 \
   { "no-red-zone",             MASK_NO_RED_ZONE,                             \
     N_("Do not use red-zone in the x86-64 code") },                          \
     N_("Use red-zone in the x86-64 code") },                                 \
   { "no-red-zone",             MASK_NO_RED_ZONE,                             \
     N_("Do not use red-zone in the x86-64 code") },                          \

+  { "tls-direct-seg-refs",     MASK_TLS_DIRECT_SEG_REFS,                     \
+    N_("Use direct references against %gs when accessing tls data") },       \
+  { "no-tls-direct-seg-refs",  -MASK_TLS_DIRECT_SEG_REFS,                    \
+    N_("Do not use direct references against %gs when accessing tls data") }, \

   SUBTARGET_SWITCHES                                                         \
   SUBTARGET_SWITCHES                                                         \

-  { "", TARGET_DEFAULT | TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_DEFAULT, 0 }}
+  { "",                                                                              \
+    TARGET_DEFAULT | TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_DEFAULT         \
+    | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT, 0 }}

 
 #ifndef TARGET_64BIT_DEFAULT
 #define TARGET_64BIT_DEFAULT 0
 #endif
 
 #ifndef TARGET_64BIT_DEFAULT
 #define TARGET_64BIT_DEFAULT 0
 #endif

+#ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT
+#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0
+#endif

 
 /* Once GDB has been enhanced to deal with functions without frame
    pointers, we can change this to allow for elimination of
 
 /* Once GDB has been enhanced to deal with functions without frame
    pointers, we can change this to allow for elimination of


@@ -433,34 +456,34 @@ extern int x86_prefetch_sse;
    by appending `-m' to the specified name.  */
 #define TARGET_OPTIONS                                         \
 { { "tune=",           &ix86_tune_string,                      \
    by appending `-m' to the specified name.  */
 #define TARGET_OPTIONS                                         \
 { { "tune=",           &ix86_tune_string,                      \

-    N_("Schedule code for given CPU")},                                \
+    N_("Schedule code for given CPU"), 0},                     \

   { "fpmath=",         &ix86_fpmath_string,                    \
   { "fpmath=",         &ix86_fpmath_string,                    \

-    N_("Generate floating point mathematics using given instruction set")},\
+    N_("Generate floating point mathematics using given instruction set"), 0},\

   { "arch=",           &ix86_arch_string,                      \
   { "arch=",           &ix86_arch_string,                      \

-    N_("Generate code for given CPU")},                                \
+    N_("Generate code for given CPU"), 0},                     \

   { "regparm=",                &ix86_regparm_string,                   \
   { "regparm=",                &ix86_regparm_string,                   \

-    N_("Number of registers used to pass integer arguments") },        \
+    N_("Number of registers used to pass integer arguments"), 0},\

   { "align-loops=",    &ix86_align_loops_string,               \
   { "align-loops=",    &ix86_align_loops_string,               \

-    N_("Loop code aligned to this power of 2") },              \
+    N_("Loop code aligned to this power of 2"), 0},            \

   { "align-jumps=",    &ix86_align_jumps_string,               \
   { "align-jumps=",    &ix86_align_jumps_string,               \

-    N_("Jump targets are aligned to this power of 2") },       \
+    N_("Jump targets are aligned to this power of 2"), 0},     \

   { "align-functions=",        &ix86_align_funcs_string,               \
   { "align-functions=",        &ix86_align_funcs_string,               \

-    N_("Function starts are aligned to this power of 2") },    \
+    N_("Function starts are aligned to this power of 2"), 0},  \

   { "preferred-stack-boundary=",                               \
     &ix86_preferred_stack_boundary_string,                     \
   { "preferred-stack-boundary=",                               \
     &ix86_preferred_stack_boundary_string,                     \

-    N_("Attempt to keep stack aligned to this power of 2") },  \
+    N_("Attempt to keep stack aligned to this power of 2"), 0},        \

   { "branch-cost=",    &ix86_branch_cost_string,               \
   { "branch-cost=",    &ix86_branch_cost_string,               \

-    N_("Branches are this expensive (1-5, arbitrary units)") },        \
+    N_("Branches are this expensive (1-5, arbitrary units)"), 0},\

   { "cmodel=", &ix86_cmodel_string,                            \
   { "cmodel=", &ix86_cmodel_string,                            \

-    N_("Use given x86-64 code model") },                       \
+    N_("Use given x86-64 code model"), 0},                     \

   { "debug-arg", &ix86_debug_arg_string,                       \
   { "debug-arg", &ix86_debug_arg_string,                       \

-    "" /* Undocumented. */ },                                  \
+    "" /* Undocumented. */, 0},                                        \

   { "debug-addr", &ix86_debug_addr_string,                     \
   { "debug-addr", &ix86_debug_addr_string,                     \

-    "" /* Undocumented. */ },                                  \
+    "" /* Undocumented. */, 0},                                        \

   { "asm=", &ix86_asm_string,                                  \
   { "asm=", &ix86_asm_string,                                  \

-    N_("Use given assembler dialect") },                       \
+    N_("Use given assembler dialect"), 0},                     \

   { "tls-dialect=", &ix86_tls_dialect_string,                  \
   { "tls-dialect=", &ix86_tls_dialect_string,                  \

-    N_("Use given thread-local storage dialect") },            \
+    N_("Use given thread-local storage dialect"), 0},          \

   SUBTARGET_OPTIONS                                            \
 }
 
   SUBTARGET_OPTIONS                                            \
 }
 


@@ -483,6 +506,12 @@ extern int x86_prefetch_sse;
 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
   optimization_options ((LEVEL), (SIZE))
 
 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
   optimization_options ((LEVEL), (SIZE))
 

+/* Support for configure-time defaults of some command line options.  */
+#define OPTION_DEFAULT_SPECS \
+  {"arch", "%{!march=*:-march=%(VALUE)}"}, \
+  {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \
+  {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }
+

 /* Specs for the compiler proper */
 
 #ifndef CC1_CPU_SPEC
 /* Specs for the compiler proper */
 
 #ifndef CC1_CPU_SPEC


@@ -517,9 +546,12 @@ extern int x86_prefetch_sse;
       if (TARGET_64BIT)                                                \
        {                                                       \
          builtin_assert ("cpu=x86_64");                        \
       if (TARGET_64BIT)                                                \
        {                                                       \
          builtin_assert ("cpu=x86_64");                        \

-         builtin_assert ("machine=x86_64");                    \
+         builtin_define ("__amd64");                           \
+         builtin_define ("__amd64__");                         \

          builtin_define ("__x86_64");                          \
          builtin_define ("__x86_64__");                        \
          builtin_define ("__x86_64");                          \
          builtin_define ("__x86_64__");                        \

+         builtin_define ("__amd64");                           \
+         builtin_define ("__amd64__");                         \

        }                                                       \
       else                                                     \
        {                                                       \
        }                                                       \
       else                                                     \
        {                                                       \


@@ -585,6 +617,8 @@ extern int x86_prefetch_sse;
        builtin_define ("__SSE__");                             \
       if (TARGET_SSE2)                                         \
        builtin_define ("__SSE2__");                            \
        builtin_define ("__SSE__");                             \
       if (TARGET_SSE2)                                         \
        builtin_define ("__SSE2__");                            \

+      if (TARGET_PNI)                                          \
+       builtin_define ("__PNI__");                             \

       if (TARGET_SSE_MATH && TARGET_SSE)                       \
        builtin_define ("__SSE_MATH__");                        \
       if (TARGET_SSE_MATH && TARGET_SSE2)                      \
       if (TARGET_SSE_MATH && TARGET_SSE)                       \
        builtin_define ("__SSE_MATH__");                        \
       if (TARGET_SSE_MATH && TARGET_SSE2)                      \


@@ -672,7 +706,7 @@ extern int x86_prefetch_sse;
    definition is an initializer with a subgrouping for each command option.
 
    Each subgrouping contains a string constant, that defines the
    definition is an initializer with a subgrouping for each command option.
 
    Each subgrouping contains a string constant, that defines the

-   specification name, and a string constant that used by the GNU CC driver
+   specification name, and a string constant that used by the GCC driver

    program.
 
    Do not define this macro if it does not need to do anything.  */
    program.
 
    Do not define this macro if it does not need to do anything.  */


@@ -704,7 +738,7 @@ extern int x86_prefetch_sse;
    the rounding precision is indeterminate, since either may be chosen
    apparently at random.  */
 #define TARGET_FLT_EVAL_METHOD \
    the rounding precision is indeterminate, since either may be chosen
    apparently at random.  */
 #define TARGET_FLT_EVAL_METHOD \

-  (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 1 : 2)
+  (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2)

 
 #define SHORT_TYPE_SIZE 16
 #define INT_TYPE_SIZE 32
 
 #define SHORT_TYPE_SIZE 16
 #define INT_TYPE_SIZE 32


@@ -1085,10 +1119,13 @@ do {                                                                    \
            && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL))     \
         || ((MODE1) == DImode && TARGET_64BIT))                        \
        && ((MODE2) == HImode || (MODE2) == SImode              \
            && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL))     \
         || ((MODE1) == DImode && TARGET_64BIT))                        \
        && ((MODE2) == HImode || (MODE2) == SImode              \

-          || ((MODE1) == QImode                                \
+          || ((MODE2) == QImode                                \

               && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL))  \
           || ((MODE2) == DImode && TARGET_64BIT))))
 
               && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL))  \
           || ((MODE2) == DImode && TARGET_64BIT))))
 

+/* It is possible to write patterns to move flags; but until someone
+   does it,  */
+#define AVOID_CCMODE_COPIES

 
 /* Specify the modes required to caller save a given hard regno.
    We do this on i386 to prevent flags from being saved at all.
 
 /* Specify the modes required to caller save a given hard regno.
    We do this on i386 to prevent flags from being saved at all.


@@ -1098,7 +1135,7 @@ do {                                                                      \
 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)                        \
   (CC_REGNO_P (REGNO) ? VOIDmode                                       \
    : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode                     \
 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)                        \
   (CC_REGNO_P (REGNO) ? VOIDmode                                       \
    : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode                     \

-   : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS))      \
+   : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false)\

    : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode            \
    : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode        \
    : (MODE))
    : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode            \
    : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode        \
    : (MODE))


@@ -1208,10 +1245,11 @@ do {                                                                    \
    should always be returned in memory.  You should instead use
    `DEFAULT_PCC_STRUCT_RETURN' to indicate this.  */
 
    should always be returned in memory.  You should instead use
    `DEFAULT_PCC_STRUCT_RETURN' to indicate this.  */
 

+int ix86_return_in_memory (tree type);

 #define RETURN_IN_MEMORY(TYPE) \
   ix86_return_in_memory (TYPE)
 
 #define RETURN_IN_MEMORY(TYPE) \
   ix86_return_in_memory (TYPE)
 

-/* This is overriden by <cygwin.h>.  */
+/* This is overridden by <cygwin.h>.  */

 #define MS_AGGREGATE_RETURN 0
 
 \f
 #define MS_AGGREGATE_RETURN 0
 
 \f


@@ -1803,11 +1841,8 @@ typedef struct ix86_args {
 #define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \
   ix86_va_arg ((VALIST), (TYPE))
 
 #define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) \
   ix86_va_arg ((VALIST), (TYPE))
 

-/* This macro is invoked at the end of compilation.  It is used here to
-   output code for -fpic that will load the return address into %ebx.  */
-
-#undef ASM_FILE_END
-#define ASM_FILE_END(FILE)  ix86_asm_file_end (FILE)
+#define TARGET_ASM_FILE_END ix86_file_end
+#define NEED_INDICATE_EXEC_STACK 0

 
 /* Output assembler code to FILE to increment profiler label # LABELNO
    for profiling a function entry.  */
 
 /* Output assembler code to FILE to increment profiler label # LABELNO
    for profiling a function entry.  */


@@ -2493,24 +2528,25 @@ enum ix86_builtins
   IX86_BUILTIN_MFENCE,
   IX86_BUILTIN_LFENCE,
 
   IX86_BUILTIN_MFENCE,
   IX86_BUILTIN_LFENCE,
 

+  /* Prescott New Instructions.  */
+  IX86_BUILTIN_ADDSUBPS,
+  IX86_BUILTIN_HADDPS,
+  IX86_BUILTIN_HSUBPS,
+  IX86_BUILTIN_MOVSHDUP,
+  IX86_BUILTIN_MOVSLDUP,
+  IX86_BUILTIN_ADDSUBPD,
+  IX86_BUILTIN_HADDPD,
+  IX86_BUILTIN_HSUBPD,
+  IX86_BUILTIN_LOADDDUP,
+  IX86_BUILTIN_MOVDDUP,
+  IX86_BUILTIN_LDDQU,
+
+  IX86_BUILTIN_MONITOR,
+  IX86_BUILTIN_MWAIT,
+

   IX86_BUILTIN_MAX
 };
 \f
   IX86_BUILTIN_MAX
 };
 \f

-#define TARGET_ENCODE_SECTION_INFO  ix86_encode_section_info
-#define TARGET_STRIP_NAME_ENCODING  ix86_strip_name_encoding
-
-#define ASM_OUTPUT_LABELREF(FILE,NAME)         \
-  do {                                         \
-    const char *xname = (NAME);                        \
-    if (xname[0] == '%')                       \
-      xname += 2;                              \
-    if (xname[0] == '*')                       \
-      xname += 1;                              \
-    else                                       \
-      fputs (user_label_prefix, FILE);         \
-    fputs (xname, FILE);                       \
-  } while (0)
-\f

 /* Max number of args passed in registers.  If this is more than 3, we will
    have problems with ebx (register #4), since it is a caller save register and
    is also used as the pic register in ELF.  So for now, don't allow more than
 /* Max number of args passed in registers.  If this is more than 3, we will
    have problems with ebx (register #4), since it is a caller save register and
    is also used as the pic register in ELF.  So for now, don't allow more than


@@ -2569,11 +2605,6 @@ enum ix86_builtins
    is done just by pretending it is already truncated.  */
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 
    is done just by pretending it is already truncated.  */
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 

-/* We assume that the store-condition-codes instructions store 0 for false
-   and some other value for true.  This is the value stored for true.  */
-
-#define STORE_FLAG_VALUE 1
-

 /* When a prototype says `char' or `short', really pass an `int'.
    (The 386 can't easily push less than an int.)  */
 
 /* When a prototype says `char' or `short', really pass an `int'.
    (The 386 can't easily push less than an int.)  */
 


@@ -2665,12 +2696,6 @@ do {                                                     \
 
 /* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */
 
 
 /* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */
 

-/* Define this macro to inhibit strength reduction of memory
-   addresses.  (On some machines, such strength reduction seems to do
-   harm rather than good.)  */
-
-/* #define DONT_REDUCE_ADDR */
-

 /* Define this macro if it is as good or better to call a constant
    function address than to call an address kept in a register.
 
 /* Define this macro if it is as good or better to call a constant
    function address than to call an address kept in a register.
 


@@ -2994,6 +3019,10 @@ do {                                             \
   {"const0_operand", {CONST_INT, CONST_DOUBLE}},                       \
   {"const1_operand", {CONST_INT}},                                     \
   {"const248_operand", {CONST_INT}},                                   \
   {"const0_operand", {CONST_INT, CONST_DOUBLE}},                       \
   {"const1_operand", {CONST_INT}},                                     \
   {"const248_operand", {CONST_INT}},                                   \

+  {"const_0_to_3_operand", {CONST_INT}},                               \
+  {"const_0_to_7_operand", {CONST_INT}},                               \
+  {"const_0_to_15_operand", {CONST_INT}},                              \
+  {"const_0_to_255_operand", {CONST_INT}},                             \

   {"incdec_operand", {CONST_INT}},                                     \
   {"mmx_reg_operand", {REG}},                                          \
   {"reg_no_sp_operand", {SUBREG, REG}},                                        \
   {"incdec_operand", {CONST_INT}},                                     \
   {"mmx_reg_operand", {REG}},                                          \
   {"reg_no_sp_operand", {SUBREG, REG}},                                        \


@@ -3040,6 +3069,8 @@ do {                                              \
   {"register_and_not_fp_reg_operand", {REG}},                          \
   {"zero_extended_scalar_load_operand", {MEM}},                                \
   {"vector_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}},           \
   {"register_and_not_fp_reg_operand", {REG}},                          \
   {"zero_extended_scalar_load_operand", {MEM}},                                \
   {"vector_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}},           \

+  {"no_seg_address_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
+                             LABEL_REF, SUBREG, REG, MEM, PLUS, MULT}},

 
 /* A list of predicates that do special things with modes, and so
    should not elicit warnings for VOIDmode match_operand.  */
 
 /* A list of predicates that do special things with modes, and so
    should not elicit warnings for VOIDmode match_operand.  */


@@ -3207,8 +3238,6 @@ enum fp_cw_mode {FP_CW_STORED, FP_CW_UNINITIALIZED, FP_CW_ANY};
    ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
 
 \f
    ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
 
 \f

-#define MACHINE_DEPENDENT_REORG(X) x86_machine_dependent_reorg(X)
-

 #define DLL_IMPORT_EXPORT_PREFIX '#'
 
 #define FASTCALL_PREFIX '@'
 #define DLL_IMPORT_EXPORT_PREFIX '#'
 
 #define FASTCALL_PREFIX '@'


@@ -3232,6 +3261,10 @@ struct machine_function GTY(())
 #define ix86_save_varrargs_registers (cfun->machine->save_varrargs_registers)
 #define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching)
 
 #define ix86_save_varrargs_registers (cfun->machine->save_varrargs_registers)
 #define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching)
 

+/* Control behavior of x86_file_start.  */
+#define X86_FILE_START_VERSION_DIRECTIVE false
+#define X86_FILE_START_FLTUSED false
+

 /*
 Local variables:
 version-control: t
 /*
 Local variables:
 version-control: t