-#define TARGET_SWITCHES \
-{ \
- {"apcs", ARM_FLAG_APCS_FRAME, "" }, \
- {"apcs-frame", ARM_FLAG_APCS_FRAME, \
- N_("Generate APCS conformant stack frames") }, \
- {"no-apcs-frame", -ARM_FLAG_APCS_FRAME, "" }, \
- {"poke-function-name", ARM_FLAG_POKE, \
- N_("Store function names in object code") }, \
- {"no-poke-function-name", -ARM_FLAG_POKE, "" }, \
- {"fpe", ARM_FLAG_FPE, "" }, \
- {"apcs-32", ARM_FLAG_APCS_32, \
- N_("Use the 32-bit version of the APCS") }, \
- {"apcs-26", -ARM_FLAG_APCS_32, \
- N_("Use the 26-bit version of the APCS") }, \
- {"apcs-stack-check", ARM_FLAG_APCS_STACK, "" }, \
- {"no-apcs-stack-check", -ARM_FLAG_APCS_STACK, "" }, \
- {"apcs-float", ARM_FLAG_APCS_FLOAT, \
- N_("Pass FP arguments in FP registers") }, \
- {"no-apcs-float", -ARM_FLAG_APCS_FLOAT, "" }, \
- {"apcs-reentrant", ARM_FLAG_APCS_REENT, \
- N_("Generate re-entrant, PIC code") }, \
- {"no-apcs-reentrant", -ARM_FLAG_APCS_REENT, "" }, \
- {"alignment-traps", ARM_FLAG_MMU_TRAPS, \
- N_("The MMU will trap on unaligned accesses") }, \
- {"no-alignment-traps", -ARM_FLAG_MMU_TRAPS, "" }, \
- {"short-load-bytes", ARM_FLAG_MMU_TRAPS, "" }, \
- {"no-short-load-bytes", -ARM_FLAG_MMU_TRAPS, "" }, \
- {"short-load-words", -ARM_FLAG_MMU_TRAPS, "" }, \
- {"no-short-load-words", ARM_FLAG_MMU_TRAPS, "" }, \
- {"soft-float", ARM_FLAG_SOFT_FLOAT, \
- N_("Use library calls to perform FP operations") }, \
- {"hard-float", -ARM_FLAG_SOFT_FLOAT, \
- N_("Use hardware floating point instructions") }, \
- {"big-endian", ARM_FLAG_BIG_END, \
- N_("Assume target CPU is configured as big endian") }, \
- {"little-endian", -ARM_FLAG_BIG_END, \
- N_("Assume target CPU is configured as little endian") }, \
- {"words-little-endian", ARM_FLAG_LITTLE_WORDS, \
- N_("Assume big endian bytes, little endian words") }, \
- {"thumb-interwork", ARM_FLAG_INTERWORK, \
- N_("Support calls between Thumb and ARM instruction sets") }, \
- {"no-thumb-interwork", -ARM_FLAG_INTERWORK, "" }, \
- {"abort-on-noreturn", ARM_FLAG_ABORT_NORETURN, \
- N_("Generate a call to abort if a noreturn function returns")}, \
- {"no-abort-on-noreturn", -ARM_FLAG_ABORT_NORETURN, "" }, \
- {"no-sched-prolog", ARM_FLAG_NO_SCHED_PRO, \
- N_("Do not move instructions into a function's prologue") }, \
- {"sched-prolog", -ARM_FLAG_NO_SCHED_PRO, "" }, \
- {"single-pic-base", ARM_FLAG_SINGLE_PIC_BASE, \
- N_("Do not load the PIC register in function prologues") }, \
- {"no-single-pic-base", -ARM_FLAG_SINGLE_PIC_BASE, "" }, \
- {"long-calls", ARM_FLAG_LONG_CALLS, \
- N_("Generate call insns as indirect calls, if necessary") }, \
- {"no-long-calls", -ARM_FLAG_LONG_CALLS, "" }, \
- {"thumb", ARM_FLAG_THUMB, \
- N_("Compile for the Thumb not the ARM") }, \
- {"no-thumb", -ARM_FLAG_THUMB, "" }, \
- {"arm", -ARM_FLAG_THUMB, "" }, \
- {"tpcs-frame", THUMB_FLAG_BACKTRACE, \
- N_("Thumb: Generate (non-leaf) stack frames even if not needed") }, \
- {"no-tpcs-frame", -THUMB_FLAG_BACKTRACE, "" }, \
- {"tpcs-leaf-frame", THUMB_FLAG_LEAF_BACKTRACE, \
- N_("Thumb: Generate (leaf) stack frames even if not needed") }, \
- {"no-tpcs-leaf-frame", -THUMB_FLAG_LEAF_BACKTRACE, "" }, \
- {"callee-super-interworking", THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \
- N_("Thumb: Assume non-static functions may be called from ARM code") }, \
- {"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \
- "" }, \
- {"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING, \
- N_("Thumb: Assume function pointers may go to non-Thumb aware code") }, \
- {"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING, \
- "" }, \
- {"cirrus-fix-invalid-insns", CIRRUS_FIX_INVALID_INSNS, \
- N_("Cirrus: Place NOPs to avoid invalid instruction combinations") }, \
- {"no-cirrus-fix-invalid-insns", -CIRRUS_FIX_INVALID_INSNS, \
- N_("Cirrus: Do not break up invalid instruction combinations with NOPs") },\
- SUBTARGET_SWITCHES \
- {"", TARGET_DEFAULT, "" } \
-}
-
-#define TARGET_OPTIONS \
-{ \
- {"cpu=", & arm_select[0].string, \
- N_("Specify the name of the target CPU"), 0}, \
- {"arch=", & arm_select[1].string, \
- N_("Specify the name of the target architecture"), 0}, \
- {"tune=", & arm_select[2].string, "", 0}, \
- {"fpe=", & target_fp_name, "" , 0}, \
- {"fp=", & target_fp_name, \
- N_("Specify the version of the floating point emulator"), 0},\
- {"structure-size-boundary=", & structure_size_string, \
- N_("Specify the minimum bit alignment of structures"), 0}, \
- {"pic-register=", & arm_pic_register_string, \
- N_("Specify the register to be used for PIC addressing"), 0} \
-}
-