2 SHARP X1 Emulator 'eX1'
3 SHARP X1twin Emulator 'eX1twin'
4 SHARP X1turbo Emulator 'eX1turbo'
5 SHARP X1turboZ Emulator 'eX1turboZ'
7 Author : Takeda.Toshiya
17 #include "../../emu.h"
18 #include "../device.h"
20 #define SIG_DISPLAY_VBLANK 0
21 #define SIG_DISPLAY_COLUMN40 1
22 #define SIG_DISPLAY_DETECT_VBLANK 2
23 #define SIG_DISPLAY_DISP 3
29 class DISPLAY : public DEVICE
32 #ifdef _X1TURBO_FEATURE
37 __DECL_ALIGNED(16) uint8_t vram_t[0x800];
38 __DECL_ALIGNED(16) uint8_t vram_a[0x800];
39 #ifdef _X1TURBO_FEATURE
40 __DECL_ALIGNED(16) uint8_t vram_k[0x800];
43 __DECL_ALIGNED(8) uint8_t pcg_b[256][8];
44 __DECL_ALIGNED(8) uint8_t pcg_r[256][8];
45 __DECL_ALIGNED(8) uint8_t pcg_g[256][8];
46 #ifdef _X1TURBO_FEATURE
47 __DECL_ALIGNED(16) uint8_t gaiji_b[128][16];
48 __DECL_ALIGNED(16) uint8_t gaiji_r[128][16];
49 __DECL_ALIGNED(16) uint8_t gaiji_g[128][16];
51 __DECL_ALIGNED(16) uint8_t font[0x800];
52 __DECL_ALIGNED(16) uint8_t kanji[0x4bc00];
54 uint8_t cur_code, cur_line;
56 int kaddr, kofs, kflag;
61 __DECL_ALIGNED(32) uint8_t pri[8][8]; // pri[cg][txt]
65 #ifdef _X1TURBO_FEATURE
80 __DECL_ALIGNED(32) struct {
86 #ifdef _X1TURBO_FEATURE
87 __DECL_ALIGNED(32) uint8_t text[400][640];
88 __DECL_ALIGNED(32) uint8_t cg[400][640];
89 __DECL_ALIGNED(32) uint8_t pri_line[400][8][8];
91 __DECL_ALIGNED(32) uint8_t dr_text[400][640];
92 __DECL_ALIGNED(32) uint8_t dr_cg[400][640];
93 __DECL_ALIGNED(32) uint8_t dr_pri_line[400][8][8];
95 __DECL_ALIGNED(32) uint8_t text[200][640+8];
96 __DECL_ALIGNED(32) uint8_t cg[200][640];
97 __DECL_ALIGNED(32) uint8_t pri_line[200][8][8];
99 __DECL_ALIGNED(32) uint8_t dr_text[200][640+8];
100 __DECL_ALIGNED(32) uint8_t dr_cg[200][640];
101 __DECL_ALIGNED(32) uint8_t dr_pri_line[200][8][8];
104 bool zpalette_changed;
105 __DECL_ALIGNED(32) uint16_t zcg[2][400][640];
106 __DECL_ALIGNED(16) bool aen_line[400];
107 __DECL_ALIGNED(32) scrntype_t zpalette_tmp[8+8+4096];
108 __DECL_ALIGNED(32) scrntype_t zpalette_pc[8+8+4096]; // 0-7:text, 8-15:cg, 16-:4096cg
110 __DECL_ALIGNED(32) uint16_t dr_zcg[2][400][640];
111 __DECL_ALIGNED(16) bool dr_aen_line[400];
112 __DECL_ALIGNED(32) scrntype_t dr_zpalette_pc[8+8+4096]; // 0-7:text, 8-15:cg, 16-:4096cg
114 __DECL_ALIGNED(16) scrntype_t palette_pc[8+8]; // 0-7:text, 8-15:cg
115 __DECL_ALIGNED(16) scrntype_t dr_palette_pc[8+8]; // 0-7:text, 8-15:cg
116 bool prev_vert_double;
119 int ch_height; // HD46505
120 int hz_total, hz_disp, vt_disp;
122 uint32_t vblank_clock;
128 uint8_t __FASTCALL get_cur_font(uint32_t addr);
129 void __FASTCALL get_cur_pcg(uint32_t addr);
130 void __FASTCALL get_cur_code_line();
132 void __FASTCALL draw_line(int v);
133 void __FASTCALL draw_text(int y);
134 void __FASTCALL draw_cg(int line, int plane);
137 int __FASTCALL get_zpal_num(uint32_t addr, uint32_t data);
138 void update_zpalette();
139 scrntype_t __FASTCALL get_zpriority(uint8_t text, uint16_t cg0, uint16_t cg1);
142 // kanji rom (from X1EMU by KM)
143 void __FASTCALL write_kanji(uint32_t addr, uint32_t data);
144 uint32_t __FASTCALL read_kanji(uint32_t addr);
146 uint16_t __FASTCALL jis2adr_x1(uint16_t jis);
147 uint32_t __FASTCALL adr2knj_x1(uint16_t adr);
148 #ifdef _X1TURBO_FEATURE
149 uint32_t __FASTCALL adr2knj_x1t(uint16_t adr);
151 uint32_t __FASTCALL jis2knj(uint16_t jis);
152 uint16_t __FASTCALL jis2sjis(uint16_t jis);
156 __DECL_ALIGNED(16) _bit_trans_table_t bit_trans_table_b0;
157 __DECL_ALIGNED(16) _bit_trans_table_t bit_trans_table_r0;
158 __DECL_ALIGNED(16) _bit_trans_table_t bit_trans_table_g0;
160 DISPLAY(VM_TEMPLATE* parent_vm, EMU_TEMPLATE* parent_emu) : DEVICE(parent_vm, parent_emu)
162 set_device_name(_T("Display"));
169 void __FASTCALL write_io8(uint32_t addr, uint32_t data);
170 uint32_t __FASTCALL read_io8(uint32_t addr);
171 void __FASTCALL write_signal(int id, uint32_t data, uint32_t mask);
173 void event_vline(int v, int clock);
174 #ifdef _X1TURBO_FEATURE
175 void __FASTCALL event_callback(int event_id, int err);
177 bool process_state(FILEIO* state_fio, bool loading);
180 #ifdef _X1TURBO_FEATURE
181 void set_context_cpu(DEVICE* device)
186 void set_context_crtc(HD46505* device)
190 void set_vram_ptr(uint8_t* ptr)
194 void set_regs_ptr(uint8_t* ptr)