1 # Testsuite for parallel port.
3 # Copyright (C) 1999 Red Hat
5 set test "sid configuration"
6 sid_config_component_test_with_tracing "parport.conf" \
7 "load [sid_find_file libparport.la] parport_component_library" \
11 set test "sid startup"
12 if {[sid_start "parport.conf"]} {
20 set test "acquire bus"
21 set bus [sid_cmd "sid::component::find_bus $victim Bus"]
28 # Lets check default values in registers
29 set test "Reading default PR reg. val 0"
30 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00"]
31 if {[lindex $result 0] == "ok" } {
32 if {[lindex $result 1] == 0x00 } { pass $test } else { fail $test }
34 fail "$test bus error"
37 # this default SR test is little risky as I am predicting input pin value
38 set test "Reading default SR reg val 0x07"
39 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
40 if {[lindex $result 0] == "ok" } {
41 if {[lindex $result 1] == 0x07 } {
47 fail "$test bus error"
50 set test "Reading default COM reg val 0xE0"
51 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x02"]
52 if {[lindex $result 0] == "ok" } {
53 if {[lindex $result 1] == 0xE0 } { pass $test } else { fail $test }
55 fail "$test bus error"
58 # testing the presence of 8 data lines.
59 for {set i 0} {$i < 8} {incr i} {
60 set test "Presence data pin $i"
61 set ip_dp($i) [sid_cmd "sid::component::find_pin $victim PD$i"]
62 if {$ip_dp($i) != "" } { pass $test } else { fail $test }
65 # creating 8 pins to be connected to the output of 8 data lines
66 set data_pin0 [sid_cmd "sid::pin::new"]
67 set data_pin1 [sid_cmd "sid::pin::new"]
68 set data_pin2 [sid_cmd "sid::pin::new"]
69 set data_pin3 [sid_cmd "sid::pin::new"]
70 set data_pin4 [sid_cmd "sid::pin::new"]
71 set data_pin5 [sid_cmd "sid::pin::new"]
72 set data_pin6 [sid_cmd "sid::pin::new"]
73 set data_pin7 [sid_cmd "sid::pin::new"]
75 sid_cmd "set op_dp(0) 0"
76 sid_cmd "set op_dp(1) 0"
77 sid_cmd "set op_dp(2) 0"
78 sid_cmd "set op_dp(3) 0"
79 sid_cmd "set op_dp(4) 0"
80 sid_cmd "set op_dp(5) 0"
81 sid_cmd "set op_dp(6) 0"
82 sid_cmd "set op_dp(7) 0"
84 # Driven methods for each newly created pin
85 sid_cmd "set hook_driven_h4($data_pin0) {
86 global driven_h4_value op_dp
87 if \[expr \$driven_h4_value == 0\] {
94 sid_cmd "set hook_driven_h4($data_pin1) {
95 global driven_h4_value op_dp
96 if \[expr \$driven_h4_value == 0\] {
103 sid_cmd "set hook_driven_h4($data_pin2) {
104 global driven_h4_value op_dp
105 if \[expr \$driven_h4_value == 0\] {
112 sid_cmd "set hook_driven_h4($data_pin3) {
113 global driven_h4_value op_dp
114 if \[expr \$driven_h4_value == 0\] {
121 sid_cmd "set hook_driven_h4($data_pin4) {
122 global driven_h4_value op_dp
123 if \[expr \$driven_h4_value == 0\] {
130 sid_cmd "set hook_driven_h4($data_pin5) {
131 global driven_h4_value op_dp
132 if \[expr \$driven_h4_value == 0\] {
139 sid_cmd "set hook_driven_h4($data_pin6) {
140 global driven_h4_value op_dp
141 if \[expr \$driven_h4_value == 0\] {
148 sid_cmd "set hook_driven_h4($data_pin7) {
149 global driven_h4_value op_dp
150 if \[expr \$driven_h4_value == 0\] {
157 # connecting pins to output data pins
158 sid_cmd "sid::component::connect_pin $victim PD0 $data_pin0"
159 sid_cmd "sid::component::connect_pin $victim PD1 $data_pin1"
160 sid_cmd "sid::component::connect_pin $victim PD2 $data_pin2"
161 sid_cmd "sid::component::connect_pin $victim PD3 $data_pin3"
162 sid_cmd "sid::component::connect_pin $victim PD4 $data_pin4"
163 sid_cmd "sid::component::connect_pin $victim PD5 $data_pin5"
164 sid_cmd "sid::component::connect_pin $victim PD6 $data_pin6"
165 sid_cmd "sid::component::connect_pin $victim PD7 $data_pin7"
167 # By default all data lines are in output mode.
168 # need to check whether I will get list or just var in case of write
169 foreach data { 0xFF 0xAB 0x00 } {
170 # Write to PR register
171 sid_assert_success "sid::bus::write_h4_l1 $bus 0 $data"
173 set test "reading PR register $data"
174 set r_result [sid_cmd "sid::bus::read_h4_l1 $bus 0"]
175 if { [lindex $r_result 0] == "ok" } {
176 if { [lindex $r_result 1] == $data } { pass $test} else {fail $test}
178 fail "$test (bus error)"
181 for {set i 0} { $i < 8 } {incr i} {
182 set test " op data pin $i val "
183 if { [expr $data & [expr 1 << $i ]] > 0 } {
188 set pin_val [sid_cmd "set op_dp($i)"]
189 if {$pin_val == $bit_val} { pass $test } else { fail $test }
193 # creating four pins to be connected to 4 output pins
194 set strobe_pin [sid_cmd "sid::pin::new"]
195 set autofdxt_pin [sid_cmd "sid::pin::new"]
196 set slctin_pin [sid_cmd "sid::pin::new"]
197 set init_pin [sid_cmd "sid::pin::new"]
199 sid_cmd "set hook_driven_h4($strobe_pin) {
200 global driven_h4_value op0
201 if \[expr \$driven_h4_value == 0\] {
208 sid_cmd "set hook_driven_h4($autofdxt_pin) {
209 global driven_h4_value op1
210 if \[expr \$driven_h4_value == 0\] {
217 sid_cmd "set hook_driven_h4($init_pin) {
218 global driven_h4_value op2
219 if \[expr \$driven_h4_value == 0\] {
226 sid_cmd "set hook_driven_h4($slctin_pin) {
227 global driven_h4_value op3
228 if \[expr \$driven_h4_value == 0\] {
235 # connecting newly created pin
236 set test " connected strobe pin"
237 set result [sid_cmd "sid::component::connect_pin $victim STROBE $strobe_pin"]
238 if { $result == "ok"} {pass $test} else {fail $test}
240 set test " connected autofdxt pin"
241 sid_cmd "sid::component::connect_pin $victim AUTOFDXT $autofdxt_pin"
242 if { $result == "ok"} {pass $test} else {fail $test}
244 set test " connected slctin pin"
245 sid_cmd "sid::component::connect_pin $victim SLCTIN $slctin_pin"
246 if { $result == "ok"} {pass $test} else {fail $test}
248 set test " connected init pin"
249 sid_cmd "sid::component::connect_pin $victim INIT $init_pin"
250 if { $result == "ok"} {pass $test} else {fail $test}
252 # setting global variables to default values
258 # lets write to CON register. Read COM & output pins
259 foreach data {0x1F 0xC6 0x00} {
260 # Writing to CON register
261 sid_assert_success "sid::bus::write_h4_l1 $bus 0x02 $data"
262 # Reading from COM register
263 set com_val [expr $data | 0xE0]
264 set test "reading COM register expect $com_val"
265 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x02"]
266 if {[lindex $result 0] == "ok" } {
269 fail "$test bus error"
271 set test " expected COM value $com_val "
272 if {[lindex $result 1] == $com_val } { pass $test } else { fail $test}
273 # Lets check output pins.
274 foreach pin_num {0 1 3} {
275 if {[expr $data & [expr 1 << $pin_num]] > 0 } {
280 set pin_val [sid_cmd "set op$pin_num"]
281 set test "Control op pin $pin_num"
282 if {$bit_val != $pin_val} { pass $test } else { fail $test }
284 if {[expr $data & [expr 1 << 2]] > 0 } { set bit_val 1} else {set bit_val 0}
285 set pin_val [sid_cmd "set op2"]
286 set test " Control op pin 2"
287 if {$bit_val == $pin_val} { pass $test } else {fail $test}
291 # Time to test inputs. This includes SR register & PR register in input mode.
292 # make sure to test PR register with iosel register & bit #5 of control
294 set test " get Error pin "
295 set ip(3) [sid_cmd "sid::component::find_pin $victim ERROR"]
296 if {$ip(3) != "" } { pass $test } else { fail $test }
298 set test " get SLCT pin "
299 set ip(4) [sid_cmd "sid::component::find_pin $victim SLCT"]
300 if {$ip(4) != "" } { pass $test } else { fail $test}
302 set test " get PE pin "
303 set ip(5) [sid_cmd "sid::component::find_pin $victim PE"]
304 if {$ip(5) != ""} { pass $test } else { fail $test }
306 set test " get ACK pin "
307 set ip(6) [sid_cmd "sid::component::find_pin $victim ACK"]
308 if {$ip(6) != "" } { pass $test } else { fail $test }
310 set test " get Busy pin "
311 set ip(7) [sid_cmd "sid::component::find_pin $victim BUSY"]
312 if {$ip(7) != "" } { pass $test } else { fail $test }
315 foreach data { 0xF8 0xC0 0x00 } {
316 for {set i 3} {$i < 8} {incr i} {
317 if { [expr $data & [expr 1 << $i]] > 0 } {
322 sid_cmd "sid::pin::driven_h4 $ip($i) $dr_val"
324 set test " Inspect SR reg expect val $data"
325 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
326 if {[lindex $result 0] == "ok"} {pass $test} else {fail "$test bus error"}
327 set reg_val [lindex $result 1]
328 if {[expr $reg_val & $SR_maskval] == $data } {
330 } else { fail " $test $reg_val" }
333 # make PR register value to 0
334 sid_assert_success "sid::bus::write_h4_l1 $bus 0x00 0x00"
336 # Lets set bit 5 of control register to make data lines in read mode.
337 sid_assert_success "sid::bus::write_h4_l1 $bus 0x02 0xE0"
340 set test "Save state"
341 set state1 [sid_cmd "sid::component::attribute_value $victim state-snapshot"]
342 if {$state1 != ""} {pass $test} else {fail $test}
344 # now we are in read mode. Lets try to write to PR register
345 set result [sid_cmd "sid::bus::write_h4_l1 $bus 0x00 0xFF"]
346 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00"]
347 set test " Read mode check write to PR register "
348 if { [lindex $result 0] == "ok" } { pass $test } else { fail "$test bus error"}
349 set test " Expecting read PR value 0x00 "
350 if { [lindex $result 1] == 0x00 } {
354 if { [lindex $result 1] == 0xFF } {
355 fail " Able to write in read mode Oops! "
359 for { set i 0 } { $i < 8 } { incr i } {
360 set pin_val [sid_cmd "set op_dp($i)"]
361 set test " op_dp($i) should be 0 "
362 if { $pin_val == 0 } { pass $test } else { fail $test }
365 # lets drive few values through data pins and see if PR register gets updated.
366 foreach data { 0xFF 0x33 0x00} {
367 for { set i 0 } { $i < 8 } { incr i } {
368 if {[expr $data & [expr 1 << $i]] > 0} {
373 sid_cmd "sid::pin::driven_h4 $ip_dp($i) $pin_val"
375 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00"]
376 set test " Read mode PR register "
377 if { [lindex $result 0] == "ok" } { pass $test } else { fail "$test bus" }
378 set test " Read mode PR reg value $data "
379 if {[lindex $result 1] == $data } { pass $test } else { fail $test }
382 set test " biden attribute value "
383 set result [sid_cmd "sid::component::attribute_value $victim BIDEN_VAL"]
384 if {$result == 1} { pass $test} else { fail $test }
386 set test "set biden to 0"
387 set result [sid_cmd "sid::component::set_attribute_value $victim BIDEN_VAL 0"]
388 if { $result == "ok" } { pass $test } else {fail $test }
390 # 2 cases write & read
391 # Theoretically I am in read mode because IOSEL register default value != 0x55
392 # lets drive few values through data pins and see if PR register gets updated.
393 foreach data { 0xAB 0x66 0x00} {
394 for { set i 0 } { $i < 8 } { incr i } {
395 if {[expr $data & [expr 1 << $i]] > 0 } {
400 sid_cmd "sid::pin::driven_h4 $ip_dp($i) $pin_val"
402 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00"]
403 set test " Read mode PR register iosel "
404 if {[lindex $result 0] == "ok" } { pass $test } else { fail $test }
405 set test " Read mode iosel PR reg value $data "
406 if {[lindex $result 1] == $data } { pass $test } else { fail $test }
409 set test " write iosel register with value 0xAA Read Mode"
410 sid_assert_success "sid::bus::write_h4_l1 $bus 0x01 0xAA"
412 # lets drive few values through data pins and see if PR register gets updated.
413 foreach data { 0xCC 0x44 0x00 0xAA} {
414 for { set i 0 } { $i < 8 } { incr i } {
415 if {[expr $data & [expr 1 << $i]] > 0 } {
420 sid_cmd "sid::pin::driven_h4 $ip_dp($i) $pin_val"
422 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00"]
423 set test " Read mode iosel0xAA PR register "
424 if {[lindex $result 0] == "ok" } { pass $test } else { fail $test }
425 set test " Read mode iosel0xAA PR reg value $data "
426 if {[lindex $result 1] == $data } { pass $test } else { fail $test }
431 set test "Save state"
432 set state2 [sid_cmd "sid::component::attribute_value $victim state-snapshot"]
433 if {$state2 != ""} {pass $test} else {fail $test}
435 set test "states are different"
436 if {[string compare $state1 $state2] != 0} {pass $test} else {fail $test}
438 #set test "restore state"
439 #set result [sid_cmd "sid::component::set_attribute_value $victim state-snapshot [list $state1]"]
440 #if {$result =="ok"} {pass $test} else {fail $test}
442 sid_assert_success "sid::bus::write_h4_l1 $bus 0x01 0x55"
445 foreach data { 0xEE 0xAA 0x00 } {
446 # Write to PR resgister
447 set test "writing PR register $data iosel 0x55"
448 sid_assert_success "sid::bus::write_h4_l1 $bus 0 $data"
450 set test " reading PR register iosel 0x55"
451 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0"]
452 if { [lindex $result 0] == "ok" } {
453 if { [lindex $result 1] == $data } { pass $test} else {fail $test}
455 fail "$test (bus error)"
458 for {set i 0} { $i < 8 } {incr i} {
459 set test "op data pin $i val iosel0x55"
460 if {[expr $data & [expr 1 << $i]] > 0} {
465 set pin_val [sid_cmd "set op_dp($i)"]
466 if { $bit_val == $pin_val } { pass $test } else { fail $test }
470 set test "restore state"
471 set result [sid_cmd "sid::component::set_attribute_value $victim state-snapshot [list $state1]"]
472 if {$result =="ok"} {pass $test} else {fail $test}
474 set test " test random regs after restore"
475 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x00" ]
476 if {[lindex $result 0] == "ok" } { pass $test } else { fail "$test bus err" }
477 if {[lindex $result 1] == 0x0 } { pass $test } else { fail $test }
479 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x02" ]
480 if {[lindex $result 0] == "ok" } { pass $test } else { fail "$test bus err" }
481 if {[lindex $result 1] == 0xE0 } { pass $test } else { fail $test }
483 # Time to test handshaking. One of the cool features of parallel port.
484 # lets make intsel 0. enable interrupt (bit #4 control register)
485 # now INTP pin & bit 2 of SR should follow ack.
486 set test " get intsel attr "
487 set result [sid_cmd "sid::component::attribute_value $victim INTSEL_VAL"]
488 if { $result != "" } { pass $test } else {fail $test}
490 set test " set intsel val to 0 "
491 set result [sid_cmd "sid::component::set_attribute_value $victim INTSEL_VAL 0"]
492 if { $result == "ok" } { pass $test } else { fail $test }
494 set test " set CON register bit 4 to 1 "
495 sid_assert_success "sid::bus::write_h4_l1 $bus 0x02 0xD0"
496 set test " read COM value expected 0xF0"
497 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x02" ]
498 if {[lindex $result 0] == "ok" } { pass $test } else { fail "$test bus err" }
499 if {[lindex $result 1] == 0xF0 } { pass $test } else { fail $test }
501 set intp_pin [sid_cmd "sid::pin::new"]
503 sid_cmd "set hook_driven_h4($intp_pin) {
504 global driven_h4_value intp_val
505 if \[expr \$driven_h4_value == 0\] {
511 sid_cmd "sid::component::connect_pin $victim INTP $intp_pin"
513 #driving input signal pins to 0
514 for {set i 3} {$i < 8} {incr i } {
515 sid_cmd "sid::pin::driven_h4 $ip($i) 0"
518 # time to send ack signals and see impact on intp & bit 2 SR register
519 foreach pin_val { 0 1 0 } {
520 sid_cmd "sid::pin::driven_h4 $ip(6) $pin_val"
521 set result [sid_cmd "set intp_val"]
522 set test " reading intp pin "
523 if { $result == $pin_val } { pass $test } else { fail $test }
524 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
525 set test " reading SR to see ack & bit 2 "
526 if {[lindex $result 0] == "ok" } { pass $test } else {fail "$test bus err"}
528 if {$pin_val != 0 } {
531 if {[lindex $result 1] == $exp_val } { pass $test } else { fail $test}
534 # enable INTP pin & put change ack to see latch mode.
535 # currently ack is low so setting intsel to 1 won't raise interrupt.
536 set test " set intsel value 1"
537 set result [sid_cmd "sid::component::set_attribute_value $victim INTSEL_VAL 1"]
538 if { $result == "ok" } { pass $test } else { fail $test }
539 set test " reading SR intsel 1"
540 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
541 if {[lindex $result 0] == "ok" } { pass $test } else { fail "$test bus error"}
542 if {[lindex $result 1] == 0x07 } { pass $test } else { fail $test }
544 sid_cmd "sid::pin::driven_h4 $ip(6) 1"
545 set result [sid_cmd "set intp_val"]
546 set test "ack high intsel 1"
547 if {$result == 0} { pass $test } else { fail $test }
548 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
549 if {[lindex $result 1] == 0x47 } { pass $test } else { fail $test }
551 # set ack low and raise interrupt
552 sid_cmd "sid::pin::driven_h4 $ip(6) 0"
553 set result [sid_cmd "set intp_val"]
554 set test "interrupt raised"
555 if {$result == 1} { pass $test } else { fail $test }
557 # once latch mode is set turn ack on/off intp should not respond to ack
558 foreach pin_val { 1 0 1 } {
559 sid_cmd "sid::pin::driven_h4 $ip(6) $pin_val"
560 set result [sid_cmd "set intp_val"]
561 set test " intp pin should remain 1"
562 if { $result == 1 } { pass $test } else { fail $test }
565 # read the SR register & see clearing intp pin.
566 set test "clearing interrupt"
567 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
568 if { [lindex $result 0] == "ok" } { pass $test} else { fail "$test bus err"}
569 set reg_val [lindex $result 1]
570 if { [expr $reg_val & [expr 1 << 2]] == 0 } { pass $test} else { fail $test }
572 # now bit 2 should go to one
573 set test " clearing interrupt bit 2 should be 1 "
574 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
575 if {[lindex $result 0] == "ok" } { pass $test} else { fail $test}
576 set reg_val [lindex $result 1]
577 if { [expr $reg_val & [expr 1 << 2]] != 0 } { pass $test} else { fail $test }
579 # put in latch mode and then disable interrupts, later set intsel 0
580 # send low ack raise interrupt
581 sid_cmd "sid::pin::driven_h4 $ip(6) 0"
582 set result [sid_cmd "set intp_val"]
583 set test " Again raised interrupt"
584 if {$result != 1} { fail $test} else {pass $test}
587 set test "disabling interrupt bit 5"
588 sid_assert_success "sid::bus::write_h4_l1 $bus 0x02 0xC0"
589 set result [sid_cmd "set intp_val"]
590 if {$result == 0} { pass $test} else {fail $test}
592 set test "setting intsel back to 0"
593 sid_cmd "sid::component::set_attribute_value $victim INTSEL_VAL 0"
594 sid_cmd "sid::pin::driven_h4 $ip(6) 1"
595 set result [sid_cmd "sid::bus::read_h4_l1 $bus 0x01"]
596 if {[lindex $result 1] == 0x47} {pass $test } else { fail $test }
599 if {[sid_stop]} { pass $test } else { fail $test ; return }
601 # zap temp file if tests were successful
603 if {$exit_status == "0"} {
604 file delete "parport.conf"