1 // arm.cxx - An implementation of the interrupt controller from the
2 // ARM PID7T development board. -*- C++ -*-
4 // Copyright (C) 1999, 2000 Red Hat.
5 // This file is part of SID and is licensed under the GPL.
6 // See the file COPYING.SID for conditions for redistribution.
8 // A more thorough description of this component may be found at
9 // <http://www.arm.com/Documentation/UserMans/rps/#int>.
13 #include "components.h"
20 armIntController::irq_src_driven(host_int_4 val, host_int_4 bit_num)
23 irq_pending |= 1 << bit_num;
25 irq_pending &= ~(1 << bit_num);
27 drive_irq_interrupts();
31 armIntController::fiq_src_driven(host_int_4 val, host_int_4 bit_num)
33 fiq_pending = (val > 0) ? 1 : 0;
35 drive_fiq_interrupts();
39 armIntController::irq_read_word(host_int_4 addr,
41 little_int_4& le_data)
48 data = irq_pending & irq_enabled;
60 return bus::unpermitted;
69 armIntController::fiq_read_word(host_int_4 addr,
71 little_int_4& le_data)
78 data = fiq_pending && fiq_enabled;
89 return bus::unpermitted;
98 armIntController::irq_write_word(host_int_4 addr,
100 little_int_4 le_data)
102 host_int_4 data = le_data;
111 irq_enabled &= ~data;
128 return bus::unpermitted;
130 return bus::unmapped;
132 // Some pending interrupts may now be enabled.
133 // Some may also now be disabled. Re-check.
139 armIntController::fiq_write_word(host_int_4 addr,
141 little_int_4 le_data)
143 host_int_4 data = le_data;
151 fiq_enabled &= ~data;
155 return bus::unpermitted;
157 return bus::unmapped;
159 // Some pending interrupts may now be enabled.
160 // Some may also now be disabled. Re-check.
165 #endif // SIDTARGET_ARM