1 /* CPU class elements for m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000 Red Hat, Inc.
7 This file is part of the Cygnus Simulators.
12 // This file is included in the middle of the cpu class struct.
16 // CPU state information.
22 /* general registers */
24 /* control registers */
40 // C++ register access function templates
41 #define current_cpu this
43 inline USI h_pc_get () const { return this->hardware.h_pc; }
44 inline void h_pc_set (USI newval) { this->hardware.h_pc = newval; }
46 inline SI h_gr_get (UINT regno) const { return this->hardware.h_gr[regno]; }
47 inline void h_gr_set (UINT regno, SI newval) { this->hardware.h_gr[regno] = newval; }
49 inline USI h_cr_get (UINT regno) const { return current_cpu->m32rbf_h_cr_get_handler (regno); }
50 inline void h_cr_set (UINT regno, USI newval) { current_cpu->m32rbf_h_cr_set_handler (regno, newval);
53 inline DI h_accum_get () const { return current_cpu->m32rbf_h_accum_get_handler (); }
54 inline void h_accum_set (DI newval) { current_cpu->m32rbf_h_accum_set_handler (newval);
57 inline BI h_cond_get () const { return this->hardware.h_cond; }
58 inline void h_cond_set (BI newval) { this->hardware.h_cond = newval; }
60 inline UQI h_psw_get () const { return current_cpu->m32rbf_h_psw_get_handler (); }
61 inline void h_psw_set (UQI newval) { current_cpu->m32rbf_h_psw_set_handler (newval);
64 inline UQI h_bpsw_get () const { return this->hardware.h_bpsw; }
65 inline void h_bpsw_set (UQI newval) { this->hardware.h_bpsw = newval; }
67 inline UQI h_bbpsw_get () const { return this->hardware.h_bbpsw; }
68 inline void h_bbpsw_set (UQI newval) { this->hardware.h_bbpsw = newval; }
70 inline BI h_lock_get () const { return this->hardware.h_lock; }
71 inline void h_lock_set (BI newval) { this->hardware.h_lock = newval; }