1 /* Simulator instruction semantics for arm.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000 Red Hat, Inc.
7 This file is part of the Cygnus Simulators.
15 using namespace arm7f; // FIXME: namespace organization still wip
17 #define GET_ATTR(name) GET_ATTR_##name ()
20 // ********** x-invalid: --invalid--
23 arm_sem_x_invalid (arm7f_cpu* current_cpu, arm_scache* sem)
25 #define FLD(f) abuf->fields.fmt_empty.f
26 sem_status status = SEM_STATUS_NORMAL;
27 arm_scache* abuf = sem;
28 PCADDR pc = abuf->addr;
32 current_cpu->invalid_insn (pc);
37 current_cpu->done_insn (npc, status);
42 // ********** b: b$cond $offset24
45 arm_sem_b (arm7f_cpu* current_cpu, arm_scache* sem)
47 #define FLD(f) abuf->fields.sfmt_b.f
48 sem_status status = SEM_STATUS_NORMAL;
49 arm_scache* abuf = sem;
50 PCADDR pc = abuf->addr;
54 USI opval = FLD (i_offset24);
55 current_cpu->branch (opval, npc, status);
56 if (current_cpu->trace_result_p)
57 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
60 current_cpu->done_cti_insn (npc, status);
65 // ********** bl: bl$cond $offset24
68 arm_sem_bl (arm7f_cpu* current_cpu, arm_scache* sem)
70 #define FLD(f) abuf->fields.sfmt_b.f
71 sem_status status = SEM_STATUS_NORMAL;
72 arm_scache* abuf = sem;
73 PCADDR pc = abuf->addr;
78 SI opval = ANDSI (ADDSI (pc, 4), -4);
79 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
80 if (current_cpu->trace_result_p)
81 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
84 USI opval = FLD (i_offset24);
85 current_cpu->branch (opval, npc, status);
86 if (current_cpu->trace_result_p)
87 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
91 current_cpu->done_cti_insn (npc, status);
96 // ********** bx: bx$cond ${bx-rn}
99 arm_sem_bx (arm7f_cpu* current_cpu, arm_scache* sem)
101 #define FLD(f) abuf->fields.sfmt_bx.f
102 sem_status status = SEM_STATUS_NORMAL;
103 arm_scache* abuf = sem;
104 PCADDR pc = abuf->addr;
109 USI opval = ANDSI (* FLD (i_bx_rn), 0xfffffffe);
110 current_cpu->branch (opval, npc, status);
111 if (current_cpu->trace_result_p)
112 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
114 if (ANDSI (* FLD (i_bx_rn), 1)) {
117 current_cpu->h_tbit_set (opval);
118 if (current_cpu->trace_result_p)
119 current_cpu->trace_stream << "tbit" << ":=0x" << hex << opval << dec << " ";
124 current_cpu->done_cti_insn (npc, status);
129 // ********** ldr-post-dec-imm-offset: ldr${cond} $rd,???
132 arm_sem_ldr_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
134 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
135 sem_status status = SEM_STATUS_NORMAL;
136 arm_scache* abuf = sem;
137 PCADDR pc = abuf->addr;
143 tmp_offset = FLD (f_uimm12);
144 tmp_addr = * FLD (i_rn);
145 if (EQSI (FLD (f_rd), 15)) {
147 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
148 current_cpu->branch (opval, npc, status);
149 if (current_cpu->trace_result_p)
150 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
154 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
155 * FLD (i_rd) = opval;
156 if (current_cpu->trace_result_p)
157 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
160 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
163 * FLD (i_rn) = opval;
164 if (current_cpu->trace_result_p)
165 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
169 current_cpu->done_cti_insn (npc, status);
174 // ********** ldr-post-dec-reg-offset: ldr${cond} $rd,???
177 arm_sem_ldr_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
179 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
180 sem_status status = SEM_STATUS_NORMAL;
181 arm_scache* abuf = sem;
182 PCADDR pc = abuf->addr;
188 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
189 tmp_addr = * FLD (i_rn);
190 if (EQSI (FLD (f_rd), 15)) {
192 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
193 current_cpu->branch (opval, npc, status);
194 if (current_cpu->trace_result_p)
195 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
199 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
200 * FLD (i_rd) = opval;
201 if (current_cpu->trace_result_p)
202 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
205 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
208 * FLD (i_rn) = opval;
209 if (current_cpu->trace_result_p)
210 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
214 current_cpu->done_cti_insn (npc, status);
219 // ********** ldr-post-inc-imm-offset: ldr${cond} $rd,???
222 arm_sem_ldr_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
224 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
225 sem_status status = SEM_STATUS_NORMAL;
226 arm_scache* abuf = sem;
227 PCADDR pc = abuf->addr;
233 tmp_offset = FLD (f_uimm12);
234 tmp_addr = * FLD (i_rn);
235 if (EQSI (FLD (f_rd), 15)) {
237 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
238 current_cpu->branch (opval, npc, status);
239 if (current_cpu->trace_result_p)
240 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
244 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
245 * FLD (i_rd) = opval;
246 if (current_cpu->trace_result_p)
247 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
250 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
253 * FLD (i_rn) = opval;
254 if (current_cpu->trace_result_p)
255 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
259 current_cpu->done_cti_insn (npc, status);
264 // ********** ldr-post-inc-reg-offset: ldr${cond} $rd,???
267 arm_sem_ldr_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
269 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
270 sem_status status = SEM_STATUS_NORMAL;
271 arm_scache* abuf = sem;
272 PCADDR pc = abuf->addr;
278 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
279 tmp_addr = * FLD (i_rn);
280 if (EQSI (FLD (f_rd), 15)) {
282 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
283 current_cpu->branch (opval, npc, status);
284 if (current_cpu->trace_result_p)
285 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
289 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
290 * FLD (i_rd) = opval;
291 if (current_cpu->trace_result_p)
292 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
295 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
298 * FLD (i_rn) = opval;
299 if (current_cpu->trace_result_p)
300 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
304 current_cpu->done_cti_insn (npc, status);
309 // ********** ldr-post-dec-nonpriv-imm-offset: ldr${cond}t $rd,???
312 arm_sem_ldr_post_dec_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
314 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
315 sem_status status = SEM_STATUS_NORMAL;
316 arm_scache* abuf = sem;
317 PCADDR pc = abuf->addr;
323 tmp_offset = FLD (f_uimm12);
324 tmp_addr = * FLD (i_rn);
325 if (EQSI (FLD (f_rd), 15)) {
327 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
328 current_cpu->branch (opval, npc, status);
329 if (current_cpu->trace_result_p)
330 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
334 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
335 * FLD (i_rd) = opval;
336 if (current_cpu->trace_result_p)
337 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
340 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
343 * FLD (i_rn) = opval;
344 if (current_cpu->trace_result_p)
345 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
349 current_cpu->done_cti_insn (npc, status);
354 // ********** ldr-post-dec-nonpriv-reg-offset: ldr${cond}t $rd,???
357 arm_sem_ldr_post_dec_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
359 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
360 sem_status status = SEM_STATUS_NORMAL;
361 arm_scache* abuf = sem;
362 PCADDR pc = abuf->addr;
368 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
369 tmp_addr = * FLD (i_rn);
370 if (EQSI (FLD (f_rd), 15)) {
372 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
373 current_cpu->branch (opval, npc, status);
374 if (current_cpu->trace_result_p)
375 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
379 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
380 * FLD (i_rd) = opval;
381 if (current_cpu->trace_result_p)
382 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
385 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
388 * FLD (i_rn) = opval;
389 if (current_cpu->trace_result_p)
390 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
394 current_cpu->done_cti_insn (npc, status);
399 // ********** ldr-post-inc-nonpriv-imm-offset: ldr${cond}t $rd,???
402 arm_sem_ldr_post_inc_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
404 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
405 sem_status status = SEM_STATUS_NORMAL;
406 arm_scache* abuf = sem;
407 PCADDR pc = abuf->addr;
413 tmp_offset = FLD (f_uimm12);
414 tmp_addr = * FLD (i_rn);
415 if (EQSI (FLD (f_rd), 15)) {
417 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
418 current_cpu->branch (opval, npc, status);
419 if (current_cpu->trace_result_p)
420 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
424 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
425 * FLD (i_rd) = opval;
426 if (current_cpu->trace_result_p)
427 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
430 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
433 * FLD (i_rn) = opval;
434 if (current_cpu->trace_result_p)
435 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
439 current_cpu->done_cti_insn (npc, status);
444 // ********** ldr-post-inc-nonpriv-reg-offset: ldr${cond}t $rd,???
447 arm_sem_ldr_post_inc_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
449 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
450 sem_status status = SEM_STATUS_NORMAL;
451 arm_scache* abuf = sem;
452 PCADDR pc = abuf->addr;
458 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
459 tmp_addr = * FLD (i_rn);
460 if (EQSI (FLD (f_rd), 15)) {
462 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
463 current_cpu->branch (opval, npc, status);
464 if (current_cpu->trace_result_p)
465 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
469 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
470 * FLD (i_rd) = opval;
471 if (current_cpu->trace_result_p)
472 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
475 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
478 * FLD (i_rn) = opval;
479 if (current_cpu->trace_result_p)
480 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
484 current_cpu->done_cti_insn (npc, status);
489 // ********** ldr-pre-dec-imm-offset: ldr${cond} $rd,???
492 arm_sem_ldr_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
494 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
495 sem_status status = SEM_STATUS_NORMAL;
496 arm_scache* abuf = sem;
497 PCADDR pc = abuf->addr;
503 tmp_offset = FLD (f_uimm12);
504 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
505 if (EQSI (FLD (f_rd), 15)) {
507 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
508 current_cpu->branch (opval, npc, status);
509 if (current_cpu->trace_result_p)
510 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
514 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
515 * FLD (i_rd) = opval;
516 if (current_cpu->trace_result_p)
517 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
524 current_cpu->done_cti_insn (npc, status);
529 // ********** ldr-pre-dec-reg-offset: ldr${cond} $rd,???
532 arm_sem_ldr_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
534 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
535 sem_status status = SEM_STATUS_NORMAL;
536 arm_scache* abuf = sem;
537 PCADDR pc = abuf->addr;
543 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
544 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
545 if (EQSI (FLD (f_rd), 15)) {
547 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
548 current_cpu->branch (opval, npc, status);
549 if (current_cpu->trace_result_p)
550 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
554 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
555 * FLD (i_rd) = opval;
556 if (current_cpu->trace_result_p)
557 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
564 current_cpu->done_cti_insn (npc, status);
569 // ********** ldr-pre-inc-imm-offset: ldr${cond} $rd,???
572 arm_sem_ldr_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
574 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
575 sem_status status = SEM_STATUS_NORMAL;
576 arm_scache* abuf = sem;
577 PCADDR pc = abuf->addr;
583 tmp_offset = FLD (f_uimm12);
584 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
585 if (EQSI (FLD (f_rd), 15)) {
587 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
588 current_cpu->branch (opval, npc, status);
589 if (current_cpu->trace_result_p)
590 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
594 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
595 * FLD (i_rd) = opval;
596 if (current_cpu->trace_result_p)
597 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
604 current_cpu->done_cti_insn (npc, status);
609 // ********** ldr-pre-inc-reg-offset: ldr${cond} $rd,???
612 arm_sem_ldr_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
614 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
615 sem_status status = SEM_STATUS_NORMAL;
616 arm_scache* abuf = sem;
617 PCADDR pc = abuf->addr;
623 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
624 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
625 if (EQSI (FLD (f_rd), 15)) {
627 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
628 current_cpu->branch (opval, npc, status);
629 if (current_cpu->trace_result_p)
630 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
634 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
635 * FLD (i_rd) = opval;
636 if (current_cpu->trace_result_p)
637 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
644 current_cpu->done_cti_insn (npc, status);
649 // ********** ldr-pre-dec-wb-imm-offset: ldr${cond} $rd,???
652 arm_sem_ldr_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
654 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
655 sem_status status = SEM_STATUS_NORMAL;
656 arm_scache* abuf = sem;
657 PCADDR pc = abuf->addr;
663 tmp_offset = FLD (f_uimm12);
664 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
665 if (EQSI (FLD (f_rd), 15)) {
667 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
668 current_cpu->branch (opval, npc, status);
669 if (current_cpu->trace_result_p)
670 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
674 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
675 * FLD (i_rd) = opval;
676 if (current_cpu->trace_result_p)
677 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
683 * FLD (i_rn) = opval;
684 if (current_cpu->trace_result_p)
685 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
689 current_cpu->done_cti_insn (npc, status);
694 // ********** ldr-pre-dec-wb-reg-offset: ldr${cond} $rd,???
697 arm_sem_ldr_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
699 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
700 sem_status status = SEM_STATUS_NORMAL;
701 arm_scache* abuf = sem;
702 PCADDR pc = abuf->addr;
708 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
709 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
710 if (EQSI (FLD (f_rd), 15)) {
712 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
713 current_cpu->branch (opval, npc, status);
714 if (current_cpu->trace_result_p)
715 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
719 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
720 * FLD (i_rd) = opval;
721 if (current_cpu->trace_result_p)
722 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
728 * FLD (i_rn) = opval;
729 if (current_cpu->trace_result_p)
730 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
734 current_cpu->done_cti_insn (npc, status);
739 // ********** ldr-pre-inc-wb-imm-offset: ldr${cond} $rd,???
742 arm_sem_ldr_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
744 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
745 sem_status status = SEM_STATUS_NORMAL;
746 arm_scache* abuf = sem;
747 PCADDR pc = abuf->addr;
753 tmp_offset = FLD (f_uimm12);
754 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
755 if (EQSI (FLD (f_rd), 15)) {
757 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
758 current_cpu->branch (opval, npc, status);
759 if (current_cpu->trace_result_p)
760 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
764 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
765 * FLD (i_rd) = opval;
766 if (current_cpu->trace_result_p)
767 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
773 * FLD (i_rn) = opval;
774 if (current_cpu->trace_result_p)
775 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
779 current_cpu->done_cti_insn (npc, status);
784 // ********** ldr-pre-inc-wb-reg-offset: ldr${cond} $rd,???
787 arm_sem_ldr_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
789 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
790 sem_status status = SEM_STATUS_NORMAL;
791 arm_scache* abuf = sem;
792 PCADDR pc = abuf->addr;
798 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
799 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
800 if (EQSI (FLD (f_rd), 15)) {
802 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
803 current_cpu->branch (opval, npc, status);
804 if (current_cpu->trace_result_p)
805 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
809 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
810 * FLD (i_rd) = opval;
811 if (current_cpu->trace_result_p)
812 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
818 * FLD (i_rn) = opval;
819 if (current_cpu->trace_result_p)
820 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
824 current_cpu->done_cti_insn (npc, status);
829 // ********** ldrb-post-dec-imm-offset: ldr${cond}b $rd,???
832 arm_sem_ldrb_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
834 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
835 sem_status status = SEM_STATUS_NORMAL;
836 arm_scache* abuf = sem;
837 PCADDR pc = abuf->addr;
843 tmp_offset = FLD (f_uimm12);
844 tmp_addr = * FLD (i_rn);
845 if (EQSI (FLD (f_rd), 15)) {
847 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
848 current_cpu->branch (opval, npc, status);
849 if (current_cpu->trace_result_p)
850 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
854 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
855 * FLD (i_rd) = opval;
856 if (current_cpu->trace_result_p)
857 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
860 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
863 * FLD (i_rn) = opval;
864 if (current_cpu->trace_result_p)
865 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
869 current_cpu->done_cti_insn (npc, status);
874 // ********** ldrb-post-dec-reg-offset: ldr${cond}b $rd,???
877 arm_sem_ldrb_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
879 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
880 sem_status status = SEM_STATUS_NORMAL;
881 arm_scache* abuf = sem;
882 PCADDR pc = abuf->addr;
888 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
889 tmp_addr = * FLD (i_rn);
890 if (EQSI (FLD (f_rd), 15)) {
892 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
893 current_cpu->branch (opval, npc, status);
894 if (current_cpu->trace_result_p)
895 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
899 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
900 * FLD (i_rd) = opval;
901 if (current_cpu->trace_result_p)
902 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
905 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
908 * FLD (i_rn) = opval;
909 if (current_cpu->trace_result_p)
910 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
914 current_cpu->done_cti_insn (npc, status);
919 // ********** ldrb-post-inc-imm-offset: ldr${cond}b $rd,???
922 arm_sem_ldrb_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
924 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
925 sem_status status = SEM_STATUS_NORMAL;
926 arm_scache* abuf = sem;
927 PCADDR pc = abuf->addr;
933 tmp_offset = FLD (f_uimm12);
934 tmp_addr = * FLD (i_rn);
935 if (EQSI (FLD (f_rd), 15)) {
937 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
938 current_cpu->branch (opval, npc, status);
939 if (current_cpu->trace_result_p)
940 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
944 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
945 * FLD (i_rd) = opval;
946 if (current_cpu->trace_result_p)
947 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
950 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
953 * FLD (i_rn) = opval;
954 if (current_cpu->trace_result_p)
955 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
959 current_cpu->done_cti_insn (npc, status);
964 // ********** ldrb-post-inc-reg-offset: ldr${cond}b $rd,???
967 arm_sem_ldrb_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
969 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
970 sem_status status = SEM_STATUS_NORMAL;
971 arm_scache* abuf = sem;
972 PCADDR pc = abuf->addr;
978 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
979 tmp_addr = * FLD (i_rn);
980 if (EQSI (FLD (f_rd), 15)) {
982 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
983 current_cpu->branch (opval, npc, status);
984 if (current_cpu->trace_result_p)
985 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
989 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
990 * FLD (i_rd) = opval;
991 if (current_cpu->trace_result_p)
992 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
995 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
998 * FLD (i_rn) = opval;
999 if (current_cpu->trace_result_p)
1000 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1004 current_cpu->done_cti_insn (npc, status);
1009 // ********** ldrb-post-dec-nonpriv-imm-offset: ldr${cond}bt $rd,???
1012 arm_sem_ldrb_post_dec_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1014 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1015 sem_status status = SEM_STATUS_NORMAL;
1016 arm_scache* abuf = sem;
1017 PCADDR pc = abuf->addr;
1018 PCADDR npc = pc + 4;
1023 tmp_offset = FLD (f_uimm12);
1024 tmp_addr = * FLD (i_rn);
1025 if (EQSI (FLD (f_rd), 15)) {
1027 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1028 current_cpu->branch (opval, npc, status);
1029 if (current_cpu->trace_result_p)
1030 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1034 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1035 * FLD (i_rd) = opval;
1036 if (current_cpu->trace_result_p)
1037 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1040 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1042 SI opval = tmp_addr;
1043 * FLD (i_rn) = opval;
1044 if (current_cpu->trace_result_p)
1045 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1049 current_cpu->done_cti_insn (npc, status);
1054 // ********** ldrb-post-dec-nonpriv-reg-offset: ldr${cond}bt $rd,???
1057 arm_sem_ldrb_post_dec_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1059 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1060 sem_status status = SEM_STATUS_NORMAL;
1061 arm_scache* abuf = sem;
1062 PCADDR pc = abuf->addr;
1063 PCADDR npc = pc + 4;
1068 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1069 tmp_addr = * FLD (i_rn);
1070 if (EQSI (FLD (f_rd), 15)) {
1072 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1073 current_cpu->branch (opval, npc, status);
1074 if (current_cpu->trace_result_p)
1075 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1079 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1080 * FLD (i_rd) = opval;
1081 if (current_cpu->trace_result_p)
1082 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1085 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1087 SI opval = tmp_addr;
1088 * FLD (i_rn) = opval;
1089 if (current_cpu->trace_result_p)
1090 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1094 current_cpu->done_cti_insn (npc, status);
1099 // ********** ldrb-post-inc-nonpriv-imm-offset: ldr${cond}bt $rd,???
1102 arm_sem_ldrb_post_inc_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1104 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1105 sem_status status = SEM_STATUS_NORMAL;
1106 arm_scache* abuf = sem;
1107 PCADDR pc = abuf->addr;
1108 PCADDR npc = pc + 4;
1113 tmp_offset = FLD (f_uimm12);
1114 tmp_addr = * FLD (i_rn);
1115 if (EQSI (FLD (f_rd), 15)) {
1117 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1118 current_cpu->branch (opval, npc, status);
1119 if (current_cpu->trace_result_p)
1120 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1124 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1125 * FLD (i_rd) = opval;
1126 if (current_cpu->trace_result_p)
1127 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1130 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1132 SI opval = tmp_addr;
1133 * FLD (i_rn) = opval;
1134 if (current_cpu->trace_result_p)
1135 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1139 current_cpu->done_cti_insn (npc, status);
1144 // ********** ldrb-post-inc-nonpriv-reg-offset: ldr${cond}bt $rd,???
1147 arm_sem_ldrb_post_inc_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1149 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1150 sem_status status = SEM_STATUS_NORMAL;
1151 arm_scache* abuf = sem;
1152 PCADDR pc = abuf->addr;
1153 PCADDR npc = pc + 4;
1158 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1159 tmp_addr = * FLD (i_rn);
1160 if (EQSI (FLD (f_rd), 15)) {
1162 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1163 current_cpu->branch (opval, npc, status);
1164 if (current_cpu->trace_result_p)
1165 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1169 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1170 * FLD (i_rd) = opval;
1171 if (current_cpu->trace_result_p)
1172 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1175 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1177 SI opval = tmp_addr;
1178 * FLD (i_rn) = opval;
1179 if (current_cpu->trace_result_p)
1180 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1184 current_cpu->done_cti_insn (npc, status);
1189 // ********** ldrb-pre-dec-imm-offset: ldr${cond}b $rd,???
1192 arm_sem_ldrb_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1194 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1195 sem_status status = SEM_STATUS_NORMAL;
1196 arm_scache* abuf = sem;
1197 PCADDR pc = abuf->addr;
1198 PCADDR npc = pc + 4;
1203 tmp_offset = FLD (f_uimm12);
1204 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1205 if (EQSI (FLD (f_rd), 15)) {
1207 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1208 current_cpu->branch (opval, npc, status);
1209 if (current_cpu->trace_result_p)
1210 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1214 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1215 * FLD (i_rd) = opval;
1216 if (current_cpu->trace_result_p)
1217 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1224 current_cpu->done_cti_insn (npc, status);
1229 // ********** ldrb-pre-dec-reg-offset: ldr${cond}b $rd,???
1232 arm_sem_ldrb_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1234 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1235 sem_status status = SEM_STATUS_NORMAL;
1236 arm_scache* abuf = sem;
1237 PCADDR pc = abuf->addr;
1238 PCADDR npc = pc + 4;
1243 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1244 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1245 if (EQSI (FLD (f_rd), 15)) {
1247 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1248 current_cpu->branch (opval, npc, status);
1249 if (current_cpu->trace_result_p)
1250 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1254 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1255 * FLD (i_rd) = opval;
1256 if (current_cpu->trace_result_p)
1257 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1264 current_cpu->done_cti_insn (npc, status);
1269 // ********** ldrb-pre-inc-imm-offset: ldr${cond}b $rd,???
1272 arm_sem_ldrb_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1274 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1275 sem_status status = SEM_STATUS_NORMAL;
1276 arm_scache* abuf = sem;
1277 PCADDR pc = abuf->addr;
1278 PCADDR npc = pc + 4;
1283 tmp_offset = FLD (f_uimm12);
1284 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1285 if (EQSI (FLD (f_rd), 15)) {
1287 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1288 current_cpu->branch (opval, npc, status);
1289 if (current_cpu->trace_result_p)
1290 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1294 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1295 * FLD (i_rd) = opval;
1296 if (current_cpu->trace_result_p)
1297 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1304 current_cpu->done_cti_insn (npc, status);
1309 // ********** ldrb-pre-inc-reg-offset: ldr${cond}b $rd,???
1312 arm_sem_ldrb_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1314 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1315 sem_status status = SEM_STATUS_NORMAL;
1316 arm_scache* abuf = sem;
1317 PCADDR pc = abuf->addr;
1318 PCADDR npc = pc + 4;
1323 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1324 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1325 if (EQSI (FLD (f_rd), 15)) {
1327 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1328 current_cpu->branch (opval, npc, status);
1329 if (current_cpu->trace_result_p)
1330 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1334 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1335 * FLD (i_rd) = opval;
1336 if (current_cpu->trace_result_p)
1337 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1344 current_cpu->done_cti_insn (npc, status);
1349 // ********** ldrb-pre-dec-wb-imm-offset: ldr${cond}b $rd,???
1352 arm_sem_ldrb_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1354 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1355 sem_status status = SEM_STATUS_NORMAL;
1356 arm_scache* abuf = sem;
1357 PCADDR pc = abuf->addr;
1358 PCADDR npc = pc + 4;
1363 tmp_offset = FLD (f_uimm12);
1364 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1365 if (EQSI (FLD (f_rd), 15)) {
1367 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1368 current_cpu->branch (opval, npc, status);
1369 if (current_cpu->trace_result_p)
1370 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1374 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1375 * FLD (i_rd) = opval;
1376 if (current_cpu->trace_result_p)
1377 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1382 SI opval = tmp_addr;
1383 * FLD (i_rn) = opval;
1384 if (current_cpu->trace_result_p)
1385 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1389 current_cpu->done_cti_insn (npc, status);
1394 // ********** ldrb-pre-dec-wb-reg-offset: ldr${cond}b $rd,???
1397 arm_sem_ldrb_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1399 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1400 sem_status status = SEM_STATUS_NORMAL;
1401 arm_scache* abuf = sem;
1402 PCADDR pc = abuf->addr;
1403 PCADDR npc = pc + 4;
1408 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1409 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1410 if (EQSI (FLD (f_rd), 15)) {
1412 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1413 current_cpu->branch (opval, npc, status);
1414 if (current_cpu->trace_result_p)
1415 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1419 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1420 * FLD (i_rd) = opval;
1421 if (current_cpu->trace_result_p)
1422 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1427 SI opval = tmp_addr;
1428 * FLD (i_rn) = opval;
1429 if (current_cpu->trace_result_p)
1430 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1434 current_cpu->done_cti_insn (npc, status);
1439 // ********** ldrb-pre-inc-wb-imm-offset: ldr${cond}b $rd,???
1442 arm_sem_ldrb_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1444 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1445 sem_status status = SEM_STATUS_NORMAL;
1446 arm_scache* abuf = sem;
1447 PCADDR pc = abuf->addr;
1448 PCADDR npc = pc + 4;
1453 tmp_offset = FLD (f_uimm12);
1454 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1455 if (EQSI (FLD (f_rd), 15)) {
1457 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1458 current_cpu->branch (opval, npc, status);
1459 if (current_cpu->trace_result_p)
1460 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1464 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1465 * FLD (i_rd) = opval;
1466 if (current_cpu->trace_result_p)
1467 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1472 SI opval = tmp_addr;
1473 * FLD (i_rn) = opval;
1474 if (current_cpu->trace_result_p)
1475 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1479 current_cpu->done_cti_insn (npc, status);
1484 // ********** ldrb-pre-inc-wb-reg-offset: ldr${cond}b $rd,???
1487 arm_sem_ldrb_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1489 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1490 sem_status status = SEM_STATUS_NORMAL;
1491 arm_scache* abuf = sem;
1492 PCADDR pc = abuf->addr;
1493 PCADDR npc = pc + 4;
1498 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1499 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1500 if (EQSI (FLD (f_rd), 15)) {
1502 USI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1503 current_cpu->branch (opval, npc, status);
1504 if (current_cpu->trace_result_p)
1505 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
1509 SI opval = ZEXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
1510 * FLD (i_rd) = opval;
1511 if (current_cpu->trace_result_p)
1512 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
1517 SI opval = tmp_addr;
1518 * FLD (i_rn) = opval;
1519 if (current_cpu->trace_result_p)
1520 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1524 current_cpu->done_cti_insn (npc, status);
1529 // ********** str-post-dec-imm-offset: ldr${cond} $rd,???
1532 arm_sem_str_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1534 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1535 sem_status status = SEM_STATUS_NORMAL;
1536 arm_scache* abuf = sem;
1537 PCADDR pc = abuf->addr;
1538 PCADDR npc = pc + 4;
1543 tmp_offset = FLD (f_uimm12);
1544 tmp_addr = * FLD (i_rn);
1546 SI opval = * FLD (i_rd);
1547 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1548 if (current_cpu->trace_result_p)
1549 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1551 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1553 SI opval = tmp_addr;
1554 * FLD (i_rn) = opval;
1555 if (current_cpu->trace_result_p)
1556 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1560 current_cpu->done_insn (npc, status);
1565 // ********** str-post-dec-reg-offset: str${cond} $rd,???
1568 arm_sem_str_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1570 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1571 sem_status status = SEM_STATUS_NORMAL;
1572 arm_scache* abuf = sem;
1573 PCADDR pc = abuf->addr;
1574 PCADDR npc = pc + 4;
1579 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1580 tmp_addr = * FLD (i_rn);
1582 SI opval = * FLD (i_rd);
1583 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1584 if (current_cpu->trace_result_p)
1585 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1587 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1589 SI opval = tmp_addr;
1590 * FLD (i_rn) = opval;
1591 if (current_cpu->trace_result_p)
1592 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1596 current_cpu->done_insn (npc, status);
1601 // ********** str-post-inc-imm-offset: ldr${cond} $rd,???
1604 arm_sem_str_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1606 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1607 sem_status status = SEM_STATUS_NORMAL;
1608 arm_scache* abuf = sem;
1609 PCADDR pc = abuf->addr;
1610 PCADDR npc = pc + 4;
1615 tmp_offset = FLD (f_uimm12);
1616 tmp_addr = * FLD (i_rn);
1618 SI opval = * FLD (i_rd);
1619 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1620 if (current_cpu->trace_result_p)
1621 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1623 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1625 SI opval = tmp_addr;
1626 * FLD (i_rn) = opval;
1627 if (current_cpu->trace_result_p)
1628 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1632 current_cpu->done_insn (npc, status);
1637 // ********** str-post-inc-reg-offset: str${cond} $rd,???
1640 arm_sem_str_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1642 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1643 sem_status status = SEM_STATUS_NORMAL;
1644 arm_scache* abuf = sem;
1645 PCADDR pc = abuf->addr;
1646 PCADDR npc = pc + 4;
1651 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1652 tmp_addr = * FLD (i_rn);
1654 SI opval = * FLD (i_rd);
1655 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1656 if (current_cpu->trace_result_p)
1657 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1659 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1661 SI opval = tmp_addr;
1662 * FLD (i_rn) = opval;
1663 if (current_cpu->trace_result_p)
1664 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1668 current_cpu->done_insn (npc, status);
1673 // ********** str-post-dec-nonpriv-imm-offset: ldr${cond}t $rd,???
1676 arm_sem_str_post_dec_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1678 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1679 sem_status status = SEM_STATUS_NORMAL;
1680 arm_scache* abuf = sem;
1681 PCADDR pc = abuf->addr;
1682 PCADDR npc = pc + 4;
1687 tmp_offset = FLD (f_uimm12);
1688 tmp_addr = * FLD (i_rn);
1690 SI opval = * FLD (i_rd);
1691 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1692 if (current_cpu->trace_result_p)
1693 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1695 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1697 SI opval = tmp_addr;
1698 * FLD (i_rn) = opval;
1699 if (current_cpu->trace_result_p)
1700 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1704 current_cpu->done_insn (npc, status);
1709 // ********** str-post-dec-nonpriv-reg-offset: str${cond}t $rd,???
1712 arm_sem_str_post_dec_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1714 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1715 sem_status status = SEM_STATUS_NORMAL;
1716 arm_scache* abuf = sem;
1717 PCADDR pc = abuf->addr;
1718 PCADDR npc = pc + 4;
1723 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1724 tmp_addr = * FLD (i_rn);
1726 SI opval = * FLD (i_rd);
1727 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1728 if (current_cpu->trace_result_p)
1729 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1731 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1733 SI opval = tmp_addr;
1734 * FLD (i_rn) = opval;
1735 if (current_cpu->trace_result_p)
1736 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1740 current_cpu->done_insn (npc, status);
1745 // ********** str-post-inc-nonpriv-imm-offset: ldr${cond}t $rd,???
1748 arm_sem_str_post_inc_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1750 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1751 sem_status status = SEM_STATUS_NORMAL;
1752 arm_scache* abuf = sem;
1753 PCADDR pc = abuf->addr;
1754 PCADDR npc = pc + 4;
1759 tmp_offset = FLD (f_uimm12);
1760 tmp_addr = * FLD (i_rn);
1762 SI opval = * FLD (i_rd);
1763 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1764 if (current_cpu->trace_result_p)
1765 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1767 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1769 SI opval = tmp_addr;
1770 * FLD (i_rn) = opval;
1771 if (current_cpu->trace_result_p)
1772 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1776 current_cpu->done_insn (npc, status);
1781 // ********** str-post-inc-nonpriv-reg-offset: str${cond}t $rd,???
1784 arm_sem_str_post_inc_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1786 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1787 sem_status status = SEM_STATUS_NORMAL;
1788 arm_scache* abuf = sem;
1789 PCADDR pc = abuf->addr;
1790 PCADDR npc = pc + 4;
1795 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1796 tmp_addr = * FLD (i_rn);
1798 SI opval = * FLD (i_rd);
1799 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1800 if (current_cpu->trace_result_p)
1801 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1803 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1805 SI opval = tmp_addr;
1806 * FLD (i_rn) = opval;
1807 if (current_cpu->trace_result_p)
1808 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1812 current_cpu->done_insn (npc, status);
1817 // ********** str-pre-dec-imm-offset: ldr${cond} $rd,???
1820 arm_sem_str_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1822 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1823 sem_status status = SEM_STATUS_NORMAL;
1824 arm_scache* abuf = sem;
1825 PCADDR pc = abuf->addr;
1826 PCADDR npc = pc + 4;
1831 tmp_offset = FLD (f_uimm12);
1832 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1834 SI opval = * FLD (i_rd);
1835 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1836 if (current_cpu->trace_result_p)
1837 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1843 current_cpu->done_insn (npc, status);
1848 // ********** str-pre-dec-reg-offset: str${cond} $rd,???
1851 arm_sem_str_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1853 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1854 sem_status status = SEM_STATUS_NORMAL;
1855 arm_scache* abuf = sem;
1856 PCADDR pc = abuf->addr;
1857 PCADDR npc = pc + 4;
1862 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1863 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1865 SI opval = * FLD (i_rd);
1866 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1867 if (current_cpu->trace_result_p)
1868 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1874 current_cpu->done_insn (npc, status);
1879 // ********** str-pre-inc-imm-offset: ldr${cond} $rd,???
1882 arm_sem_str_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1884 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1885 sem_status status = SEM_STATUS_NORMAL;
1886 arm_scache* abuf = sem;
1887 PCADDR pc = abuf->addr;
1888 PCADDR npc = pc + 4;
1893 tmp_offset = FLD (f_uimm12);
1894 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1896 SI opval = * FLD (i_rd);
1897 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1898 if (current_cpu->trace_result_p)
1899 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1905 current_cpu->done_insn (npc, status);
1910 // ********** str-pre-inc-reg-offset: str${cond} $rd,???
1913 arm_sem_str_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1915 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1916 sem_status status = SEM_STATUS_NORMAL;
1917 arm_scache* abuf = sem;
1918 PCADDR pc = abuf->addr;
1919 PCADDR npc = pc + 4;
1924 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1925 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
1927 SI opval = * FLD (i_rd);
1928 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1929 if (current_cpu->trace_result_p)
1930 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1936 current_cpu->done_insn (npc, status);
1941 // ********** str-pre-dec-wb-imm-offset: ldr${cond} $rd,???
1944 arm_sem_str_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1946 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
1947 sem_status status = SEM_STATUS_NORMAL;
1948 arm_scache* abuf = sem;
1949 PCADDR pc = abuf->addr;
1950 PCADDR npc = pc + 4;
1955 tmp_offset = FLD (f_uimm12);
1956 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1958 SI opval = * FLD (i_rd);
1959 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1960 if (current_cpu->trace_result_p)
1961 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
1965 SI opval = tmp_addr;
1966 * FLD (i_rn) = opval;
1967 if (current_cpu->trace_result_p)
1968 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
1972 current_cpu->done_insn (npc, status);
1977 // ********** str-pre-dec-wb-reg-offset: str${cond} $rd,???
1980 arm_sem_str_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
1982 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
1983 sem_status status = SEM_STATUS_NORMAL;
1984 arm_scache* abuf = sem;
1985 PCADDR pc = abuf->addr;
1986 PCADDR npc = pc + 4;
1991 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
1992 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
1994 SI opval = * FLD (i_rd);
1995 current_cpu->SETMEMSI (pc, tmp_addr, opval);
1996 if (current_cpu->trace_result_p)
1997 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2001 SI opval = tmp_addr;
2002 * FLD (i_rn) = opval;
2003 if (current_cpu->trace_result_p)
2004 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2008 current_cpu->done_insn (npc, status);
2013 // ********** str-pre-inc-wb-imm-offset: ldr${cond} $rd,???
2016 arm_sem_str_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2018 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2019 sem_status status = SEM_STATUS_NORMAL;
2020 arm_scache* abuf = sem;
2021 PCADDR pc = abuf->addr;
2022 PCADDR npc = pc + 4;
2027 tmp_offset = FLD (f_uimm12);
2028 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2030 SI opval = * FLD (i_rd);
2031 current_cpu->SETMEMSI (pc, tmp_addr, opval);
2032 if (current_cpu->trace_result_p)
2033 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2037 SI opval = tmp_addr;
2038 * FLD (i_rn) = opval;
2039 if (current_cpu->trace_result_p)
2040 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2044 current_cpu->done_insn (npc, status);
2049 // ********** str-pre-inc-wb-reg-offset: str${cond} $rd,???
2052 arm_sem_str_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2054 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2055 sem_status status = SEM_STATUS_NORMAL;
2056 arm_scache* abuf = sem;
2057 PCADDR pc = abuf->addr;
2058 PCADDR npc = pc + 4;
2063 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2064 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2066 SI opval = * FLD (i_rd);
2067 current_cpu->SETMEMSI (pc, tmp_addr, opval);
2068 if (current_cpu->trace_result_p)
2069 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2073 SI opval = tmp_addr;
2074 * FLD (i_rn) = opval;
2075 if (current_cpu->trace_result_p)
2076 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2080 current_cpu->done_insn (npc, status);
2085 // ********** strb-post-dec-imm-offset: ldr${cond}b $rd,???
2088 arm_sem_strb_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2090 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2091 sem_status status = SEM_STATUS_NORMAL;
2092 arm_scache* abuf = sem;
2093 PCADDR pc = abuf->addr;
2094 PCADDR npc = pc + 4;
2099 tmp_offset = FLD (f_uimm12);
2100 tmp_addr = * FLD (i_rn);
2102 QI opval = TRUNCSIQI (* FLD (i_rd));
2103 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2104 if (current_cpu->trace_result_p)
2105 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2107 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2109 SI opval = tmp_addr;
2110 * FLD (i_rn) = opval;
2111 if (current_cpu->trace_result_p)
2112 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2116 current_cpu->done_insn (npc, status);
2121 // ********** strb-post-dec-reg-offset: str${cond}b $rd,???
2124 arm_sem_strb_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2126 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2127 sem_status status = SEM_STATUS_NORMAL;
2128 arm_scache* abuf = sem;
2129 PCADDR pc = abuf->addr;
2130 PCADDR npc = pc + 4;
2135 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2136 tmp_addr = * FLD (i_rn);
2138 QI opval = TRUNCSIQI (* FLD (i_rd));
2139 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2140 if (current_cpu->trace_result_p)
2141 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2143 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2145 SI opval = tmp_addr;
2146 * FLD (i_rn) = opval;
2147 if (current_cpu->trace_result_p)
2148 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2152 current_cpu->done_insn (npc, status);
2157 // ********** strb-post-inc-imm-offset: ldr${cond} $rd,???
2160 arm_sem_strb_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2162 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2163 sem_status status = SEM_STATUS_NORMAL;
2164 arm_scache* abuf = sem;
2165 PCADDR pc = abuf->addr;
2166 PCADDR npc = pc + 4;
2171 tmp_offset = FLD (f_uimm12);
2172 tmp_addr = * FLD (i_rn);
2174 QI opval = TRUNCSIQI (* FLD (i_rd));
2175 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2176 if (current_cpu->trace_result_p)
2177 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2179 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2181 SI opval = tmp_addr;
2182 * FLD (i_rn) = opval;
2183 if (current_cpu->trace_result_p)
2184 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2188 current_cpu->done_insn (npc, status);
2193 // ********** strb-post-inc-reg-offset: str${cond} $rd,???
2196 arm_sem_strb_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2198 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2199 sem_status status = SEM_STATUS_NORMAL;
2200 arm_scache* abuf = sem;
2201 PCADDR pc = abuf->addr;
2202 PCADDR npc = pc + 4;
2207 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2208 tmp_addr = * FLD (i_rn);
2210 QI opval = TRUNCSIQI (* FLD (i_rd));
2211 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2212 if (current_cpu->trace_result_p)
2213 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2215 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2217 SI opval = tmp_addr;
2218 * FLD (i_rn) = opval;
2219 if (current_cpu->trace_result_p)
2220 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2224 current_cpu->done_insn (npc, status);
2229 // ********** strb-post-dec-nonpriv-imm-offset: ldr${cond}t $rd,???
2232 arm_sem_strb_post_dec_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2234 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2235 sem_status status = SEM_STATUS_NORMAL;
2236 arm_scache* abuf = sem;
2237 PCADDR pc = abuf->addr;
2238 PCADDR npc = pc + 4;
2243 tmp_offset = FLD (f_uimm12);
2244 tmp_addr = * FLD (i_rn);
2246 QI opval = TRUNCSIQI (* FLD (i_rd));
2247 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2248 if (current_cpu->trace_result_p)
2249 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2251 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2253 SI opval = tmp_addr;
2254 * FLD (i_rn) = opval;
2255 if (current_cpu->trace_result_p)
2256 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2260 current_cpu->done_insn (npc, status);
2265 // ********** strb-post-dec-nonpriv-reg-offset: str${cond}t $rd,???
2268 arm_sem_strb_post_dec_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2270 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2271 sem_status status = SEM_STATUS_NORMAL;
2272 arm_scache* abuf = sem;
2273 PCADDR pc = abuf->addr;
2274 PCADDR npc = pc + 4;
2279 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2280 tmp_addr = * FLD (i_rn);
2282 QI opval = TRUNCSIQI (* FLD (i_rd));
2283 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2284 if (current_cpu->trace_result_p)
2285 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2287 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2289 SI opval = tmp_addr;
2290 * FLD (i_rn) = opval;
2291 if (current_cpu->trace_result_p)
2292 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2296 current_cpu->done_insn (npc, status);
2301 // ********** strb-post-inc-nonpriv-imm-offset: ldr${cond}t $rd,???
2304 arm_sem_strb_post_inc_nonpriv_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2306 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2307 sem_status status = SEM_STATUS_NORMAL;
2308 arm_scache* abuf = sem;
2309 PCADDR pc = abuf->addr;
2310 PCADDR npc = pc + 4;
2315 tmp_offset = FLD (f_uimm12);
2316 tmp_addr = * FLD (i_rn);
2318 QI opval = TRUNCSIQI (* FLD (i_rd));
2319 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2320 if (current_cpu->trace_result_p)
2321 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2323 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2325 SI opval = tmp_addr;
2326 * FLD (i_rn) = opval;
2327 if (current_cpu->trace_result_p)
2328 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2332 current_cpu->done_insn (npc, status);
2337 // ********** strb-post-inc-nonpriv-reg-offset: str${cond}t $rd,???
2340 arm_sem_strb_post_inc_nonpriv_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2342 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2343 sem_status status = SEM_STATUS_NORMAL;
2344 arm_scache* abuf = sem;
2345 PCADDR pc = abuf->addr;
2346 PCADDR npc = pc + 4;
2351 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2352 tmp_addr = * FLD (i_rn);
2354 QI opval = TRUNCSIQI (* FLD (i_rd));
2355 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2356 if (current_cpu->trace_result_p)
2357 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2359 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2361 SI opval = tmp_addr;
2362 * FLD (i_rn) = opval;
2363 if (current_cpu->trace_result_p)
2364 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2368 current_cpu->done_insn (npc, status);
2373 // ********** strb-pre-dec-imm-offset: ldr${cond} $rd,???
2376 arm_sem_strb_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2378 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2379 sem_status status = SEM_STATUS_NORMAL;
2380 arm_scache* abuf = sem;
2381 PCADDR pc = abuf->addr;
2382 PCADDR npc = pc + 4;
2387 tmp_offset = FLD (f_uimm12);
2388 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2390 QI opval = TRUNCSIQI (* FLD (i_rd));
2391 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2392 if (current_cpu->trace_result_p)
2393 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2399 current_cpu->done_insn (npc, status);
2404 // ********** strb-pre-dec-reg-offset: str${cond} $rd,???
2407 arm_sem_strb_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2409 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2410 sem_status status = SEM_STATUS_NORMAL;
2411 arm_scache* abuf = sem;
2412 PCADDR pc = abuf->addr;
2413 PCADDR npc = pc + 4;
2418 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2419 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2421 QI opval = TRUNCSIQI (* FLD (i_rd));
2422 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2423 if (current_cpu->trace_result_p)
2424 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2430 current_cpu->done_insn (npc, status);
2435 // ********** strb-pre-inc-imm-offset: ldr${cond} $rd,???
2438 arm_sem_strb_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2440 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2441 sem_status status = SEM_STATUS_NORMAL;
2442 arm_scache* abuf = sem;
2443 PCADDR pc = abuf->addr;
2444 PCADDR npc = pc + 4;
2449 tmp_offset = FLD (f_uimm12);
2450 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2452 QI opval = TRUNCSIQI (* FLD (i_rd));
2453 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2454 if (current_cpu->trace_result_p)
2455 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2461 current_cpu->done_insn (npc, status);
2466 // ********** strb-pre-inc-reg-offset: str${cond} $rd,???
2469 arm_sem_strb_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2471 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2472 sem_status status = SEM_STATUS_NORMAL;
2473 arm_scache* abuf = sem;
2474 PCADDR pc = abuf->addr;
2475 PCADDR npc = pc + 4;
2480 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2481 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2483 QI opval = TRUNCSIQI (* FLD (i_rd));
2484 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2485 if (current_cpu->trace_result_p)
2486 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2492 current_cpu->done_insn (npc, status);
2497 // ********** strb-pre-dec-wb-imm-offset: ldr${cond} $rd,???
2500 arm_sem_strb_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2502 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2503 sem_status status = SEM_STATUS_NORMAL;
2504 arm_scache* abuf = sem;
2505 PCADDR pc = abuf->addr;
2506 PCADDR npc = pc + 4;
2511 tmp_offset = FLD (f_uimm12);
2512 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2514 QI opval = TRUNCSIQI (* FLD (i_rd));
2515 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2516 if (current_cpu->trace_result_p)
2517 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2521 SI opval = tmp_addr;
2522 * FLD (i_rn) = opval;
2523 if (current_cpu->trace_result_p)
2524 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2528 current_cpu->done_insn (npc, status);
2533 // ********** strb-pre-dec-wb-reg-offset: str${cond} $rd,???
2536 arm_sem_strb_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2538 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2539 sem_status status = SEM_STATUS_NORMAL;
2540 arm_scache* abuf = sem;
2541 PCADDR pc = abuf->addr;
2542 PCADDR npc = pc + 4;
2547 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2548 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2550 QI opval = TRUNCSIQI (* FLD (i_rd));
2551 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2552 if (current_cpu->trace_result_p)
2553 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2557 SI opval = tmp_addr;
2558 * FLD (i_rn) = opval;
2559 if (current_cpu->trace_result_p)
2560 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2564 current_cpu->done_insn (npc, status);
2569 // ********** strb-pre-inc-wb-imm-offset: ldr${cond} $rd,???
2572 arm_sem_strb_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2574 #define FLD(f) abuf->fields.sfmt_ldr_post_dec_imm_offset.f
2575 sem_status status = SEM_STATUS_NORMAL;
2576 arm_scache* abuf = sem;
2577 PCADDR pc = abuf->addr;
2578 PCADDR npc = pc + 4;
2583 tmp_offset = FLD (f_uimm12);
2584 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2586 QI opval = TRUNCSIQI (* FLD (i_rd));
2587 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2588 if (current_cpu->trace_result_p)
2589 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2593 SI opval = tmp_addr;
2594 * FLD (i_rn) = opval;
2595 if (current_cpu->trace_result_p)
2596 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2600 current_cpu->done_insn (npc, status);
2605 // ********** strb-pre-inc-wb-reg-offset: str${cond} $rd,???
2608 arm_sem_strb_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2610 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2611 sem_status status = SEM_STATUS_NORMAL;
2612 arm_scache* abuf = sem;
2613 PCADDR pc = abuf->addr;
2614 PCADDR npc = pc + 4;
2619 tmp_offset = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
2620 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2622 QI opval = TRUNCSIQI (* FLD (i_rd));
2623 current_cpu->SETMEMQI (pc, tmp_addr, opval);
2624 if (current_cpu->trace_result_p)
2625 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
2629 SI opval = tmp_addr;
2630 * FLD (i_rn) = opval;
2631 if (current_cpu->trace_result_p)
2632 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2636 current_cpu->done_insn (npc, status);
2641 // ********** strh-pre-dec-imm-offset: FIXME
2644 arm_sem_strh_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2646 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2647 sem_status status = SEM_STATUS_NORMAL;
2648 arm_scache* abuf = sem;
2649 PCADDR pc = abuf->addr;
2650 PCADDR npc = pc + 4;
2655 tmp_offset = FLD (i_hdt_offset8);
2656 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2658 HI opval = TRUNCSIHI (* FLD (i_rd));
2659 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2660 if (current_cpu->trace_result_p)
2661 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2667 current_cpu->done_insn (npc, status);
2672 // ********** strh-pre-dec-reg-offset: FIXME
2675 arm_sem_strh_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2677 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2678 sem_status status = SEM_STATUS_NORMAL;
2679 arm_scache* abuf = sem;
2680 PCADDR pc = abuf->addr;
2681 PCADDR npc = pc + 4;
2686 tmp_offset = * FLD (i_rm);
2687 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2689 HI opval = TRUNCSIHI (* FLD (i_rd));
2690 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2691 if (current_cpu->trace_result_p)
2692 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2698 current_cpu->done_insn (npc, status);
2703 // ********** strh-pre-inc-imm-offset: FIXME
2706 arm_sem_strh_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2708 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2709 sem_status status = SEM_STATUS_NORMAL;
2710 arm_scache* abuf = sem;
2711 PCADDR pc = abuf->addr;
2712 PCADDR npc = pc + 4;
2717 tmp_offset = FLD (i_hdt_offset8);
2718 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2720 HI opval = TRUNCSIHI (* FLD (i_rd));
2721 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2722 if (current_cpu->trace_result_p)
2723 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2729 current_cpu->done_insn (npc, status);
2734 // ********** strh-pre-inc-reg-offset: FIXME
2737 arm_sem_strh_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2739 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2740 sem_status status = SEM_STATUS_NORMAL;
2741 arm_scache* abuf = sem;
2742 PCADDR pc = abuf->addr;
2743 PCADDR npc = pc + 4;
2748 tmp_offset = * FLD (i_rm);
2749 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2751 HI opval = TRUNCSIHI (* FLD (i_rd));
2752 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2753 if (current_cpu->trace_result_p)
2754 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2760 current_cpu->done_insn (npc, status);
2765 // ********** strh-pre-dec-wb-imm-offset: FIXME
2768 arm_sem_strh_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2770 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2771 sem_status status = SEM_STATUS_NORMAL;
2772 arm_scache* abuf = sem;
2773 PCADDR pc = abuf->addr;
2774 PCADDR npc = pc + 4;
2779 tmp_offset = FLD (i_hdt_offset8);
2780 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2782 HI opval = TRUNCSIHI (* FLD (i_rd));
2783 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2784 if (current_cpu->trace_result_p)
2785 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2789 SI opval = tmp_addr;
2790 * FLD (i_rn) = opval;
2791 if (current_cpu->trace_result_p)
2792 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2796 current_cpu->done_insn (npc, status);
2801 // ********** strh-pre-dec-wb-reg-offset: FIXME
2804 arm_sem_strh_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2806 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2807 sem_status status = SEM_STATUS_NORMAL;
2808 arm_scache* abuf = sem;
2809 PCADDR pc = abuf->addr;
2810 PCADDR npc = pc + 4;
2815 tmp_offset = * FLD (i_rm);
2816 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2818 HI opval = TRUNCSIHI (* FLD (i_rd));
2819 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2820 if (current_cpu->trace_result_p)
2821 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2825 SI opval = tmp_addr;
2826 * FLD (i_rn) = opval;
2827 if (current_cpu->trace_result_p)
2828 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2832 current_cpu->done_insn (npc, status);
2837 // ********** strh-pre-inc-wb-imm-offset: FIXME
2840 arm_sem_strh_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2842 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2843 sem_status status = SEM_STATUS_NORMAL;
2844 arm_scache* abuf = sem;
2845 PCADDR pc = abuf->addr;
2846 PCADDR npc = pc + 4;
2851 tmp_offset = FLD (i_hdt_offset8);
2852 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2854 HI opval = TRUNCSIHI (* FLD (i_rd));
2855 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2856 if (current_cpu->trace_result_p)
2857 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2861 SI opval = tmp_addr;
2862 * FLD (i_rn) = opval;
2863 if (current_cpu->trace_result_p)
2864 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2868 current_cpu->done_insn (npc, status);
2873 // ********** strh-pre-inc-wb-reg-offset: FIXME
2876 arm_sem_strh_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2878 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2879 sem_status status = SEM_STATUS_NORMAL;
2880 arm_scache* abuf = sem;
2881 PCADDR pc = abuf->addr;
2882 PCADDR npc = pc + 4;
2887 tmp_offset = * FLD (i_rm);
2888 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
2890 HI opval = TRUNCSIHI (* FLD (i_rd));
2891 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2892 if (current_cpu->trace_result_p)
2893 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2897 SI opval = tmp_addr;
2898 * FLD (i_rn) = opval;
2899 if (current_cpu->trace_result_p)
2900 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2904 current_cpu->done_insn (npc, status);
2909 // ********** strh-post-dec-imm-offset: FIXME
2912 arm_sem_strh_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2914 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2915 sem_status status = SEM_STATUS_NORMAL;
2916 arm_scache* abuf = sem;
2917 PCADDR pc = abuf->addr;
2918 PCADDR npc = pc + 4;
2923 tmp_offset = FLD (i_hdt_offset8);
2924 tmp_addr = * FLD (i_rn);
2926 HI opval = TRUNCSIHI (* FLD (i_rd));
2927 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2928 if (current_cpu->trace_result_p)
2929 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2931 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2933 SI opval = tmp_addr;
2934 * FLD (i_rn) = opval;
2935 if (current_cpu->trace_result_p)
2936 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2940 current_cpu->done_insn (npc, status);
2945 // ********** strh-post-dec-reg-offset: FIXME
2948 arm_sem_strh_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2950 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
2951 sem_status status = SEM_STATUS_NORMAL;
2952 arm_scache* abuf = sem;
2953 PCADDR pc = abuf->addr;
2954 PCADDR npc = pc + 4;
2959 tmp_offset = * FLD (i_rm);
2960 tmp_addr = * FLD (i_rn);
2962 HI opval = TRUNCSIHI (* FLD (i_rd));
2963 current_cpu->SETMEMHI (pc, tmp_addr, opval);
2964 if (current_cpu->trace_result_p)
2965 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
2967 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
2969 SI opval = tmp_addr;
2970 * FLD (i_rn) = opval;
2971 if (current_cpu->trace_result_p)
2972 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
2976 current_cpu->done_insn (npc, status);
2981 // ********** strh-post-inc-imm-offset: FIXME
2984 arm_sem_strh_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
2986 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
2987 sem_status status = SEM_STATUS_NORMAL;
2988 arm_scache* abuf = sem;
2989 PCADDR pc = abuf->addr;
2990 PCADDR npc = pc + 4;
2995 tmp_offset = FLD (i_hdt_offset8);
2996 tmp_addr = * FLD (i_rn);
2998 HI opval = TRUNCSIHI (* FLD (i_rd));
2999 current_cpu->SETMEMHI (pc, tmp_addr, opval);
3000 if (current_cpu->trace_result_p)
3001 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
3003 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3005 SI opval = tmp_addr;
3006 * FLD (i_rn) = opval;
3007 if (current_cpu->trace_result_p)
3008 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3012 current_cpu->done_insn (npc, status);
3017 // ********** strh-post-inc-reg-offset: FIXME
3020 arm_sem_strh_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3022 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3023 sem_status status = SEM_STATUS_NORMAL;
3024 arm_scache* abuf = sem;
3025 PCADDR pc = abuf->addr;
3026 PCADDR npc = pc + 4;
3031 tmp_offset = * FLD (i_rm);
3032 tmp_addr = * FLD (i_rn);
3034 HI opval = TRUNCSIHI (* FLD (i_rd));
3035 current_cpu->SETMEMHI (pc, tmp_addr, opval);
3036 if (current_cpu->trace_result_p)
3037 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
3039 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3041 SI opval = tmp_addr;
3042 * FLD (i_rn) = opval;
3043 if (current_cpu->trace_result_p)
3044 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3048 current_cpu->done_insn (npc, status);
3053 // ********** ldrsb-pre-dec-imm-offset: FIXME
3056 arm_sem_ldrsb_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3058 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3059 sem_status status = SEM_STATUS_NORMAL;
3060 arm_scache* abuf = sem;
3061 PCADDR pc = abuf->addr;
3062 PCADDR npc = pc + 4;
3067 tmp_offset = FLD (i_hdt_offset8);
3068 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3069 if (EQSI (FLD (f_rd), 15)) {
3071 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3072 current_cpu->branch (opval, npc, status);
3073 if (current_cpu->trace_result_p)
3074 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3078 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3079 * FLD (i_rd) = opval;
3080 if (current_cpu->trace_result_p)
3081 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3088 current_cpu->done_cti_insn (npc, status);
3093 // ********** ldrsb-pre-dec-reg-offset: FIXME
3096 arm_sem_ldrsb_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3098 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3099 sem_status status = SEM_STATUS_NORMAL;
3100 arm_scache* abuf = sem;
3101 PCADDR pc = abuf->addr;
3102 PCADDR npc = pc + 4;
3107 tmp_offset = * FLD (i_rm);
3108 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3109 if (EQSI (FLD (f_rd), 15)) {
3111 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3112 current_cpu->branch (opval, npc, status);
3113 if (current_cpu->trace_result_p)
3114 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3118 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3119 * FLD (i_rd) = opval;
3120 if (current_cpu->trace_result_p)
3121 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3128 current_cpu->done_cti_insn (npc, status);
3133 // ********** ldrsb-pre-inc-imm-offset: FIXME
3136 arm_sem_ldrsb_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3138 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3139 sem_status status = SEM_STATUS_NORMAL;
3140 arm_scache* abuf = sem;
3141 PCADDR pc = abuf->addr;
3142 PCADDR npc = pc + 4;
3147 tmp_offset = FLD (i_hdt_offset8);
3148 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3149 if (EQSI (FLD (f_rd), 15)) {
3151 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3152 current_cpu->branch (opval, npc, status);
3153 if (current_cpu->trace_result_p)
3154 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3158 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3159 * FLD (i_rd) = opval;
3160 if (current_cpu->trace_result_p)
3161 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3168 current_cpu->done_cti_insn (npc, status);
3173 // ********** ldrsb-pre-inc-reg-offset: FIXME
3176 arm_sem_ldrsb_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3178 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3179 sem_status status = SEM_STATUS_NORMAL;
3180 arm_scache* abuf = sem;
3181 PCADDR pc = abuf->addr;
3182 PCADDR npc = pc + 4;
3187 tmp_offset = * FLD (i_rm);
3188 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3189 if (EQSI (FLD (f_rd), 15)) {
3191 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3192 current_cpu->branch (opval, npc, status);
3193 if (current_cpu->trace_result_p)
3194 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3198 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3199 * FLD (i_rd) = opval;
3200 if (current_cpu->trace_result_p)
3201 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3208 current_cpu->done_cti_insn (npc, status);
3213 // ********** ldrsb-pre-dec-wb-imm-offset: FIXME
3216 arm_sem_ldrsb_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3218 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3219 sem_status status = SEM_STATUS_NORMAL;
3220 arm_scache* abuf = sem;
3221 PCADDR pc = abuf->addr;
3222 PCADDR npc = pc + 4;
3227 tmp_offset = FLD (i_hdt_offset8);
3228 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3229 if (EQSI (FLD (f_rd), 15)) {
3231 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3232 current_cpu->branch (opval, npc, status);
3233 if (current_cpu->trace_result_p)
3234 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3238 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3239 * FLD (i_rd) = opval;
3240 if (current_cpu->trace_result_p)
3241 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3246 SI opval = tmp_addr;
3247 * FLD (i_rn) = opval;
3248 if (current_cpu->trace_result_p)
3249 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3253 current_cpu->done_cti_insn (npc, status);
3258 // ********** ldrsb-pre-dec-wb-reg-offset: FIXME
3261 arm_sem_ldrsb_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3263 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3264 sem_status status = SEM_STATUS_NORMAL;
3265 arm_scache* abuf = sem;
3266 PCADDR pc = abuf->addr;
3267 PCADDR npc = pc + 4;
3272 tmp_offset = * FLD (i_rm);
3273 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3274 if (EQSI (FLD (f_rd), 15)) {
3276 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3277 current_cpu->branch (opval, npc, status);
3278 if (current_cpu->trace_result_p)
3279 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3283 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3284 * FLD (i_rd) = opval;
3285 if (current_cpu->trace_result_p)
3286 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3291 SI opval = tmp_addr;
3292 * FLD (i_rn) = opval;
3293 if (current_cpu->trace_result_p)
3294 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3298 current_cpu->done_cti_insn (npc, status);
3303 // ********** ldrsb-pre-inc-wb-imm-offset: FIXME
3306 arm_sem_ldrsb_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3308 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3309 sem_status status = SEM_STATUS_NORMAL;
3310 arm_scache* abuf = sem;
3311 PCADDR pc = abuf->addr;
3312 PCADDR npc = pc + 4;
3317 tmp_offset = FLD (i_hdt_offset8);
3318 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3319 if (EQSI (FLD (f_rd), 15)) {
3321 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3322 current_cpu->branch (opval, npc, status);
3323 if (current_cpu->trace_result_p)
3324 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3328 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3329 * FLD (i_rd) = opval;
3330 if (current_cpu->trace_result_p)
3331 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3336 SI opval = tmp_addr;
3337 * FLD (i_rn) = opval;
3338 if (current_cpu->trace_result_p)
3339 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3343 current_cpu->done_cti_insn (npc, status);
3348 // ********** ldrsb-pre-inc-wb-reg-offset: FIXME
3351 arm_sem_ldrsb_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3353 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3354 sem_status status = SEM_STATUS_NORMAL;
3355 arm_scache* abuf = sem;
3356 PCADDR pc = abuf->addr;
3357 PCADDR npc = pc + 4;
3362 tmp_offset = * FLD (i_rm);
3363 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3364 if (EQSI (FLD (f_rd), 15)) {
3366 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3367 current_cpu->branch (opval, npc, status);
3368 if (current_cpu->trace_result_p)
3369 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3373 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3374 * FLD (i_rd) = opval;
3375 if (current_cpu->trace_result_p)
3376 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3381 SI opval = tmp_addr;
3382 * FLD (i_rn) = opval;
3383 if (current_cpu->trace_result_p)
3384 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3388 current_cpu->done_cti_insn (npc, status);
3393 // ********** ldrsb-post-dec-imm-offset: FIXME
3396 arm_sem_ldrsb_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3398 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3399 sem_status status = SEM_STATUS_NORMAL;
3400 arm_scache* abuf = sem;
3401 PCADDR pc = abuf->addr;
3402 PCADDR npc = pc + 4;
3407 tmp_offset = FLD (i_hdt_offset8);
3408 tmp_addr = * FLD (i_rn);
3409 if (EQSI (FLD (f_rd), 15)) {
3411 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3412 current_cpu->branch (opval, npc, status);
3413 if (current_cpu->trace_result_p)
3414 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3418 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3419 * FLD (i_rd) = opval;
3420 if (current_cpu->trace_result_p)
3421 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3424 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3426 SI opval = tmp_addr;
3427 * FLD (i_rn) = opval;
3428 if (current_cpu->trace_result_p)
3429 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3433 current_cpu->done_cti_insn (npc, status);
3438 // ********** ldrsb-post-dec-reg-offset: FIXME
3441 arm_sem_ldrsb_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3443 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3444 sem_status status = SEM_STATUS_NORMAL;
3445 arm_scache* abuf = sem;
3446 PCADDR pc = abuf->addr;
3447 PCADDR npc = pc + 4;
3452 tmp_offset = * FLD (i_rm);
3453 tmp_addr = * FLD (i_rn);
3454 if (EQSI (FLD (f_rd), 15)) {
3456 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3457 current_cpu->branch (opval, npc, status);
3458 if (current_cpu->trace_result_p)
3459 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3463 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3464 * FLD (i_rd) = opval;
3465 if (current_cpu->trace_result_p)
3466 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3469 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3471 SI opval = tmp_addr;
3472 * FLD (i_rn) = opval;
3473 if (current_cpu->trace_result_p)
3474 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3478 current_cpu->done_cti_insn (npc, status);
3483 // ********** ldrsb-post-inc-imm-offset: FIXME
3486 arm_sem_ldrsb_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3488 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3489 sem_status status = SEM_STATUS_NORMAL;
3490 arm_scache* abuf = sem;
3491 PCADDR pc = abuf->addr;
3492 PCADDR npc = pc + 4;
3497 tmp_offset = FLD (i_hdt_offset8);
3498 tmp_addr = * FLD (i_rn);
3499 if (EQSI (FLD (f_rd), 15)) {
3501 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3502 current_cpu->branch (opval, npc, status);
3503 if (current_cpu->trace_result_p)
3504 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3508 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3509 * FLD (i_rd) = opval;
3510 if (current_cpu->trace_result_p)
3511 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3514 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3516 SI opval = tmp_addr;
3517 * FLD (i_rn) = opval;
3518 if (current_cpu->trace_result_p)
3519 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3523 current_cpu->done_cti_insn (npc, status);
3528 // ********** ldrsb-post-inc-reg-offset: FIXME
3531 arm_sem_ldrsb_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3533 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3534 sem_status status = SEM_STATUS_NORMAL;
3535 arm_scache* abuf = sem;
3536 PCADDR pc = abuf->addr;
3537 PCADDR npc = pc + 4;
3542 tmp_offset = * FLD (i_rm);
3543 tmp_addr = * FLD (i_rn);
3544 if (EQSI (FLD (f_rd), 15)) {
3546 USI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3547 current_cpu->branch (opval, npc, status);
3548 if (current_cpu->trace_result_p)
3549 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3553 SI opval = EXTQISI (current_cpu->GETMEMQI (pc, tmp_addr));
3554 * FLD (i_rd) = opval;
3555 if (current_cpu->trace_result_p)
3556 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3559 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3561 SI opval = tmp_addr;
3562 * FLD (i_rn) = opval;
3563 if (current_cpu->trace_result_p)
3564 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3568 current_cpu->done_cti_insn (npc, status);
3573 // ********** ldrh-pre-dec-imm-offset: FIXME
3576 arm_sem_ldrh_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3578 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3579 sem_status status = SEM_STATUS_NORMAL;
3580 arm_scache* abuf = sem;
3581 PCADDR pc = abuf->addr;
3582 PCADDR npc = pc + 4;
3587 tmp_offset = FLD (i_hdt_offset8);
3588 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3589 if (EQSI (FLD (f_rd), 15)) {
3591 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3592 current_cpu->branch (opval, npc, status);
3593 if (current_cpu->trace_result_p)
3594 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3598 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3599 * FLD (i_rd) = opval;
3600 if (current_cpu->trace_result_p)
3601 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3608 current_cpu->done_cti_insn (npc, status);
3613 // ********** ldrh-pre-dec-reg-offset: FIXME
3616 arm_sem_ldrh_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3618 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3619 sem_status status = SEM_STATUS_NORMAL;
3620 arm_scache* abuf = sem;
3621 PCADDR pc = abuf->addr;
3622 PCADDR npc = pc + 4;
3627 tmp_offset = * FLD (i_rm);
3628 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3629 if (EQSI (FLD (f_rd), 15)) {
3631 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3632 current_cpu->branch (opval, npc, status);
3633 if (current_cpu->trace_result_p)
3634 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3638 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3639 * FLD (i_rd) = opval;
3640 if (current_cpu->trace_result_p)
3641 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3648 current_cpu->done_cti_insn (npc, status);
3653 // ********** ldrh-pre-inc-imm-offset: FIXME
3656 arm_sem_ldrh_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3658 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3659 sem_status status = SEM_STATUS_NORMAL;
3660 arm_scache* abuf = sem;
3661 PCADDR pc = abuf->addr;
3662 PCADDR npc = pc + 4;
3667 tmp_offset = FLD (i_hdt_offset8);
3668 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3669 if (EQSI (FLD (f_rd), 15)) {
3671 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3672 current_cpu->branch (opval, npc, status);
3673 if (current_cpu->trace_result_p)
3674 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3678 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3679 * FLD (i_rd) = opval;
3680 if (current_cpu->trace_result_p)
3681 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3688 current_cpu->done_cti_insn (npc, status);
3693 // ********** ldrh-pre-inc-reg-offset: FIXME
3696 arm_sem_ldrh_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3698 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3699 sem_status status = SEM_STATUS_NORMAL;
3700 arm_scache* abuf = sem;
3701 PCADDR pc = abuf->addr;
3702 PCADDR npc = pc + 4;
3707 tmp_offset = * FLD (i_rm);
3708 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3709 if (EQSI (FLD (f_rd), 15)) {
3711 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3712 current_cpu->branch (opval, npc, status);
3713 if (current_cpu->trace_result_p)
3714 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3718 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3719 * FLD (i_rd) = opval;
3720 if (current_cpu->trace_result_p)
3721 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3728 current_cpu->done_cti_insn (npc, status);
3733 // ********** ldrh-pre-dec-wb-imm-offset: FIXME
3736 arm_sem_ldrh_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3738 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3739 sem_status status = SEM_STATUS_NORMAL;
3740 arm_scache* abuf = sem;
3741 PCADDR pc = abuf->addr;
3742 PCADDR npc = pc + 4;
3747 tmp_offset = FLD (i_hdt_offset8);
3748 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3749 if (EQSI (FLD (f_rd), 15)) {
3751 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3752 current_cpu->branch (opval, npc, status);
3753 if (current_cpu->trace_result_p)
3754 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3758 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3759 * FLD (i_rd) = opval;
3760 if (current_cpu->trace_result_p)
3761 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3766 SI opval = tmp_addr;
3767 * FLD (i_rn) = opval;
3768 if (current_cpu->trace_result_p)
3769 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3773 current_cpu->done_cti_insn (npc, status);
3778 // ********** ldrh-pre-dec-wb-reg-offset: FIXME
3781 arm_sem_ldrh_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3783 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3784 sem_status status = SEM_STATUS_NORMAL;
3785 arm_scache* abuf = sem;
3786 PCADDR pc = abuf->addr;
3787 PCADDR npc = pc + 4;
3792 tmp_offset = * FLD (i_rm);
3793 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3794 if (EQSI (FLD (f_rd), 15)) {
3796 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3797 current_cpu->branch (opval, npc, status);
3798 if (current_cpu->trace_result_p)
3799 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3803 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3804 * FLD (i_rd) = opval;
3805 if (current_cpu->trace_result_p)
3806 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3811 SI opval = tmp_addr;
3812 * FLD (i_rn) = opval;
3813 if (current_cpu->trace_result_p)
3814 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3818 current_cpu->done_cti_insn (npc, status);
3823 // ********** ldrh-pre-inc-wb-imm-offset: FIXME
3826 arm_sem_ldrh_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3828 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3829 sem_status status = SEM_STATUS_NORMAL;
3830 arm_scache* abuf = sem;
3831 PCADDR pc = abuf->addr;
3832 PCADDR npc = pc + 4;
3837 tmp_offset = FLD (i_hdt_offset8);
3838 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3839 if (EQSI (FLD (f_rd), 15)) {
3841 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3842 current_cpu->branch (opval, npc, status);
3843 if (current_cpu->trace_result_p)
3844 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3848 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3849 * FLD (i_rd) = opval;
3850 if (current_cpu->trace_result_p)
3851 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3856 SI opval = tmp_addr;
3857 * FLD (i_rn) = opval;
3858 if (current_cpu->trace_result_p)
3859 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3863 current_cpu->done_cti_insn (npc, status);
3868 // ********** ldrh-pre-inc-wb-reg-offset: FIXME
3871 arm_sem_ldrh_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3873 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3874 sem_status status = SEM_STATUS_NORMAL;
3875 arm_scache* abuf = sem;
3876 PCADDR pc = abuf->addr;
3877 PCADDR npc = pc + 4;
3882 tmp_offset = * FLD (i_rm);
3883 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
3884 if (EQSI (FLD (f_rd), 15)) {
3886 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3887 current_cpu->branch (opval, npc, status);
3888 if (current_cpu->trace_result_p)
3889 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3893 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3894 * FLD (i_rd) = opval;
3895 if (current_cpu->trace_result_p)
3896 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3901 SI opval = tmp_addr;
3902 * FLD (i_rn) = opval;
3903 if (current_cpu->trace_result_p)
3904 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3908 current_cpu->done_cti_insn (npc, status);
3913 // ********** ldrh-post-dec-imm-offset: FIXME
3916 arm_sem_ldrh_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3918 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
3919 sem_status status = SEM_STATUS_NORMAL;
3920 arm_scache* abuf = sem;
3921 PCADDR pc = abuf->addr;
3922 PCADDR npc = pc + 4;
3927 tmp_offset = FLD (i_hdt_offset8);
3928 tmp_addr = * FLD (i_rn);
3929 if (EQSI (FLD (f_rd), 15)) {
3931 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3932 current_cpu->branch (opval, npc, status);
3933 if (current_cpu->trace_result_p)
3934 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3938 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3939 * FLD (i_rd) = opval;
3940 if (current_cpu->trace_result_p)
3941 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3944 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3946 SI opval = tmp_addr;
3947 * FLD (i_rn) = opval;
3948 if (current_cpu->trace_result_p)
3949 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3953 current_cpu->done_cti_insn (npc, status);
3958 // ********** ldrh-post-dec-reg-offset: FIXME
3961 arm_sem_ldrh_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
3963 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
3964 sem_status status = SEM_STATUS_NORMAL;
3965 arm_scache* abuf = sem;
3966 PCADDR pc = abuf->addr;
3967 PCADDR npc = pc + 4;
3972 tmp_offset = * FLD (i_rm);
3973 tmp_addr = * FLD (i_rn);
3974 if (EQSI (FLD (f_rd), 15)) {
3976 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3977 current_cpu->branch (opval, npc, status);
3978 if (current_cpu->trace_result_p)
3979 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
3983 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
3984 * FLD (i_rd) = opval;
3985 if (current_cpu->trace_result_p)
3986 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
3989 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
3991 SI opval = tmp_addr;
3992 * FLD (i_rn) = opval;
3993 if (current_cpu->trace_result_p)
3994 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
3998 current_cpu->done_cti_insn (npc, status);
4003 // ********** ldrh-post-inc-imm-offset: FIXME
4006 arm_sem_ldrh_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4008 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4009 sem_status status = SEM_STATUS_NORMAL;
4010 arm_scache* abuf = sem;
4011 PCADDR pc = abuf->addr;
4012 PCADDR npc = pc + 4;
4017 tmp_offset = FLD (i_hdt_offset8);
4018 tmp_addr = * FLD (i_rn);
4019 if (EQSI (FLD (f_rd), 15)) {
4021 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4022 current_cpu->branch (opval, npc, status);
4023 if (current_cpu->trace_result_p)
4024 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4028 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4029 * FLD (i_rd) = opval;
4030 if (current_cpu->trace_result_p)
4031 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4034 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4036 SI opval = tmp_addr;
4037 * FLD (i_rn) = opval;
4038 if (current_cpu->trace_result_p)
4039 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4043 current_cpu->done_cti_insn (npc, status);
4048 // ********** ldrh-post-inc-reg-offset: FIXME
4051 arm_sem_ldrh_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4053 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4054 sem_status status = SEM_STATUS_NORMAL;
4055 arm_scache* abuf = sem;
4056 PCADDR pc = abuf->addr;
4057 PCADDR npc = pc + 4;
4062 tmp_offset = * FLD (i_rm);
4063 tmp_addr = * FLD (i_rn);
4064 if (EQSI (FLD (f_rd), 15)) {
4066 USI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4067 current_cpu->branch (opval, npc, status);
4068 if (current_cpu->trace_result_p)
4069 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4073 SI opval = ZEXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4074 * FLD (i_rd) = opval;
4075 if (current_cpu->trace_result_p)
4076 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4079 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4081 SI opval = tmp_addr;
4082 * FLD (i_rn) = opval;
4083 if (current_cpu->trace_result_p)
4084 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4088 current_cpu->done_cti_insn (npc, status);
4093 // ********** ldrsh-pre-dec-imm-offset: FIXME
4096 arm_sem_ldrsh_pre_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4098 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4099 sem_status status = SEM_STATUS_NORMAL;
4100 arm_scache* abuf = sem;
4101 PCADDR pc = abuf->addr;
4102 PCADDR npc = pc + 4;
4107 tmp_offset = FLD (i_hdt_offset8);
4108 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4109 if (EQSI (FLD (f_rd), 15)) {
4111 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4112 current_cpu->branch (opval, npc, status);
4113 if (current_cpu->trace_result_p)
4114 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4118 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4119 * FLD (i_rd) = opval;
4120 if (current_cpu->trace_result_p)
4121 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4128 current_cpu->done_cti_insn (npc, status);
4133 // ********** ldrsh-pre-dec-reg-offset: FIXME
4136 arm_sem_ldrsh_pre_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4138 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4139 sem_status status = SEM_STATUS_NORMAL;
4140 arm_scache* abuf = sem;
4141 PCADDR pc = abuf->addr;
4142 PCADDR npc = pc + 4;
4147 tmp_offset = * FLD (i_rm);
4148 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4149 if (EQSI (FLD (f_rd), 15)) {
4151 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4152 current_cpu->branch (opval, npc, status);
4153 if (current_cpu->trace_result_p)
4154 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4158 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4159 * FLD (i_rd) = opval;
4160 if (current_cpu->trace_result_p)
4161 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4168 current_cpu->done_cti_insn (npc, status);
4173 // ********** ldrsh-pre-inc-imm-offset: FIXME
4176 arm_sem_ldrsh_pre_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4178 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4179 sem_status status = SEM_STATUS_NORMAL;
4180 arm_scache* abuf = sem;
4181 PCADDR pc = abuf->addr;
4182 PCADDR npc = pc + 4;
4187 tmp_offset = FLD (i_hdt_offset8);
4188 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4189 if (EQSI (FLD (f_rd), 15)) {
4191 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4192 current_cpu->branch (opval, npc, status);
4193 if (current_cpu->trace_result_p)
4194 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4198 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4199 * FLD (i_rd) = opval;
4200 if (current_cpu->trace_result_p)
4201 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4208 current_cpu->done_cti_insn (npc, status);
4213 // ********** ldrsh-pre-inc-reg-offset: FIXME
4216 arm_sem_ldrsh_pre_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4218 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4219 sem_status status = SEM_STATUS_NORMAL;
4220 arm_scache* abuf = sem;
4221 PCADDR pc = abuf->addr;
4222 PCADDR npc = pc + 4;
4227 tmp_offset = * FLD (i_rm);
4228 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4229 if (EQSI (FLD (f_rd), 15)) {
4231 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4232 current_cpu->branch (opval, npc, status);
4233 if (current_cpu->trace_result_p)
4234 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4238 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4239 * FLD (i_rd) = opval;
4240 if (current_cpu->trace_result_p)
4241 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4248 current_cpu->done_cti_insn (npc, status);
4253 // ********** ldrsh-pre-dec-wb-imm-offset: FIXME
4256 arm_sem_ldrsh_pre_dec_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4258 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4259 sem_status status = SEM_STATUS_NORMAL;
4260 arm_scache* abuf = sem;
4261 PCADDR pc = abuf->addr;
4262 PCADDR npc = pc + 4;
4267 tmp_offset = FLD (i_hdt_offset8);
4268 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4269 if (EQSI (FLD (f_rd), 15)) {
4271 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4272 current_cpu->branch (opval, npc, status);
4273 if (current_cpu->trace_result_p)
4274 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4278 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4279 * FLD (i_rd) = opval;
4280 if (current_cpu->trace_result_p)
4281 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4286 SI opval = tmp_addr;
4287 * FLD (i_rn) = opval;
4288 if (current_cpu->trace_result_p)
4289 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4293 current_cpu->done_cti_insn (npc, status);
4298 // ********** ldrsh-pre-dec-wb-reg-offset: FIXME
4301 arm_sem_ldrsh_pre_dec_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4303 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4304 sem_status status = SEM_STATUS_NORMAL;
4305 arm_scache* abuf = sem;
4306 PCADDR pc = abuf->addr;
4307 PCADDR npc = pc + 4;
4312 tmp_offset = * FLD (i_rm);
4313 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4314 if (EQSI (FLD (f_rd), 15)) {
4316 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4317 current_cpu->branch (opval, npc, status);
4318 if (current_cpu->trace_result_p)
4319 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4323 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4324 * FLD (i_rd) = opval;
4325 if (current_cpu->trace_result_p)
4326 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4331 SI opval = tmp_addr;
4332 * FLD (i_rn) = opval;
4333 if (current_cpu->trace_result_p)
4334 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4338 current_cpu->done_cti_insn (npc, status);
4343 // ********** ldrsh-pre-inc-wb-imm-offset: FIXME
4346 arm_sem_ldrsh_pre_inc_wb_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4348 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4349 sem_status status = SEM_STATUS_NORMAL;
4350 arm_scache* abuf = sem;
4351 PCADDR pc = abuf->addr;
4352 PCADDR npc = pc + 4;
4357 tmp_offset = FLD (i_hdt_offset8);
4358 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4359 if (EQSI (FLD (f_rd), 15)) {
4361 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4362 current_cpu->branch (opval, npc, status);
4363 if (current_cpu->trace_result_p)
4364 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4368 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4369 * FLD (i_rd) = opval;
4370 if (current_cpu->trace_result_p)
4371 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4376 SI opval = tmp_addr;
4377 * FLD (i_rn) = opval;
4378 if (current_cpu->trace_result_p)
4379 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4383 current_cpu->done_cti_insn (npc, status);
4388 // ********** ldrsh-pre-inc-wb-reg-offset: FIXME
4391 arm_sem_ldrsh_pre_inc_wb_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4393 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4394 sem_status status = SEM_STATUS_NORMAL;
4395 arm_scache* abuf = sem;
4396 PCADDR pc = abuf->addr;
4397 PCADDR npc = pc + 4;
4402 tmp_offset = * FLD (i_rm);
4403 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4404 if (EQSI (FLD (f_rd), 15)) {
4406 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4407 current_cpu->branch (opval, npc, status);
4408 if (current_cpu->trace_result_p)
4409 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4413 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4414 * FLD (i_rd) = opval;
4415 if (current_cpu->trace_result_p)
4416 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4421 SI opval = tmp_addr;
4422 * FLD (i_rn) = opval;
4423 if (current_cpu->trace_result_p)
4424 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4428 current_cpu->done_cti_insn (npc, status);
4433 // ********** ldrsh-post-dec-imm-offset: FIXME
4436 arm_sem_ldrsh_post_dec_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4438 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4439 sem_status status = SEM_STATUS_NORMAL;
4440 arm_scache* abuf = sem;
4441 PCADDR pc = abuf->addr;
4442 PCADDR npc = pc + 4;
4447 tmp_offset = FLD (i_hdt_offset8);
4448 tmp_addr = * FLD (i_rn);
4449 if (EQSI (FLD (f_rd), 15)) {
4451 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4452 current_cpu->branch (opval, npc, status);
4453 if (current_cpu->trace_result_p)
4454 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4458 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4459 * FLD (i_rd) = opval;
4460 if (current_cpu->trace_result_p)
4461 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4464 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4466 SI opval = tmp_addr;
4467 * FLD (i_rn) = opval;
4468 if (current_cpu->trace_result_p)
4469 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4473 current_cpu->done_cti_insn (npc, status);
4478 // ********** ldrsh-post-dec-reg-offset: FIXME
4481 arm_sem_ldrsh_post_dec_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4483 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4484 sem_status status = SEM_STATUS_NORMAL;
4485 arm_scache* abuf = sem;
4486 PCADDR pc = abuf->addr;
4487 PCADDR npc = pc + 4;
4492 tmp_offset = * FLD (i_rm);
4493 tmp_addr = * FLD (i_rn);
4494 if (EQSI (FLD (f_rd), 15)) {
4496 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4497 current_cpu->branch (opval, npc, status);
4498 if (current_cpu->trace_result_p)
4499 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4503 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4504 * FLD (i_rd) = opval;
4505 if (current_cpu->trace_result_p)
4506 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4509 tmp_addr = SUBSI (* FLD (i_rn), tmp_offset);
4511 SI opval = tmp_addr;
4512 * FLD (i_rn) = opval;
4513 if (current_cpu->trace_result_p)
4514 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4518 current_cpu->done_cti_insn (npc, status);
4523 // ********** ldrsh-post-inc-imm-offset: FIXME
4526 arm_sem_ldrsh_post_inc_imm_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4528 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
4529 sem_status status = SEM_STATUS_NORMAL;
4530 arm_scache* abuf = sem;
4531 PCADDR pc = abuf->addr;
4532 PCADDR npc = pc + 4;
4537 tmp_offset = FLD (i_hdt_offset8);
4538 tmp_addr = * FLD (i_rn);
4539 if (EQSI (FLD (f_rd), 15)) {
4541 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4542 current_cpu->branch (opval, npc, status);
4543 if (current_cpu->trace_result_p)
4544 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4548 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4549 * FLD (i_rd) = opval;
4550 if (current_cpu->trace_result_p)
4551 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4554 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4556 SI opval = tmp_addr;
4557 * FLD (i_rn) = opval;
4558 if (current_cpu->trace_result_p)
4559 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4563 current_cpu->done_cti_insn (npc, status);
4568 // ********** ldrsh-post-inc-reg-offset: FIXME
4571 arm_sem_ldrsh_post_inc_reg_offset (arm7f_cpu* current_cpu, arm_scache* sem)
4573 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4574 sem_status status = SEM_STATUS_NORMAL;
4575 arm_scache* abuf = sem;
4576 PCADDR pc = abuf->addr;
4577 PCADDR npc = pc + 4;
4582 tmp_offset = * FLD (i_rm);
4583 tmp_addr = * FLD (i_rn);
4584 if (EQSI (FLD (f_rd), 15)) {
4586 USI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4587 current_cpu->branch (opval, npc, status);
4588 if (current_cpu->trace_result_p)
4589 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4593 SI opval = EXTHISI (current_cpu->GETMEMHI (pc, tmp_addr));
4594 * FLD (i_rd) = opval;
4595 if (current_cpu->trace_result_p)
4596 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4599 tmp_addr = ADDSI (* FLD (i_rn), tmp_offset);
4601 SI opval = tmp_addr;
4602 * FLD (i_rn) = opval;
4603 if (current_cpu->trace_result_p)
4604 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
4608 current_cpu->done_cti_insn (npc, status);
4613 // ********** mul: mul$cond${set-cc?} ${mul-rd},$rm,$rs
4616 arm_sem_mul (arm7f_cpu* current_cpu, arm_scache* sem)
4618 #define FLD(f) abuf->fields.sfmt_mla.f
4619 sem_status status = SEM_STATUS_NORMAL;
4620 arm_scache* abuf = sem;
4621 PCADDR pc = abuf->addr;
4622 PCADDR npc = pc + 4;
4626 tmp_result = MULSI (* FLD (i_rm), * FLD (i_rs));
4628 SI opval = tmp_result;
4629 * FLD (i_mul_rd) = opval;
4630 if (current_cpu->trace_result_p)
4631 current_cpu->trace_stream << "mul-rd" << '[' << FLD (f_mul_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4633 if (FLD (f_set_cc_)) {
4636 BI opval = EQSI (tmp_result, 0);
4637 current_cpu->hardware.h_zbit = opval;
4638 if (current_cpu->trace_result_p)
4639 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4642 BI opval = LTSI (tmp_result, 0);
4643 current_cpu->hardware.h_nbit = opval;
4644 if (current_cpu->trace_result_p)
4645 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4651 current_cpu->done_insn (npc, status);
4656 // ********** mla: mla$cond${set-cc?} ${mul-rd},$rm,$rs,${mul-rn}
4659 arm_sem_mla (arm7f_cpu* current_cpu, arm_scache* sem)
4661 #define FLD(f) abuf->fields.sfmt_mla.f
4662 sem_status status = SEM_STATUS_NORMAL;
4663 arm_scache* abuf = sem;
4664 PCADDR pc = abuf->addr;
4665 PCADDR npc = pc + 4;
4670 SI opval = ADDSI (MULSI (* FLD (i_rm), * FLD (i_rs)), * FLD (i_mul_rn));
4671 * FLD (i_mul_rd) = opval;
4672 if (current_cpu->trace_result_p)
4673 current_cpu->trace_stream << "mul-rd" << '[' << FLD (f_mul_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4675 if (FLD (f_set_cc_)) {
4678 BI opval = EQSI (tmp_result, 0);
4679 current_cpu->hardware.h_zbit = opval;
4680 if (current_cpu->trace_result_p)
4681 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4684 BI opval = LTSI (tmp_result, 0);
4685 current_cpu->hardware.h_nbit = opval;
4686 if (current_cpu->trace_result_p)
4687 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4693 current_cpu->done_insn (npc, status);
4698 // ********** umull: umull$cond${set-cc?} $rdlo,$rdhi,$rm,$rs
4701 arm_sem_umull (arm7f_cpu* current_cpu, arm_scache* sem)
4703 #define FLD(f) abuf->fields.sfmt_umull.f
4704 sem_status status = SEM_STATUS_NORMAL;
4705 arm_scache* abuf = sem;
4706 PCADDR pc = abuf->addr;
4707 PCADDR npc = pc + 4;
4713 tmp_mul_result = MULDI (ZEXTSIDI (* FLD (i_rs)), ZEXTSIDI (* FLD (i_rm)));
4715 SI opval = SUBWORDDISI (tmp_mul_result, 0);
4716 * FLD (i_rdhi) = opval;
4717 if (current_cpu->trace_result_p)
4718 current_cpu->trace_stream << "rdhi" << '[' << FLD (f_rdhi) << ']' << ":=0x" << hex << opval << dec << " ";
4721 SI opval = SUBWORDDISI (tmp_mul_result, 1);
4722 * FLD (i_rdlo) = opval;
4723 if (current_cpu->trace_result_p)
4724 current_cpu->trace_stream << "rdlo" << '[' << FLD (f_rdlo) << ']' << ":=0x" << hex << opval << dec << " ";
4726 if (FLD (f_set_cc_)) {
4729 BI opval = EQDI (tmp_mul_result, 0);
4730 current_cpu->hardware.h_zbit = opval;
4731 if (current_cpu->trace_result_p)
4732 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4735 BI opval = LTDI (tmp_mul_result, 0);
4736 current_cpu->hardware.h_nbit = opval;
4737 if (current_cpu->trace_result_p)
4738 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4744 current_cpu->done_insn (npc, status);
4749 // ********** umlal: umlal$cond${set-cc?} $rdlo,$rdhi,$rm,$rs
4752 arm_sem_umlal (arm7f_cpu* current_cpu, arm_scache* sem)
4754 #define FLD(f) abuf->fields.sfmt_umull.f
4755 sem_status status = SEM_STATUS_NORMAL;
4756 arm_scache* abuf = sem;
4757 PCADDR pc = abuf->addr;
4758 PCADDR npc = pc + 4;
4764 tmp_mul_result = JOINSIDI (* FLD (i_rdhi), * FLD (i_rdlo));
4765 tmp_mul_result = ADDDI (MULDI (ZEXTSIDI (* FLD (i_rs)), ZEXTSIDI (* FLD (i_rm))), tmp_mul_result);
4767 SI opval = SUBWORDDISI (tmp_mul_result, 0);
4768 * FLD (i_rdhi) = opval;
4769 if (current_cpu->trace_result_p)
4770 current_cpu->trace_stream << "rdhi" << '[' << FLD (f_rdhi) << ']' << ":=0x" << hex << opval << dec << " ";
4773 SI opval = SUBWORDDISI (tmp_mul_result, 1);
4774 * FLD (i_rdlo) = opval;
4775 if (current_cpu->trace_result_p)
4776 current_cpu->trace_stream << "rdlo" << '[' << FLD (f_rdlo) << ']' << ":=0x" << hex << opval << dec << " ";
4778 if (FLD (f_set_cc_)) {
4781 BI opval = EQDI (tmp_mul_result, 0);
4782 current_cpu->hardware.h_zbit = opval;
4783 if (current_cpu->trace_result_p)
4784 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4787 BI opval = LTDI (tmp_mul_result, 0);
4788 current_cpu->hardware.h_nbit = opval;
4789 if (current_cpu->trace_result_p)
4790 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4796 current_cpu->done_insn (npc, status);
4801 // ********** smull: smull$cond${set-cc?} $rdlo,$rdhi,$rm,$rs
4804 arm_sem_smull (arm7f_cpu* current_cpu, arm_scache* sem)
4806 #define FLD(f) abuf->fields.sfmt_umull.f
4807 sem_status status = SEM_STATUS_NORMAL;
4808 arm_scache* abuf = sem;
4809 PCADDR pc = abuf->addr;
4810 PCADDR npc = pc + 4;
4816 tmp_mul_result = MULDI (EXTSIDI (* FLD (i_rs)), EXTSIDI (* FLD (i_rm)));
4818 SI opval = SUBWORDDISI (tmp_mul_result, 0);
4819 * FLD (i_rdhi) = opval;
4820 if (current_cpu->trace_result_p)
4821 current_cpu->trace_stream << "rdhi" << '[' << FLD (f_rdhi) << ']' << ":=0x" << hex << opval << dec << " ";
4824 SI opval = SUBWORDDISI (tmp_mul_result, 1);
4825 * FLD (i_rdlo) = opval;
4826 if (current_cpu->trace_result_p)
4827 current_cpu->trace_stream << "rdlo" << '[' << FLD (f_rdlo) << ']' << ":=0x" << hex << opval << dec << " ";
4829 if (FLD (f_set_cc_)) {
4832 BI opval = EQDI (tmp_mul_result, 0);
4833 current_cpu->hardware.h_zbit = opval;
4834 if (current_cpu->trace_result_p)
4835 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4838 BI opval = LTDI (tmp_mul_result, 0);
4839 current_cpu->hardware.h_nbit = opval;
4840 if (current_cpu->trace_result_p)
4841 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4847 current_cpu->done_insn (npc, status);
4852 // ********** smlal: smlal$cond${set-cc?} $rdlo,$rdhi,$rm,$rs
4855 arm_sem_smlal (arm7f_cpu* current_cpu, arm_scache* sem)
4857 #define FLD(f) abuf->fields.sfmt_umull.f
4858 sem_status status = SEM_STATUS_NORMAL;
4859 arm_scache* abuf = sem;
4860 PCADDR pc = abuf->addr;
4861 PCADDR npc = pc + 4;
4867 tmp_mul_result = JOINSIDI (* FLD (i_rdhi), * FLD (i_rdlo));
4868 tmp_mul_result = ADDDI (MULDI (EXTSIDI (* FLD (i_rs)), EXTSIDI (* FLD (i_rm))), tmp_mul_result);
4870 SI opval = SUBWORDDISI (tmp_mul_result, 0);
4871 * FLD (i_rdhi) = opval;
4872 if (current_cpu->trace_result_p)
4873 current_cpu->trace_stream << "rdhi" << '[' << FLD (f_rdhi) << ']' << ":=0x" << hex << opval << dec << " ";
4876 SI opval = SUBWORDDISI (tmp_mul_result, 1);
4877 * FLD (i_rdlo) = opval;
4878 if (current_cpu->trace_result_p)
4879 current_cpu->trace_stream << "rdlo" << '[' << FLD (f_rdlo) << ']' << ":=0x" << hex << opval << dec << " ";
4881 if (FLD (f_set_cc_)) {
4884 BI opval = EQDI (tmp_mul_result, 0);
4885 current_cpu->hardware.h_zbit = opval;
4886 if (current_cpu->trace_result_p)
4887 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
4890 BI opval = LTDI (tmp_mul_result, 0);
4891 current_cpu->hardware.h_nbit = opval;
4892 if (current_cpu->trace_result_p)
4893 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
4899 current_cpu->done_insn (npc, status);
4904 // ********** swp: swp$cond $rd,$rm,[$rn]
4907 arm_sem_swp (arm7f_cpu* current_cpu, arm_scache* sem)
4909 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4910 sem_status status = SEM_STATUS_NORMAL;
4911 arm_scache* abuf = sem;
4912 PCADDR pc = abuf->addr;
4913 PCADDR npc = pc + 4;
4917 tmp_temp = current_cpu->GETMEMSI (pc, * FLD (i_rn));
4919 SI opval = * FLD (i_rm);
4920 current_cpu->SETMEMSI (pc, * FLD (i_rn), opval);
4921 if (current_cpu->trace_result_p)
4922 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) * FLD (i_rn) << dec << ']' << ":=0x" << hex << opval << dec << " ";
4925 SI opval = tmp_temp;
4926 * FLD (i_rd) = opval;
4927 if (current_cpu->trace_result_p)
4928 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4932 current_cpu->done_insn (npc, status);
4937 // ********** swpb: swpb${cond}b $rd,$rm,[$rn]
4940 arm_sem_swpb (arm7f_cpu* current_cpu, arm_scache* sem)
4942 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4943 sem_status status = SEM_STATUS_NORMAL;
4944 arm_scache* abuf = sem;
4945 PCADDR pc = abuf->addr;
4946 PCADDR npc = pc + 4;
4950 tmp_temp = current_cpu->GETMEMQI (pc, * FLD (i_rn));
4952 QI opval = * FLD (i_rm);
4953 current_cpu->SETMEMQI (pc, * FLD (i_rn), opval);
4954 if (current_cpu->trace_result_p)
4955 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) * FLD (i_rn) << dec << ']' << ":=0x" << hex << (SI) opval << dec << " ";
4958 SI opval = tmp_temp;
4959 * FLD (i_rd) = opval;
4960 if (current_cpu->trace_result_p)
4961 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
4965 current_cpu->done_insn (npc, status);
4970 // ********** swi: swi$cond ${swi-comment}
4973 arm_sem_swi (arm7f_cpu* current_cpu, arm_scache* sem)
4975 #define FLD(f) abuf->fields.sfmt_swi.f
4976 sem_status status = SEM_STATUS_NORMAL;
4977 arm_scache* abuf = sem;
4978 PCADDR pc = abuf->addr;
4979 PCADDR npc = pc + 4;
4982 USI opval = current_cpu->arm_swi (pc, FLD (f_swi_comment));
4983 current_cpu->branch (opval, npc, status);
4984 if (current_cpu->trace_result_p)
4985 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
4988 current_cpu->done_cti_insn (npc, status);
4993 // ********** and-reg/imm-shift: and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
4996 arm_sem_and_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
4998 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
4999 sem_status status = SEM_STATUS_NORMAL;
5000 arm_scache* abuf = sem;
5001 PCADDR pc = abuf->addr;
5002 PCADDR npc = pc + 4;
5008 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
5009 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
5010 tmp_result = ANDSI (* FLD (i_rn), tmp_operand2);
5011 if (EQSI (FLD (f_rd), 15)) {
5014 USI opval = tmp_result;
5015 current_cpu->branch (opval, npc, status);
5016 if (current_cpu->trace_result_p)
5017 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5019 if (FLD (f_set_cc_)) {
5021 SI opval = current_cpu->h_spsr_get ();
5022 current_cpu->h_cpsr_set (opval);
5023 if (current_cpu->trace_result_p)
5024 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5031 SI opval = tmp_result;
5032 * FLD (i_rd) = opval;
5033 if (current_cpu->trace_result_p)
5034 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5036 if (FLD (f_set_cc_)) {
5040 BI opval = EQSI (tmp_result, 0);
5041 current_cpu->hardware.h_zbit = opval;
5042 if (current_cpu->trace_result_p)
5043 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5046 BI opval = LTSI (tmp_result, 0);
5047 current_cpu->hardware.h_nbit = opval;
5048 if (current_cpu->trace_result_p)
5049 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5053 BI opval = tmp_carry_out;
5054 current_cpu->hardware.h_cbit = opval;
5055 if (current_cpu->trace_result_p)
5056 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5064 current_cpu->done_cti_insn (npc, status);
5069 // ********** and-reg/reg-shift: and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
5072 arm_sem_and_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5074 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
5075 sem_status status = SEM_STATUS_NORMAL;
5076 arm_scache* abuf = sem;
5077 PCADDR pc = abuf->addr;
5078 PCADDR npc = pc + 4;
5084 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
5085 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
5086 tmp_result = ANDSI (* FLD (i_rn), tmp_operand2);
5087 if (EQSI (FLD (f_rd), 15)) {
5090 USI opval = tmp_result;
5091 current_cpu->branch (opval, npc, status);
5092 if (current_cpu->trace_result_p)
5093 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5095 if (FLD (f_set_cc_)) {
5097 SI opval = current_cpu->h_spsr_get ();
5098 current_cpu->h_cpsr_set (opval);
5099 if (current_cpu->trace_result_p)
5100 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5107 SI opval = tmp_result;
5108 * FLD (i_rd) = opval;
5109 if (current_cpu->trace_result_p)
5110 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5112 if (FLD (f_set_cc_)) {
5116 BI opval = EQSI (tmp_result, 0);
5117 current_cpu->hardware.h_zbit = opval;
5118 if (current_cpu->trace_result_p)
5119 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5122 BI opval = LTSI (tmp_result, 0);
5123 current_cpu->hardware.h_nbit = opval;
5124 if (current_cpu->trace_result_p)
5125 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5129 BI opval = tmp_carry_out;
5130 current_cpu->hardware.h_cbit = opval;
5131 if (current_cpu->trace_result_p)
5132 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5140 current_cpu->done_cti_insn (npc, status);
5145 // ********** and-imm: and$cond${set-cc?} $rd,$rn,$imm12
5148 arm_sem_and_imm (arm7f_cpu* current_cpu, arm_scache* sem)
5150 #define FLD(f) abuf->fields.sfmt_and_imm.f
5151 sem_status status = SEM_STATUS_NORMAL;
5152 arm_scache* abuf = sem;
5153 PCADDR pc = abuf->addr;
5154 PCADDR npc = pc + 4;
5158 tmp_result = ANDSI (* FLD (i_rn), FLD (f_imm12));
5159 if (EQSI (FLD (f_rd), 15)) {
5162 USI opval = tmp_result;
5163 current_cpu->branch (opval, npc, status);
5164 if (current_cpu->trace_result_p)
5165 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5167 if (FLD (f_set_cc_)) {
5169 SI opval = current_cpu->h_spsr_get ();
5170 current_cpu->h_cpsr_set (opval);
5171 if (current_cpu->trace_result_p)
5172 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5179 SI opval = tmp_result;
5180 * FLD (i_rd) = opval;
5181 if (current_cpu->trace_result_p)
5182 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5184 if (FLD (f_set_cc_)) {
5187 BI opval = EQSI (tmp_result, 0);
5188 current_cpu->hardware.h_zbit = opval;
5189 if (current_cpu->trace_result_p)
5190 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5193 BI opval = LTSI (tmp_result, 0);
5194 current_cpu->hardware.h_nbit = opval;
5195 if (current_cpu->trace_result_p)
5196 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5204 current_cpu->done_cti_insn (npc, status);
5209 // ********** orr-reg/imm-shift: orr$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
5212 arm_sem_orr_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5214 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
5215 sem_status status = SEM_STATUS_NORMAL;
5216 arm_scache* abuf = sem;
5217 PCADDR pc = abuf->addr;
5218 PCADDR npc = pc + 4;
5224 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
5225 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
5226 tmp_result = ORSI (* FLD (i_rn), tmp_operand2);
5227 if (EQSI (FLD (f_rd), 15)) {
5230 USI opval = tmp_result;
5231 current_cpu->branch (opval, npc, status);
5232 if (current_cpu->trace_result_p)
5233 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5235 if (FLD (f_set_cc_)) {
5237 SI opval = current_cpu->h_spsr_get ();
5238 current_cpu->h_cpsr_set (opval);
5239 if (current_cpu->trace_result_p)
5240 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5247 SI opval = tmp_result;
5248 * FLD (i_rd) = opval;
5249 if (current_cpu->trace_result_p)
5250 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5252 if (FLD (f_set_cc_)) {
5256 BI opval = EQSI (tmp_result, 0);
5257 current_cpu->hardware.h_zbit = opval;
5258 if (current_cpu->trace_result_p)
5259 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5262 BI opval = LTSI (tmp_result, 0);
5263 current_cpu->hardware.h_nbit = opval;
5264 if (current_cpu->trace_result_p)
5265 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5269 BI opval = tmp_carry_out;
5270 current_cpu->hardware.h_cbit = opval;
5271 if (current_cpu->trace_result_p)
5272 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5280 current_cpu->done_cti_insn (npc, status);
5285 // ********** orr-reg/reg-shift: orr$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
5288 arm_sem_orr_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5290 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
5291 sem_status status = SEM_STATUS_NORMAL;
5292 arm_scache* abuf = sem;
5293 PCADDR pc = abuf->addr;
5294 PCADDR npc = pc + 4;
5300 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
5301 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
5302 tmp_result = ORSI (* FLD (i_rn), tmp_operand2);
5303 if (EQSI (FLD (f_rd), 15)) {
5306 USI opval = tmp_result;
5307 current_cpu->branch (opval, npc, status);
5308 if (current_cpu->trace_result_p)
5309 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5311 if (FLD (f_set_cc_)) {
5313 SI opval = current_cpu->h_spsr_get ();
5314 current_cpu->h_cpsr_set (opval);
5315 if (current_cpu->trace_result_p)
5316 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5323 SI opval = tmp_result;
5324 * FLD (i_rd) = opval;
5325 if (current_cpu->trace_result_p)
5326 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5328 if (FLD (f_set_cc_)) {
5332 BI opval = EQSI (tmp_result, 0);
5333 current_cpu->hardware.h_zbit = opval;
5334 if (current_cpu->trace_result_p)
5335 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5338 BI opval = LTSI (tmp_result, 0);
5339 current_cpu->hardware.h_nbit = opval;
5340 if (current_cpu->trace_result_p)
5341 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5345 BI opval = tmp_carry_out;
5346 current_cpu->hardware.h_cbit = opval;
5347 if (current_cpu->trace_result_p)
5348 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5356 current_cpu->done_cti_insn (npc, status);
5361 // ********** orr-imm: orr$cond${set-cc?} $rd,$rn,$imm12
5364 arm_sem_orr_imm (arm7f_cpu* current_cpu, arm_scache* sem)
5366 #define FLD(f) abuf->fields.sfmt_and_imm.f
5367 sem_status status = SEM_STATUS_NORMAL;
5368 arm_scache* abuf = sem;
5369 PCADDR pc = abuf->addr;
5370 PCADDR npc = pc + 4;
5374 tmp_result = ORSI (* FLD (i_rn), FLD (f_imm12));
5375 if (EQSI (FLD (f_rd), 15)) {
5378 USI opval = tmp_result;
5379 current_cpu->branch (opval, npc, status);
5380 if (current_cpu->trace_result_p)
5381 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5383 if (FLD (f_set_cc_)) {
5385 SI opval = current_cpu->h_spsr_get ();
5386 current_cpu->h_cpsr_set (opval);
5387 if (current_cpu->trace_result_p)
5388 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5395 SI opval = tmp_result;
5396 * FLD (i_rd) = opval;
5397 if (current_cpu->trace_result_p)
5398 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5400 if (FLD (f_set_cc_)) {
5403 BI opval = EQSI (tmp_result, 0);
5404 current_cpu->hardware.h_zbit = opval;
5405 if (current_cpu->trace_result_p)
5406 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5409 BI opval = LTSI (tmp_result, 0);
5410 current_cpu->hardware.h_nbit = opval;
5411 if (current_cpu->trace_result_p)
5412 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5420 current_cpu->done_cti_insn (npc, status);
5425 // ********** eor-reg/imm-shift: eor$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
5428 arm_sem_eor_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5430 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
5431 sem_status status = SEM_STATUS_NORMAL;
5432 arm_scache* abuf = sem;
5433 PCADDR pc = abuf->addr;
5434 PCADDR npc = pc + 4;
5440 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
5441 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
5442 tmp_result = XORSI (* FLD (i_rn), tmp_operand2);
5443 if (EQSI (FLD (f_rd), 15)) {
5446 USI opval = tmp_result;
5447 current_cpu->branch (opval, npc, status);
5448 if (current_cpu->trace_result_p)
5449 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5451 if (FLD (f_set_cc_)) {
5453 SI opval = current_cpu->h_spsr_get ();
5454 current_cpu->h_cpsr_set (opval);
5455 if (current_cpu->trace_result_p)
5456 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5463 SI opval = tmp_result;
5464 * FLD (i_rd) = opval;
5465 if (current_cpu->trace_result_p)
5466 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5468 if (FLD (f_set_cc_)) {
5472 BI opval = EQSI (tmp_result, 0);
5473 current_cpu->hardware.h_zbit = opval;
5474 if (current_cpu->trace_result_p)
5475 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5478 BI opval = LTSI (tmp_result, 0);
5479 current_cpu->hardware.h_nbit = opval;
5480 if (current_cpu->trace_result_p)
5481 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5485 BI opval = tmp_carry_out;
5486 current_cpu->hardware.h_cbit = opval;
5487 if (current_cpu->trace_result_p)
5488 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5496 current_cpu->done_cti_insn (npc, status);
5501 // ********** eor-reg/reg-shift: eor$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
5504 arm_sem_eor_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5506 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
5507 sem_status status = SEM_STATUS_NORMAL;
5508 arm_scache* abuf = sem;
5509 PCADDR pc = abuf->addr;
5510 PCADDR npc = pc + 4;
5516 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
5517 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
5518 tmp_result = XORSI (* FLD (i_rn), tmp_operand2);
5519 if (EQSI (FLD (f_rd), 15)) {
5522 USI opval = tmp_result;
5523 current_cpu->branch (opval, npc, status);
5524 if (current_cpu->trace_result_p)
5525 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5527 if (FLD (f_set_cc_)) {
5529 SI opval = current_cpu->h_spsr_get ();
5530 current_cpu->h_cpsr_set (opval);
5531 if (current_cpu->trace_result_p)
5532 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5539 SI opval = tmp_result;
5540 * FLD (i_rd) = opval;
5541 if (current_cpu->trace_result_p)
5542 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5544 if (FLD (f_set_cc_)) {
5548 BI opval = EQSI (tmp_result, 0);
5549 current_cpu->hardware.h_zbit = opval;
5550 if (current_cpu->trace_result_p)
5551 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5554 BI opval = LTSI (tmp_result, 0);
5555 current_cpu->hardware.h_nbit = opval;
5556 if (current_cpu->trace_result_p)
5557 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5561 BI opval = tmp_carry_out;
5562 current_cpu->hardware.h_cbit = opval;
5563 if (current_cpu->trace_result_p)
5564 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5572 current_cpu->done_cti_insn (npc, status);
5577 // ********** eor-imm: eor$cond${set-cc?} $rd,$rn,$imm12
5580 arm_sem_eor_imm (arm7f_cpu* current_cpu, arm_scache* sem)
5582 #define FLD(f) abuf->fields.sfmt_and_imm.f
5583 sem_status status = SEM_STATUS_NORMAL;
5584 arm_scache* abuf = sem;
5585 PCADDR pc = abuf->addr;
5586 PCADDR npc = pc + 4;
5590 tmp_result = XORSI (* FLD (i_rn), FLD (f_imm12));
5591 if (EQSI (FLD (f_rd), 15)) {
5594 USI opval = tmp_result;
5595 current_cpu->branch (opval, npc, status);
5596 if (current_cpu->trace_result_p)
5597 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5599 if (FLD (f_set_cc_)) {
5601 SI opval = current_cpu->h_spsr_get ();
5602 current_cpu->h_cpsr_set (opval);
5603 if (current_cpu->trace_result_p)
5604 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5611 SI opval = tmp_result;
5612 * FLD (i_rd) = opval;
5613 if (current_cpu->trace_result_p)
5614 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5616 if (FLD (f_set_cc_)) {
5619 BI opval = EQSI (tmp_result, 0);
5620 current_cpu->hardware.h_zbit = opval;
5621 if (current_cpu->trace_result_p)
5622 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5625 BI opval = LTSI (tmp_result, 0);
5626 current_cpu->hardware.h_nbit = opval;
5627 if (current_cpu->trace_result_p)
5628 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5636 current_cpu->done_cti_insn (npc, status);
5641 // ********** mov-reg/imm-shift: mov$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
5644 arm_sem_mov_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5646 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
5647 sem_status status = SEM_STATUS_NORMAL;
5648 arm_scache* abuf = sem;
5649 PCADDR pc = abuf->addr;
5650 PCADDR npc = pc + 4;
5656 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
5657 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
5658 tmp_result = tmp_operand2;
5659 if (EQSI (FLD (f_rd), 15)) {
5662 USI opval = tmp_result;
5663 current_cpu->branch (opval, npc, status);
5664 if (current_cpu->trace_result_p)
5665 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5667 if (FLD (f_set_cc_)) {
5669 SI opval = current_cpu->h_spsr_get ();
5670 current_cpu->h_cpsr_set (opval);
5671 if (current_cpu->trace_result_p)
5672 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5679 SI opval = tmp_result;
5680 * FLD (i_rd) = opval;
5681 if (current_cpu->trace_result_p)
5682 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5684 if (FLD (f_set_cc_)) {
5688 BI opval = EQSI (tmp_result, 0);
5689 current_cpu->hardware.h_zbit = opval;
5690 if (current_cpu->trace_result_p)
5691 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5694 BI opval = LTSI (tmp_result, 0);
5695 current_cpu->hardware.h_nbit = opval;
5696 if (current_cpu->trace_result_p)
5697 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5701 BI opval = tmp_carry_out;
5702 current_cpu->hardware.h_cbit = opval;
5703 if (current_cpu->trace_result_p)
5704 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5712 current_cpu->done_cti_insn (npc, status);
5717 // ********** mov-reg/reg-shift: mov$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
5720 arm_sem_mov_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5722 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
5723 sem_status status = SEM_STATUS_NORMAL;
5724 arm_scache* abuf = sem;
5725 PCADDR pc = abuf->addr;
5726 PCADDR npc = pc + 4;
5732 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
5733 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
5734 tmp_result = tmp_operand2;
5735 if (EQSI (FLD (f_rd), 15)) {
5738 USI opval = tmp_result;
5739 current_cpu->branch (opval, npc, status);
5740 if (current_cpu->trace_result_p)
5741 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5743 if (FLD (f_set_cc_)) {
5745 SI opval = current_cpu->h_spsr_get ();
5746 current_cpu->h_cpsr_set (opval);
5747 if (current_cpu->trace_result_p)
5748 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5755 SI opval = tmp_result;
5756 * FLD (i_rd) = opval;
5757 if (current_cpu->trace_result_p)
5758 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5760 if (FLD (f_set_cc_)) {
5764 BI opval = EQSI (tmp_result, 0);
5765 current_cpu->hardware.h_zbit = opval;
5766 if (current_cpu->trace_result_p)
5767 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5770 BI opval = LTSI (tmp_result, 0);
5771 current_cpu->hardware.h_nbit = opval;
5772 if (current_cpu->trace_result_p)
5773 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5777 BI opval = tmp_carry_out;
5778 current_cpu->hardware.h_cbit = opval;
5779 if (current_cpu->trace_result_p)
5780 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5788 current_cpu->done_cti_insn (npc, status);
5793 // ********** mov-imm: mov$cond${set-cc?} $rd,$imm12
5796 arm_sem_mov_imm (arm7f_cpu* current_cpu, arm_scache* sem)
5798 #define FLD(f) abuf->fields.sfmt_and_imm.f
5799 sem_status status = SEM_STATUS_NORMAL;
5800 arm_scache* abuf = sem;
5801 PCADDR pc = abuf->addr;
5802 PCADDR npc = pc + 4;
5806 tmp_result = FLD (f_imm12);
5807 if (EQSI (FLD (f_rd), 15)) {
5810 USI opval = tmp_result;
5811 current_cpu->branch (opval, npc, status);
5812 if (current_cpu->trace_result_p)
5813 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5815 if (FLD (f_set_cc_)) {
5817 SI opval = current_cpu->h_spsr_get ();
5818 current_cpu->h_cpsr_set (opval);
5819 if (current_cpu->trace_result_p)
5820 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5827 SI opval = tmp_result;
5828 * FLD (i_rd) = opval;
5829 if (current_cpu->trace_result_p)
5830 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5832 if (FLD (f_set_cc_)) {
5835 BI opval = EQSI (tmp_result, 0);
5836 current_cpu->hardware.h_zbit = opval;
5837 if (current_cpu->trace_result_p)
5838 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5841 BI opval = LTSI (tmp_result, 0);
5842 current_cpu->hardware.h_nbit = opval;
5843 if (current_cpu->trace_result_p)
5844 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5852 current_cpu->done_cti_insn (npc, status);
5857 // ********** bic-reg/imm-shift: bic$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
5860 arm_sem_bic_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5862 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
5863 sem_status status = SEM_STATUS_NORMAL;
5864 arm_scache* abuf = sem;
5865 PCADDR pc = abuf->addr;
5866 PCADDR npc = pc + 4;
5872 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
5873 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
5874 tmp_result = ANDSI (* FLD (i_rn), INVSI (tmp_operand2));
5875 if (EQSI (FLD (f_rd), 15)) {
5878 USI opval = tmp_result;
5879 current_cpu->branch (opval, npc, status);
5880 if (current_cpu->trace_result_p)
5881 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5883 if (FLD (f_set_cc_)) {
5885 SI opval = current_cpu->h_spsr_get ();
5886 current_cpu->h_cpsr_set (opval);
5887 if (current_cpu->trace_result_p)
5888 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5895 SI opval = tmp_result;
5896 * FLD (i_rd) = opval;
5897 if (current_cpu->trace_result_p)
5898 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5900 if (FLD (f_set_cc_)) {
5904 BI opval = EQSI (tmp_result, 0);
5905 current_cpu->hardware.h_zbit = opval;
5906 if (current_cpu->trace_result_p)
5907 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5910 BI opval = LTSI (tmp_result, 0);
5911 current_cpu->hardware.h_nbit = opval;
5912 if (current_cpu->trace_result_p)
5913 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5917 BI opval = tmp_carry_out;
5918 current_cpu->hardware.h_cbit = opval;
5919 if (current_cpu->trace_result_p)
5920 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
5928 current_cpu->done_cti_insn (npc, status);
5933 // ********** bic-reg/reg-shift: bic$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
5936 arm_sem_bic_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
5938 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
5939 sem_status status = SEM_STATUS_NORMAL;
5940 arm_scache* abuf = sem;
5941 PCADDR pc = abuf->addr;
5942 PCADDR npc = pc + 4;
5948 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
5949 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
5950 tmp_result = ANDSI (* FLD (i_rn), INVSI (tmp_operand2));
5951 if (EQSI (FLD (f_rd), 15)) {
5954 USI opval = tmp_result;
5955 current_cpu->branch (opval, npc, status);
5956 if (current_cpu->trace_result_p)
5957 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
5959 if (FLD (f_set_cc_)) {
5961 SI opval = current_cpu->h_spsr_get ();
5962 current_cpu->h_cpsr_set (opval);
5963 if (current_cpu->trace_result_p)
5964 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
5971 SI opval = tmp_result;
5972 * FLD (i_rd) = opval;
5973 if (current_cpu->trace_result_p)
5974 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
5976 if (FLD (f_set_cc_)) {
5980 BI opval = EQSI (tmp_result, 0);
5981 current_cpu->hardware.h_zbit = opval;
5982 if (current_cpu->trace_result_p)
5983 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
5986 BI opval = LTSI (tmp_result, 0);
5987 current_cpu->hardware.h_nbit = opval;
5988 if (current_cpu->trace_result_p)
5989 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
5993 BI opval = tmp_carry_out;
5994 current_cpu->hardware.h_cbit = opval;
5995 if (current_cpu->trace_result_p)
5996 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6004 current_cpu->done_cti_insn (npc, status);
6009 // ********** bic-imm: bic$cond${set-cc?} $rd,$rn,$imm12
6012 arm_sem_bic_imm (arm7f_cpu* current_cpu, arm_scache* sem)
6014 #define FLD(f) abuf->fields.sfmt_and_imm.f
6015 sem_status status = SEM_STATUS_NORMAL;
6016 arm_scache* abuf = sem;
6017 PCADDR pc = abuf->addr;
6018 PCADDR npc = pc + 4;
6022 tmp_result = ANDSI (* FLD (i_rn), INVSI (FLD (f_imm12)));
6023 if (EQSI (FLD (f_rd), 15)) {
6026 USI opval = tmp_result;
6027 current_cpu->branch (opval, npc, status);
6028 if (current_cpu->trace_result_p)
6029 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6031 if (FLD (f_set_cc_)) {
6033 SI opval = current_cpu->h_spsr_get ();
6034 current_cpu->h_cpsr_set (opval);
6035 if (current_cpu->trace_result_p)
6036 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6043 SI opval = tmp_result;
6044 * FLD (i_rd) = opval;
6045 if (current_cpu->trace_result_p)
6046 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6048 if (FLD (f_set_cc_)) {
6051 BI opval = EQSI (tmp_result, 0);
6052 current_cpu->hardware.h_zbit = opval;
6053 if (current_cpu->trace_result_p)
6054 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6057 BI opval = LTSI (tmp_result, 0);
6058 current_cpu->hardware.h_nbit = opval;
6059 if (current_cpu->trace_result_p)
6060 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6068 current_cpu->done_cti_insn (npc, status);
6073 // ********** mvn-reg/imm-shift: mvn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
6076 arm_sem_mvn_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6078 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
6079 sem_status status = SEM_STATUS_NORMAL;
6080 arm_scache* abuf = sem;
6081 PCADDR pc = abuf->addr;
6082 PCADDR npc = pc + 4;
6088 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
6089 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
6090 tmp_result = INVSI (tmp_operand2);
6091 if (EQSI (FLD (f_rd), 15)) {
6094 USI opval = tmp_result;
6095 current_cpu->branch (opval, npc, status);
6096 if (current_cpu->trace_result_p)
6097 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6099 if (FLD (f_set_cc_)) {
6101 SI opval = current_cpu->h_spsr_get ();
6102 current_cpu->h_cpsr_set (opval);
6103 if (current_cpu->trace_result_p)
6104 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6111 SI opval = tmp_result;
6112 * FLD (i_rd) = opval;
6113 if (current_cpu->trace_result_p)
6114 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6116 if (FLD (f_set_cc_)) {
6120 BI opval = EQSI (tmp_result, 0);
6121 current_cpu->hardware.h_zbit = opval;
6122 if (current_cpu->trace_result_p)
6123 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6126 BI opval = LTSI (tmp_result, 0);
6127 current_cpu->hardware.h_nbit = opval;
6128 if (current_cpu->trace_result_p)
6129 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6133 BI opval = tmp_carry_out;
6134 current_cpu->hardware.h_cbit = opval;
6135 if (current_cpu->trace_result_p)
6136 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6144 current_cpu->done_cti_insn (npc, status);
6149 // ********** mvn-reg/reg-shift: mvn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
6152 arm_sem_mvn_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6154 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
6155 sem_status status = SEM_STATUS_NORMAL;
6156 arm_scache* abuf = sem;
6157 PCADDR pc = abuf->addr;
6158 PCADDR npc = pc + 4;
6164 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
6165 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
6166 tmp_result = INVSI (tmp_operand2);
6167 if (EQSI (FLD (f_rd), 15)) {
6170 USI opval = tmp_result;
6171 current_cpu->branch (opval, npc, status);
6172 if (current_cpu->trace_result_p)
6173 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6175 if (FLD (f_set_cc_)) {
6177 SI opval = current_cpu->h_spsr_get ();
6178 current_cpu->h_cpsr_set (opval);
6179 if (current_cpu->trace_result_p)
6180 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6187 SI opval = tmp_result;
6188 * FLD (i_rd) = opval;
6189 if (current_cpu->trace_result_p)
6190 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6192 if (FLD (f_set_cc_)) {
6196 BI opval = EQSI (tmp_result, 0);
6197 current_cpu->hardware.h_zbit = opval;
6198 if (current_cpu->trace_result_p)
6199 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6202 BI opval = LTSI (tmp_result, 0);
6203 current_cpu->hardware.h_nbit = opval;
6204 if (current_cpu->trace_result_p)
6205 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6209 BI opval = tmp_carry_out;
6210 current_cpu->hardware.h_cbit = opval;
6211 if (current_cpu->trace_result_p)
6212 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6220 current_cpu->done_cti_insn (npc, status);
6225 // ********** mvn-imm: mvn$cond${set-cc?} $rd,$imm12
6228 arm_sem_mvn_imm (arm7f_cpu* current_cpu, arm_scache* sem)
6230 #define FLD(f) abuf->fields.sfmt_and_imm.f
6231 sem_status status = SEM_STATUS_NORMAL;
6232 arm_scache* abuf = sem;
6233 PCADDR pc = abuf->addr;
6234 PCADDR npc = pc + 4;
6238 tmp_result = INVSI (FLD (f_imm12));
6239 if (EQSI (FLD (f_rd), 15)) {
6242 USI opval = tmp_result;
6243 current_cpu->branch (opval, npc, status);
6244 if (current_cpu->trace_result_p)
6245 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6247 if (FLD (f_set_cc_)) {
6249 SI opval = current_cpu->h_spsr_get ();
6250 current_cpu->h_cpsr_set (opval);
6251 if (current_cpu->trace_result_p)
6252 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6259 SI opval = tmp_result;
6260 * FLD (i_rd) = opval;
6261 if (current_cpu->trace_result_p)
6262 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6264 if (FLD (f_set_cc_)) {
6267 BI opval = EQSI (tmp_result, 0);
6268 current_cpu->hardware.h_zbit = opval;
6269 if (current_cpu->trace_result_p)
6270 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6273 BI opval = LTSI (tmp_result, 0);
6274 current_cpu->hardware.h_nbit = opval;
6275 if (current_cpu->trace_result_p)
6276 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6284 current_cpu->done_cti_insn (npc, status);
6289 // ********** add-reg/imm-shift: add$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
6292 arm_sem_add_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6294 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
6295 sem_status status = SEM_STATUS_NORMAL;
6296 arm_scache* abuf = sem;
6297 PCADDR pc = abuf->addr;
6298 PCADDR npc = pc + 4;
6305 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
6306 tmp_temp_op1 = * FLD (i_rn);
6307 tmp_temp_op2 = tmp_operand2;
6308 tmp_result = ADDSI (* FLD (i_rn), tmp_operand2);
6309 if (EQSI (FLD (f_rd), 15)) {
6312 USI opval = tmp_result;
6313 current_cpu->branch (opval, npc, status);
6314 if (current_cpu->trace_result_p)
6315 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6317 if (FLD (f_set_cc_)) {
6319 SI opval = current_cpu->h_spsr_get ();
6320 current_cpu->h_cpsr_set (opval);
6321 if (current_cpu->trace_result_p)
6322 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6329 SI opval = tmp_result;
6330 * FLD (i_rd) = opval;
6331 if (current_cpu->trace_result_p)
6332 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6334 if (FLD (f_set_cc_)) {
6337 tmp_result = ADDCSI (tmp_temp_op1, tmp_temp_op2, 0);
6340 BI opval = EQSI (tmp_result, 0);
6341 current_cpu->hardware.h_zbit = opval;
6342 if (current_cpu->trace_result_p)
6343 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6346 BI opval = LTSI (tmp_result, 0);
6347 current_cpu->hardware.h_nbit = opval;
6348 if (current_cpu->trace_result_p)
6349 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6353 BI opval = ADDCFSI (tmp_temp_op1, tmp_temp_op2, 0);
6354 current_cpu->hardware.h_cbit = opval;
6355 if (current_cpu->trace_result_p)
6356 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6359 BI opval = ADDOFSI (tmp_temp_op1, tmp_temp_op2, 0);
6360 current_cpu->hardware.h_vbit = opval;
6361 if (current_cpu->trace_result_p)
6362 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6370 current_cpu->done_cti_insn (npc, status);
6375 // ********** add-reg/reg-shift: add$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
6378 arm_sem_add_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6380 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
6381 sem_status status = SEM_STATUS_NORMAL;
6382 arm_scache* abuf = sem;
6383 PCADDR pc = abuf->addr;
6384 PCADDR npc = pc + 4;
6391 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
6392 tmp_temp_op1 = * FLD (i_rn);
6393 tmp_temp_op2 = tmp_operand2;
6394 tmp_result = ADDSI (* FLD (i_rn), tmp_operand2);
6395 if (EQSI (FLD (f_rd), 15)) {
6398 USI opval = tmp_result;
6399 current_cpu->branch (opval, npc, status);
6400 if (current_cpu->trace_result_p)
6401 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6403 if (FLD (f_set_cc_)) {
6405 SI opval = current_cpu->h_spsr_get ();
6406 current_cpu->h_cpsr_set (opval);
6407 if (current_cpu->trace_result_p)
6408 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6415 SI opval = tmp_result;
6416 * FLD (i_rd) = opval;
6417 if (current_cpu->trace_result_p)
6418 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6420 if (FLD (f_set_cc_)) {
6423 tmp_result = ADDCSI (tmp_temp_op1, tmp_temp_op2, 0);
6426 BI opval = EQSI (tmp_result, 0);
6427 current_cpu->hardware.h_zbit = opval;
6428 if (current_cpu->trace_result_p)
6429 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6432 BI opval = LTSI (tmp_result, 0);
6433 current_cpu->hardware.h_nbit = opval;
6434 if (current_cpu->trace_result_p)
6435 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6439 BI opval = ADDCFSI (tmp_temp_op1, tmp_temp_op2, 0);
6440 current_cpu->hardware.h_cbit = opval;
6441 if (current_cpu->trace_result_p)
6442 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6445 BI opval = ADDOFSI (tmp_temp_op1, tmp_temp_op2, 0);
6446 current_cpu->hardware.h_vbit = opval;
6447 if (current_cpu->trace_result_p)
6448 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6456 current_cpu->done_cti_insn (npc, status);
6461 // ********** add-imm: add$cond${set-cc?} $rd,$rn,$imm12
6464 arm_sem_add_imm (arm7f_cpu* current_cpu, arm_scache* sem)
6466 #define FLD(f) abuf->fields.sfmt_and_imm.f
6467 sem_status status = SEM_STATUS_NORMAL;
6468 arm_scache* abuf = sem;
6469 PCADDR pc = abuf->addr;
6470 PCADDR npc = pc + 4;
6474 tmp_result = ADDSI (* FLD (i_rn), FLD (f_imm12));
6475 if (EQSI (FLD (f_rd), 15)) {
6477 if (FLD (f_set_cc_)) {
6479 SI opval = current_cpu->h_spsr_get ();
6480 current_cpu->h_cpsr_set (opval);
6481 if (current_cpu->trace_result_p)
6482 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6486 USI opval = tmp_result;
6487 current_cpu->branch (opval, npc, status);
6488 if (current_cpu->trace_result_p)
6489 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6494 if (FLD (f_set_cc_)) {
6497 tmp_result = ADDCSI (* FLD (i_rn), FLD (f_imm12), 0);
6500 BI opval = EQSI (tmp_result, 0);
6501 current_cpu->hardware.h_zbit = opval;
6502 if (current_cpu->trace_result_p)
6503 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6506 BI opval = LTSI (tmp_result, 0);
6507 current_cpu->hardware.h_nbit = opval;
6508 if (current_cpu->trace_result_p)
6509 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6513 BI opval = ADDCFSI (* FLD (i_rn), FLD (f_imm12), 0);
6514 current_cpu->hardware.h_cbit = opval;
6515 if (current_cpu->trace_result_p)
6516 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6519 BI opval = ADDOFSI (* FLD (i_rn), FLD (f_imm12), 0);
6520 current_cpu->hardware.h_vbit = opval;
6521 if (current_cpu->trace_result_p)
6522 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6527 SI opval = tmp_result;
6528 * FLD (i_rd) = opval;
6529 if (current_cpu->trace_result_p)
6530 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6536 current_cpu->done_cti_insn (npc, status);
6541 // ********** adc-reg/imm-shift: adc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
6544 arm_sem_adc_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6546 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
6547 sem_status status = SEM_STATUS_NORMAL;
6548 arm_scache* abuf = sem;
6549 PCADDR pc = abuf->addr;
6550 PCADDR npc = pc + 4;
6557 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
6558 tmp_temp_op1 = * FLD (i_rn);
6559 tmp_temp_op2 = tmp_operand2;
6560 tmp_result = ADDCSI (* FLD (i_rn), tmp_operand2, current_cpu->hardware.h_cbit);
6561 if (EQSI (FLD (f_rd), 15)) {
6564 USI opval = tmp_result;
6565 current_cpu->branch (opval, npc, status);
6566 if (current_cpu->trace_result_p)
6567 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6569 if (FLD (f_set_cc_)) {
6571 SI opval = current_cpu->h_spsr_get ();
6572 current_cpu->h_cpsr_set (opval);
6573 if (current_cpu->trace_result_p)
6574 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6581 SI opval = tmp_result;
6582 * FLD (i_rd) = opval;
6583 if (current_cpu->trace_result_p)
6584 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6586 if (FLD (f_set_cc_)) {
6589 tmp_result = ADDCSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6592 BI opval = EQSI (tmp_result, 0);
6593 current_cpu->hardware.h_zbit = opval;
6594 if (current_cpu->trace_result_p)
6595 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6598 BI opval = LTSI (tmp_result, 0);
6599 current_cpu->hardware.h_nbit = opval;
6600 if (current_cpu->trace_result_p)
6601 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6605 BI opval = ADDCFSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6606 current_cpu->hardware.h_cbit = opval;
6607 if (current_cpu->trace_result_p)
6608 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6611 BI opval = ADDOFSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6612 current_cpu->hardware.h_vbit = opval;
6613 if (current_cpu->trace_result_p)
6614 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6622 current_cpu->done_cti_insn (npc, status);
6627 // ********** adc-reg/reg-shift: adc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
6630 arm_sem_adc_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6632 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
6633 sem_status status = SEM_STATUS_NORMAL;
6634 arm_scache* abuf = sem;
6635 PCADDR pc = abuf->addr;
6636 PCADDR npc = pc + 4;
6643 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
6644 tmp_temp_op1 = * FLD (i_rn);
6645 tmp_temp_op2 = tmp_operand2;
6646 tmp_result = ADDCSI (* FLD (i_rn), tmp_operand2, current_cpu->hardware.h_cbit);
6647 if (EQSI (FLD (f_rd), 15)) {
6650 USI opval = tmp_result;
6651 current_cpu->branch (opval, npc, status);
6652 if (current_cpu->trace_result_p)
6653 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6655 if (FLD (f_set_cc_)) {
6657 SI opval = current_cpu->h_spsr_get ();
6658 current_cpu->h_cpsr_set (opval);
6659 if (current_cpu->trace_result_p)
6660 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6667 SI opval = tmp_result;
6668 * FLD (i_rd) = opval;
6669 if (current_cpu->trace_result_p)
6670 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6672 if (FLD (f_set_cc_)) {
6675 tmp_result = ADDCSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6678 BI opval = EQSI (tmp_result, 0);
6679 current_cpu->hardware.h_zbit = opval;
6680 if (current_cpu->trace_result_p)
6681 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6684 BI opval = LTSI (tmp_result, 0);
6685 current_cpu->hardware.h_nbit = opval;
6686 if (current_cpu->trace_result_p)
6687 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6691 BI opval = ADDCFSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6692 current_cpu->hardware.h_cbit = opval;
6693 if (current_cpu->trace_result_p)
6694 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6697 BI opval = ADDOFSI (tmp_temp_op1, tmp_temp_op2, current_cpu->hardware.h_cbit);
6698 current_cpu->hardware.h_vbit = opval;
6699 if (current_cpu->trace_result_p)
6700 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6708 current_cpu->done_cti_insn (npc, status);
6713 // ********** adc-imm: adc$cond${set-cc?} $rd,$rn,$imm12
6716 arm_sem_adc_imm (arm7f_cpu* current_cpu, arm_scache* sem)
6718 #define FLD(f) abuf->fields.sfmt_and_imm.f
6719 sem_status status = SEM_STATUS_NORMAL;
6720 arm_scache* abuf = sem;
6721 PCADDR pc = abuf->addr;
6722 PCADDR npc = pc + 4;
6726 tmp_result = ADDCSI (* FLD (i_rn), FLD (f_imm12), current_cpu->hardware.h_cbit);
6727 if (EQSI (FLD (f_rd), 15)) {
6729 if (FLD (f_set_cc_)) {
6731 SI opval = current_cpu->h_spsr_get ();
6732 current_cpu->h_cpsr_set (opval);
6733 if (current_cpu->trace_result_p)
6734 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6738 USI opval = tmp_result;
6739 current_cpu->branch (opval, npc, status);
6740 if (current_cpu->trace_result_p)
6741 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6746 if (FLD (f_set_cc_)) {
6749 tmp_result = ADDCSI (* FLD (i_rn), FLD (f_imm12), current_cpu->hardware.h_cbit);
6752 BI opval = EQSI (tmp_result, 0);
6753 current_cpu->hardware.h_zbit = opval;
6754 if (current_cpu->trace_result_p)
6755 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6758 BI opval = LTSI (tmp_result, 0);
6759 current_cpu->hardware.h_nbit = opval;
6760 if (current_cpu->trace_result_p)
6761 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6765 BI opval = ADDCFSI (* FLD (i_rn), FLD (f_imm12), current_cpu->hardware.h_cbit);
6766 current_cpu->hardware.h_cbit = opval;
6767 if (current_cpu->trace_result_p)
6768 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6771 BI opval = ADDOFSI (* FLD (i_rn), FLD (f_imm12), current_cpu->hardware.h_cbit);
6772 current_cpu->hardware.h_vbit = opval;
6773 if (current_cpu->trace_result_p)
6774 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6779 SI opval = tmp_result;
6780 * FLD (i_rd) = opval;
6781 if (current_cpu->trace_result_p)
6782 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6788 current_cpu->done_cti_insn (npc, status);
6793 // ********** sub-reg/imm-shift: sub$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
6796 arm_sem_sub_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6798 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
6799 sem_status status = SEM_STATUS_NORMAL;
6800 arm_scache* abuf = sem;
6801 PCADDR pc = abuf->addr;
6802 PCADDR npc = pc + 4;
6809 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
6810 tmp_temp_op1 = * FLD (i_rn);
6811 tmp_temp_op2 = tmp_operand2;
6812 tmp_result = SUBSI (* FLD (i_rn), tmp_operand2);
6813 if (EQSI (FLD (f_rd), 15)) {
6816 USI opval = tmp_result;
6817 current_cpu->branch (opval, npc, status);
6818 if (current_cpu->trace_result_p)
6819 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6821 if (FLD (f_set_cc_)) {
6823 SI opval = current_cpu->h_spsr_get ();
6824 current_cpu->h_cpsr_set (opval);
6825 if (current_cpu->trace_result_p)
6826 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6833 SI opval = tmp_result;
6834 * FLD (i_rd) = opval;
6835 if (current_cpu->trace_result_p)
6836 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6838 if (FLD (f_set_cc_)) {
6841 tmp_result = SUBCSI (tmp_temp_op1, tmp_temp_op2, 0);
6844 BI opval = EQSI (tmp_result, 0);
6845 current_cpu->hardware.h_zbit = opval;
6846 if (current_cpu->trace_result_p)
6847 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6850 BI opval = LTSI (tmp_result, 0);
6851 current_cpu->hardware.h_nbit = opval;
6852 if (current_cpu->trace_result_p)
6853 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6857 BI opval = NOTSI (SUBCFSI (tmp_temp_op1, tmp_temp_op2, 0));
6858 current_cpu->hardware.h_cbit = opval;
6859 if (current_cpu->trace_result_p)
6860 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6863 BI opval = SUBOFSI (tmp_temp_op1, tmp_temp_op2, 0);
6864 current_cpu->hardware.h_vbit = opval;
6865 if (current_cpu->trace_result_p)
6866 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6874 current_cpu->done_cti_insn (npc, status);
6879 // ********** sub-reg/reg-shift: sub$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
6882 arm_sem_sub_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
6884 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
6885 sem_status status = SEM_STATUS_NORMAL;
6886 arm_scache* abuf = sem;
6887 PCADDR pc = abuf->addr;
6888 PCADDR npc = pc + 4;
6895 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
6896 tmp_temp_op1 = * FLD (i_rn);
6897 tmp_temp_op2 = tmp_operand2;
6898 tmp_result = SUBSI (* FLD (i_rn), tmp_operand2);
6899 if (EQSI (FLD (f_rd), 15)) {
6902 USI opval = tmp_result;
6903 current_cpu->branch (opval, npc, status);
6904 if (current_cpu->trace_result_p)
6905 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6907 if (FLD (f_set_cc_)) {
6909 SI opval = current_cpu->h_spsr_get ();
6910 current_cpu->h_cpsr_set (opval);
6911 if (current_cpu->trace_result_p)
6912 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6919 SI opval = tmp_result;
6920 * FLD (i_rd) = opval;
6921 if (current_cpu->trace_result_p)
6922 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
6924 if (FLD (f_set_cc_)) {
6927 tmp_result = SUBCSI (tmp_temp_op1, tmp_temp_op2, 0);
6930 BI opval = EQSI (tmp_result, 0);
6931 current_cpu->hardware.h_zbit = opval;
6932 if (current_cpu->trace_result_p)
6933 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
6936 BI opval = LTSI (tmp_result, 0);
6937 current_cpu->hardware.h_nbit = opval;
6938 if (current_cpu->trace_result_p)
6939 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
6943 BI opval = NOTSI (SUBCFSI (tmp_temp_op1, tmp_temp_op2, 0));
6944 current_cpu->hardware.h_cbit = opval;
6945 if (current_cpu->trace_result_p)
6946 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
6949 BI opval = SUBOFSI (tmp_temp_op1, tmp_temp_op2, 0);
6950 current_cpu->hardware.h_vbit = opval;
6951 if (current_cpu->trace_result_p)
6952 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
6960 current_cpu->done_cti_insn (npc, status);
6965 // ********** sub-imm: sub$cond${set-cc?} $rd,$rn,$imm12
6968 arm_sem_sub_imm (arm7f_cpu* current_cpu, arm_scache* sem)
6970 #define FLD(f) abuf->fields.sfmt_and_imm.f
6971 sem_status status = SEM_STATUS_NORMAL;
6972 arm_scache* abuf = sem;
6973 PCADDR pc = abuf->addr;
6974 PCADDR npc = pc + 4;
6978 tmp_result = SUBSI (* FLD (i_rn), FLD (f_imm12));
6979 if (EQSI (FLD (f_rd), 15)) {
6981 if (FLD (f_set_cc_)) {
6983 SI opval = current_cpu->h_spsr_get ();
6984 current_cpu->h_cpsr_set (opval);
6985 if (current_cpu->trace_result_p)
6986 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
6990 USI opval = tmp_result;
6991 current_cpu->branch (opval, npc, status);
6992 if (current_cpu->trace_result_p)
6993 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
6998 if (FLD (f_set_cc_)) {
7001 tmp_result = SUBCSI (* FLD (i_rn), FLD (f_imm12), 0);
7004 BI opval = EQSI (tmp_result, 0);
7005 current_cpu->hardware.h_zbit = opval;
7006 if (current_cpu->trace_result_p)
7007 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7010 BI opval = LTSI (tmp_result, 0);
7011 current_cpu->hardware.h_nbit = opval;
7012 if (current_cpu->trace_result_p)
7013 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7017 BI opval = NOTSI (SUBCFSI (* FLD (i_rn), FLD (f_imm12), 0));
7018 current_cpu->hardware.h_cbit = opval;
7019 if (current_cpu->trace_result_p)
7020 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7023 BI opval = SUBOFSI (* FLD (i_rn), FLD (f_imm12), 0);
7024 current_cpu->hardware.h_vbit = opval;
7025 if (current_cpu->trace_result_p)
7026 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7031 SI opval = tmp_result;
7032 * FLD (i_rd) = opval;
7033 if (current_cpu->trace_result_p)
7034 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7040 current_cpu->done_cti_insn (npc, status);
7045 // ********** sbc-reg/imm-shift: sbc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
7048 arm_sem_sbc_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7050 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
7051 sem_status status = SEM_STATUS_NORMAL;
7052 arm_scache* abuf = sem;
7053 PCADDR pc = abuf->addr;
7054 PCADDR npc = pc + 4;
7061 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
7062 tmp_temp_op1 = * FLD (i_rn);
7063 tmp_temp_op2 = tmp_operand2;
7064 tmp_result = SUBCSI (* FLD (i_rn), tmp_operand2, NOTBI (current_cpu->hardware.h_cbit));
7065 if (EQSI (FLD (f_rd), 15)) {
7068 USI opval = tmp_result;
7069 current_cpu->branch (opval, npc, status);
7070 if (current_cpu->trace_result_p)
7071 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7073 if (FLD (f_set_cc_)) {
7075 SI opval = current_cpu->h_spsr_get ();
7076 current_cpu->h_cpsr_set (opval);
7077 if (current_cpu->trace_result_p)
7078 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7085 SI opval = tmp_result;
7086 * FLD (i_rd) = opval;
7087 if (current_cpu->trace_result_p)
7088 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7090 if (FLD (f_set_cc_)) {
7093 tmp_result = SUBCSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit));
7096 BI opval = EQSI (tmp_result, 0);
7097 current_cpu->hardware.h_zbit = opval;
7098 if (current_cpu->trace_result_p)
7099 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7102 BI opval = LTSI (tmp_result, 0);
7103 current_cpu->hardware.h_nbit = opval;
7104 if (current_cpu->trace_result_p)
7105 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7109 BI opval = NOTSI (SUBCFSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit)));
7110 current_cpu->hardware.h_cbit = opval;
7111 if (current_cpu->trace_result_p)
7112 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7115 BI opval = SUBOFSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit));
7116 current_cpu->hardware.h_vbit = opval;
7117 if (current_cpu->trace_result_p)
7118 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7126 current_cpu->done_cti_insn (npc, status);
7131 // ********** sbc-reg/reg-shift: sbc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
7134 arm_sem_sbc_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7136 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
7137 sem_status status = SEM_STATUS_NORMAL;
7138 arm_scache* abuf = sem;
7139 PCADDR pc = abuf->addr;
7140 PCADDR npc = pc + 4;
7147 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
7148 tmp_temp_op1 = * FLD (i_rn);
7149 tmp_temp_op2 = tmp_operand2;
7150 tmp_result = SUBCSI (* FLD (i_rn), tmp_operand2, NOTBI (current_cpu->hardware.h_cbit));
7151 if (EQSI (FLD (f_rd), 15)) {
7154 USI opval = tmp_result;
7155 current_cpu->branch (opval, npc, status);
7156 if (current_cpu->trace_result_p)
7157 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7159 if (FLD (f_set_cc_)) {
7161 SI opval = current_cpu->h_spsr_get ();
7162 current_cpu->h_cpsr_set (opval);
7163 if (current_cpu->trace_result_p)
7164 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7171 SI opval = tmp_result;
7172 * FLD (i_rd) = opval;
7173 if (current_cpu->trace_result_p)
7174 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7176 if (FLD (f_set_cc_)) {
7179 tmp_result = SUBCSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit));
7182 BI opval = EQSI (tmp_result, 0);
7183 current_cpu->hardware.h_zbit = opval;
7184 if (current_cpu->trace_result_p)
7185 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7188 BI opval = LTSI (tmp_result, 0);
7189 current_cpu->hardware.h_nbit = opval;
7190 if (current_cpu->trace_result_p)
7191 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7195 BI opval = NOTSI (SUBCFSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit)));
7196 current_cpu->hardware.h_cbit = opval;
7197 if (current_cpu->trace_result_p)
7198 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7201 BI opval = SUBOFSI (tmp_temp_op1, tmp_temp_op2, NOTBI (current_cpu->hardware.h_cbit));
7202 current_cpu->hardware.h_vbit = opval;
7203 if (current_cpu->trace_result_p)
7204 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7212 current_cpu->done_cti_insn (npc, status);
7217 // ********** sbc-imm: sbc$cond${set-cc?} $rd,$rn,$imm12
7220 arm_sem_sbc_imm (arm7f_cpu* current_cpu, arm_scache* sem)
7222 #define FLD(f) abuf->fields.sfmt_and_imm.f
7223 sem_status status = SEM_STATUS_NORMAL;
7224 arm_scache* abuf = sem;
7225 PCADDR pc = abuf->addr;
7226 PCADDR npc = pc + 4;
7230 tmp_result = SUBCSI (* FLD (i_rn), FLD (f_imm12), NOTBI (current_cpu->hardware.h_cbit));
7231 if (EQSI (FLD (f_rd), 15)) {
7233 if (FLD (f_set_cc_)) {
7235 SI opval = current_cpu->h_spsr_get ();
7236 current_cpu->h_cpsr_set (opval);
7237 if (current_cpu->trace_result_p)
7238 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7242 USI opval = tmp_result;
7243 current_cpu->branch (opval, npc, status);
7244 if (current_cpu->trace_result_p)
7245 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7250 if (FLD (f_set_cc_)) {
7253 tmp_result = SUBCSI (* FLD (i_rn), FLD (f_imm12), NOTBI (current_cpu->hardware.h_cbit));
7256 BI opval = EQSI (tmp_result, 0);
7257 current_cpu->hardware.h_zbit = opval;
7258 if (current_cpu->trace_result_p)
7259 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7262 BI opval = LTSI (tmp_result, 0);
7263 current_cpu->hardware.h_nbit = opval;
7264 if (current_cpu->trace_result_p)
7265 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7269 BI opval = NOTSI (SUBCFSI (* FLD (i_rn), FLD (f_imm12), NOTBI (current_cpu->hardware.h_cbit)));
7270 current_cpu->hardware.h_cbit = opval;
7271 if (current_cpu->trace_result_p)
7272 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7275 BI opval = SUBOFSI (* FLD (i_rn), FLD (f_imm12), NOTBI (current_cpu->hardware.h_cbit));
7276 current_cpu->hardware.h_vbit = opval;
7277 if (current_cpu->trace_result_p)
7278 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7283 SI opval = tmp_result;
7284 * FLD (i_rd) = opval;
7285 if (current_cpu->trace_result_p)
7286 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7292 current_cpu->done_cti_insn (npc, status);
7297 // ********** rsb-reg/imm-shift: rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
7300 arm_sem_rsb_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7302 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
7303 sem_status status = SEM_STATUS_NORMAL;
7304 arm_scache* abuf = sem;
7305 PCADDR pc = abuf->addr;
7306 PCADDR npc = pc + 4;
7313 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
7314 tmp_temp_op1 = * FLD (i_rn);
7315 tmp_temp_op2 = tmp_operand2;
7316 tmp_result = SUBSI (tmp_operand2, * FLD (i_rn));
7317 if (EQSI (FLD (f_rd), 15)) {
7320 USI opval = tmp_result;
7321 current_cpu->branch (opval, npc, status);
7322 if (current_cpu->trace_result_p)
7323 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7325 if (FLD (f_set_cc_)) {
7327 SI opval = current_cpu->h_spsr_get ();
7328 current_cpu->h_cpsr_set (opval);
7329 if (current_cpu->trace_result_p)
7330 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7337 SI opval = tmp_result;
7338 * FLD (i_rd) = opval;
7339 if (current_cpu->trace_result_p)
7340 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7342 if (FLD (f_set_cc_)) {
7345 tmp_result = SUBCSI (tmp_temp_op2, tmp_temp_op1, 0);
7348 BI opval = EQSI (tmp_result, 0);
7349 current_cpu->hardware.h_zbit = opval;
7350 if (current_cpu->trace_result_p)
7351 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7354 BI opval = LTSI (tmp_result, 0);
7355 current_cpu->hardware.h_nbit = opval;
7356 if (current_cpu->trace_result_p)
7357 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7361 BI opval = NOTSI (SUBCFSI (tmp_temp_op2, tmp_temp_op1, 0));
7362 current_cpu->hardware.h_cbit = opval;
7363 if (current_cpu->trace_result_p)
7364 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7367 BI opval = SUBOFSI (tmp_temp_op2, tmp_temp_op1, 0);
7368 current_cpu->hardware.h_vbit = opval;
7369 if (current_cpu->trace_result_p)
7370 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7378 current_cpu->done_cti_insn (npc, status);
7383 // ********** rsb-reg/reg-shift: rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
7386 arm_sem_rsb_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7388 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
7389 sem_status status = SEM_STATUS_NORMAL;
7390 arm_scache* abuf = sem;
7391 PCADDR pc = abuf->addr;
7392 PCADDR npc = pc + 4;
7399 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
7400 tmp_temp_op1 = * FLD (i_rn);
7401 tmp_temp_op2 = tmp_operand2;
7402 tmp_result = SUBSI (tmp_operand2, * FLD (i_rn));
7403 if (EQSI (FLD (f_rd), 15)) {
7406 USI opval = tmp_result;
7407 current_cpu->branch (opval, npc, status);
7408 if (current_cpu->trace_result_p)
7409 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7411 if (FLD (f_set_cc_)) {
7413 SI opval = current_cpu->h_spsr_get ();
7414 current_cpu->h_cpsr_set (opval);
7415 if (current_cpu->trace_result_p)
7416 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7423 SI opval = tmp_result;
7424 * FLD (i_rd) = opval;
7425 if (current_cpu->trace_result_p)
7426 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7428 if (FLD (f_set_cc_)) {
7431 tmp_result = SUBCSI (tmp_temp_op2, tmp_temp_op1, 0);
7434 BI opval = EQSI (tmp_result, 0);
7435 current_cpu->hardware.h_zbit = opval;
7436 if (current_cpu->trace_result_p)
7437 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7440 BI opval = LTSI (tmp_result, 0);
7441 current_cpu->hardware.h_nbit = opval;
7442 if (current_cpu->trace_result_p)
7443 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7447 BI opval = NOTSI (SUBCFSI (tmp_temp_op2, tmp_temp_op1, 0));
7448 current_cpu->hardware.h_cbit = opval;
7449 if (current_cpu->trace_result_p)
7450 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7453 BI opval = SUBOFSI (tmp_temp_op2, tmp_temp_op1, 0);
7454 current_cpu->hardware.h_vbit = opval;
7455 if (current_cpu->trace_result_p)
7456 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7464 current_cpu->done_cti_insn (npc, status);
7469 // ********** rsb-imm: rsb$cond${set-cc?} $rd,$rn,$imm12
7472 arm_sem_rsb_imm (arm7f_cpu* current_cpu, arm_scache* sem)
7474 #define FLD(f) abuf->fields.sfmt_and_imm.f
7475 sem_status status = SEM_STATUS_NORMAL;
7476 arm_scache* abuf = sem;
7477 PCADDR pc = abuf->addr;
7478 PCADDR npc = pc + 4;
7482 tmp_result = SUBSI (FLD (f_imm12), * FLD (i_rn));
7483 if (EQSI (FLD (f_rd), 15)) {
7485 if (FLD (f_set_cc_)) {
7487 SI opval = current_cpu->h_spsr_get ();
7488 current_cpu->h_cpsr_set (opval);
7489 if (current_cpu->trace_result_p)
7490 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7494 USI opval = tmp_result;
7495 current_cpu->branch (opval, npc, status);
7496 if (current_cpu->trace_result_p)
7497 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7502 if (FLD (f_set_cc_)) {
7505 tmp_result = SUBCSI (FLD (f_imm12), * FLD (i_rn), 0);
7508 BI opval = EQSI (tmp_result, 0);
7509 current_cpu->hardware.h_zbit = opval;
7510 if (current_cpu->trace_result_p)
7511 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7514 BI opval = LTSI (tmp_result, 0);
7515 current_cpu->hardware.h_nbit = opval;
7516 if (current_cpu->trace_result_p)
7517 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7521 BI opval = NOTSI (SUBCFSI (FLD (f_imm12), * FLD (i_rn), 0));
7522 current_cpu->hardware.h_cbit = opval;
7523 if (current_cpu->trace_result_p)
7524 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7527 BI opval = SUBOFSI (FLD (f_imm12), * FLD (i_rn), 0);
7528 current_cpu->hardware.h_vbit = opval;
7529 if (current_cpu->trace_result_p)
7530 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7535 SI opval = tmp_result;
7536 * FLD (i_rd) = opval;
7537 if (current_cpu->trace_result_p)
7538 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7544 current_cpu->done_cti_insn (npc, status);
7549 // ********** rsc-reg/imm-shift: rsc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
7552 arm_sem_rsc_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7554 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
7555 sem_status status = SEM_STATUS_NORMAL;
7556 arm_scache* abuf = sem;
7557 PCADDR pc = abuf->addr;
7558 PCADDR npc = pc + 4;
7565 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
7566 tmp_temp_op1 = * FLD (i_rn);
7567 tmp_temp_op2 = tmp_operand2;
7568 tmp_result = SUBCSI (tmp_operand2, * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit));
7569 if (EQSI (FLD (f_rd), 15)) {
7572 USI opval = tmp_result;
7573 current_cpu->branch (opval, npc, status);
7574 if (current_cpu->trace_result_p)
7575 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7577 if (FLD (f_set_cc_)) {
7579 SI opval = current_cpu->h_spsr_get ();
7580 current_cpu->h_cpsr_set (opval);
7581 if (current_cpu->trace_result_p)
7582 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7589 SI opval = tmp_result;
7590 * FLD (i_rd) = opval;
7591 if (current_cpu->trace_result_p)
7592 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7594 if (FLD (f_set_cc_)) {
7597 tmp_result = SUBCSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit));
7600 BI opval = EQSI (tmp_result, 0);
7601 current_cpu->hardware.h_zbit = opval;
7602 if (current_cpu->trace_result_p)
7603 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7606 BI opval = LTSI (tmp_result, 0);
7607 current_cpu->hardware.h_nbit = opval;
7608 if (current_cpu->trace_result_p)
7609 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7613 BI opval = NOTSI (SUBCFSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit)));
7614 current_cpu->hardware.h_cbit = opval;
7615 if (current_cpu->trace_result_p)
7616 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7619 BI opval = SUBOFSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit));
7620 current_cpu->hardware.h_vbit = opval;
7621 if (current_cpu->trace_result_p)
7622 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7630 current_cpu->done_cti_insn (npc, status);
7635 // ********** rsc-reg/reg-shift: rsc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
7638 arm_sem_rsc_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7640 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
7641 sem_status status = SEM_STATUS_NORMAL;
7642 arm_scache* abuf = sem;
7643 PCADDR pc = abuf->addr;
7644 PCADDR npc = pc + 4;
7651 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
7652 tmp_temp_op1 = * FLD (i_rn);
7653 tmp_temp_op2 = tmp_operand2;
7654 tmp_result = SUBCSI (tmp_operand2, * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit));
7655 if (EQSI (FLD (f_rd), 15)) {
7658 USI opval = tmp_result;
7659 current_cpu->branch (opval, npc, status);
7660 if (current_cpu->trace_result_p)
7661 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7663 if (FLD (f_set_cc_)) {
7665 SI opval = current_cpu->h_spsr_get ();
7666 current_cpu->h_cpsr_set (opval);
7667 if (current_cpu->trace_result_p)
7668 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7675 SI opval = tmp_result;
7676 * FLD (i_rd) = opval;
7677 if (current_cpu->trace_result_p)
7678 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7680 if (FLD (f_set_cc_)) {
7683 tmp_result = SUBCSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit));
7686 BI opval = EQSI (tmp_result, 0);
7687 current_cpu->hardware.h_zbit = opval;
7688 if (current_cpu->trace_result_p)
7689 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7692 BI opval = LTSI (tmp_result, 0);
7693 current_cpu->hardware.h_nbit = opval;
7694 if (current_cpu->trace_result_p)
7695 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7699 BI opval = NOTSI (SUBCFSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit)));
7700 current_cpu->hardware.h_cbit = opval;
7701 if (current_cpu->trace_result_p)
7702 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7705 BI opval = SUBOFSI (tmp_temp_op2, tmp_temp_op1, NOTBI (current_cpu->hardware.h_cbit));
7706 current_cpu->hardware.h_vbit = opval;
7707 if (current_cpu->trace_result_p)
7708 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7716 current_cpu->done_cti_insn (npc, status);
7721 // ********** rsc-imm: rsc$cond${set-cc?} $rd,$rn,$imm12
7724 arm_sem_rsc_imm (arm7f_cpu* current_cpu, arm_scache* sem)
7726 #define FLD(f) abuf->fields.sfmt_and_imm.f
7727 sem_status status = SEM_STATUS_NORMAL;
7728 arm_scache* abuf = sem;
7729 PCADDR pc = abuf->addr;
7730 PCADDR npc = pc + 4;
7734 tmp_result = SUBCSI (FLD (f_imm12), * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit));
7735 if (EQSI (FLD (f_rd), 15)) {
7737 if (FLD (f_set_cc_)) {
7739 SI opval = current_cpu->h_spsr_get ();
7740 current_cpu->h_cpsr_set (opval);
7741 if (current_cpu->trace_result_p)
7742 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7746 USI opval = tmp_result;
7747 current_cpu->branch (opval, npc, status);
7748 if (current_cpu->trace_result_p)
7749 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
7754 if (FLD (f_set_cc_)) {
7757 tmp_result = SUBCSI (FLD (f_imm12), * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit));
7760 BI opval = EQSI (tmp_result, 0);
7761 current_cpu->hardware.h_zbit = opval;
7762 if (current_cpu->trace_result_p)
7763 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7766 BI opval = LTSI (tmp_result, 0);
7767 current_cpu->hardware.h_nbit = opval;
7768 if (current_cpu->trace_result_p)
7769 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7773 BI opval = NOTSI (SUBCFSI (FLD (f_imm12), * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit)));
7774 current_cpu->hardware.h_cbit = opval;
7775 if (current_cpu->trace_result_p)
7776 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7779 BI opval = SUBOFSI (FLD (f_imm12), * FLD (i_rn), NOTBI (current_cpu->hardware.h_cbit));
7780 current_cpu->hardware.h_vbit = opval;
7781 if (current_cpu->trace_result_p)
7782 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
7787 SI opval = tmp_result;
7788 * FLD (i_rd) = opval;
7789 if (current_cpu->trace_result_p)
7790 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
7796 current_cpu->done_cti_insn (npc, status);
7801 // ********** tst-reg/imm-shift: tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
7804 arm_sem_tst_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7806 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
7807 sem_status status = SEM_STATUS_NORMAL;
7808 arm_scache* abuf = sem;
7809 PCADDR pc = abuf->addr;
7810 PCADDR npc = pc + 4;
7816 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
7817 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
7818 tmp_result = ANDSI (* FLD (i_rn), tmp_operand2);
7819 if (EQSI (FLD (f_rd), 15)) {
7821 SI opval = current_cpu->h_spsr_get ();
7822 current_cpu->h_cpsr_set (opval);
7823 if (current_cpu->trace_result_p)
7824 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7830 BI opval = EQSI (tmp_result, 0);
7831 current_cpu->hardware.h_zbit = opval;
7832 if (current_cpu->trace_result_p)
7833 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7836 BI opval = LTSI (tmp_result, 0);
7837 current_cpu->hardware.h_nbit = opval;
7838 if (current_cpu->trace_result_p)
7839 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7843 BI opval = tmp_carry_out;
7844 current_cpu->hardware.h_cbit = opval;
7845 if (current_cpu->trace_result_p)
7846 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7852 current_cpu->done_insn (npc, status);
7857 // ********** tst-reg/reg-shift: tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
7860 arm_sem_tst_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7862 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
7863 sem_status status = SEM_STATUS_NORMAL;
7864 arm_scache* abuf = sem;
7865 PCADDR pc = abuf->addr;
7866 PCADDR npc = pc + 4;
7872 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
7873 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
7874 tmp_result = ANDSI (* FLD (i_rn), tmp_operand2);
7875 if (EQSI (FLD (f_rd), 15)) {
7877 SI opval = current_cpu->h_spsr_get ();
7878 current_cpu->h_cpsr_set (opval);
7879 if (current_cpu->trace_result_p)
7880 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7886 BI opval = EQSI (tmp_result, 0);
7887 current_cpu->hardware.h_zbit = opval;
7888 if (current_cpu->trace_result_p)
7889 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7892 BI opval = LTSI (tmp_result, 0);
7893 current_cpu->hardware.h_nbit = opval;
7894 if (current_cpu->trace_result_p)
7895 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7899 BI opval = tmp_carry_out;
7900 current_cpu->hardware.h_cbit = opval;
7901 if (current_cpu->trace_result_p)
7902 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7908 current_cpu->done_insn (npc, status);
7913 // ********** tst-imm: tst${cond}${set-cc?} $rn,$imm12
7916 arm_sem_tst_imm (arm7f_cpu* current_cpu, arm_scache* sem)
7918 #define FLD(f) abuf->fields.sfmt_tst_imm.f
7919 sem_status status = SEM_STATUS_NORMAL;
7920 arm_scache* abuf = sem;
7921 PCADDR pc = abuf->addr;
7922 PCADDR npc = pc + 4;
7926 if (EQSI (FLD (f_ror_imm8_rotate), 0)) {
7927 tmp_carry_out = current_cpu->hardware.h_cbit;
7929 tmp_carry_out = LTBI (FLD (f_ror_imm8), 0);
7934 BI opval = EQSI (ANDSI (* FLD (i_rn), FLD (f_ror_imm8)), 0);
7935 current_cpu->hardware.h_zbit = opval;
7936 if (current_cpu->trace_result_p)
7937 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7940 BI opval = LTSI (ANDSI (* FLD (i_rn), FLD (f_ror_imm8)), 0);
7941 current_cpu->hardware.h_nbit = opval;
7942 if (current_cpu->trace_result_p)
7943 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
7947 BI opval = tmp_carry_out;
7948 current_cpu->hardware.h_cbit = opval;
7949 if (current_cpu->trace_result_p)
7950 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
7955 current_cpu->done_insn (npc, status);
7960 // ********** teq-reg/imm-shift: teq$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
7963 arm_sem_teq_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
7965 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
7966 sem_status status = SEM_STATUS_NORMAL;
7967 arm_scache* abuf = sem;
7968 PCADDR pc = abuf->addr;
7969 PCADDR npc = pc + 4;
7975 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
7976 tmp_carry_out = current_cpu->compute_carry_out_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm), current_cpu->hardware.h_cbit);
7977 tmp_result = XORSI (* FLD (i_rn), tmp_operand2);
7978 if (EQSI (FLD (f_rd), 15)) {
7980 SI opval = current_cpu->h_spsr_get ();
7981 current_cpu->h_cpsr_set (opval);
7982 if (current_cpu->trace_result_p)
7983 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
7989 BI opval = EQSI (tmp_result, 0);
7990 current_cpu->hardware.h_zbit = opval;
7991 if (current_cpu->trace_result_p)
7992 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
7995 BI opval = LTSI (tmp_result, 0);
7996 current_cpu->hardware.h_nbit = opval;
7997 if (current_cpu->trace_result_p)
7998 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8002 BI opval = tmp_carry_out;
8003 current_cpu->hardware.h_cbit = opval;
8004 if (current_cpu->trace_result_p)
8005 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8011 current_cpu->done_insn (npc, status);
8016 // ********** teq-reg/reg-shift: teq$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
8019 arm_sem_teq_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
8021 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
8022 sem_status status = SEM_STATUS_NORMAL;
8023 arm_scache* abuf = sem;
8024 PCADDR pc = abuf->addr;
8025 PCADDR npc = pc + 4;
8031 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
8032 tmp_carry_out = current_cpu->compute_carry_out_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg), current_cpu->hardware.h_cbit);
8033 tmp_result = XORSI (* FLD (i_rn), tmp_operand2);
8034 if (EQSI (FLD (f_rd), 15)) {
8036 SI opval = current_cpu->h_spsr_get ();
8037 current_cpu->h_cpsr_set (opval);
8038 if (current_cpu->trace_result_p)
8039 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
8045 BI opval = EQSI (tmp_result, 0);
8046 current_cpu->hardware.h_zbit = opval;
8047 if (current_cpu->trace_result_p)
8048 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8051 BI opval = LTSI (tmp_result, 0);
8052 current_cpu->hardware.h_nbit = opval;
8053 if (current_cpu->trace_result_p)
8054 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8058 BI opval = tmp_carry_out;
8059 current_cpu->hardware.h_cbit = opval;
8060 if (current_cpu->trace_result_p)
8061 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8067 current_cpu->done_insn (npc, status);
8072 // ********** teq-imm: teq${cond}${set-cc?} $rn,$imm12
8075 arm_sem_teq_imm (arm7f_cpu* current_cpu, arm_scache* sem)
8077 #define FLD(f) abuf->fields.sfmt_tst_imm.f
8078 sem_status status = SEM_STATUS_NORMAL;
8079 arm_scache* abuf = sem;
8080 PCADDR pc = abuf->addr;
8081 PCADDR npc = pc + 4;
8085 if (EQSI (FLD (f_ror_imm8_rotate), 0)) {
8086 tmp_carry_out = current_cpu->hardware.h_cbit;
8088 tmp_carry_out = LTBI (FLD (f_ror_imm8), 0);
8093 BI opval = EQSI (XORSI (* FLD (i_rn), FLD (f_ror_imm8)), 0);
8094 current_cpu->hardware.h_zbit = opval;
8095 if (current_cpu->trace_result_p)
8096 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8099 BI opval = LTSI (XORSI (* FLD (i_rn), FLD (f_ror_imm8)), 0);
8100 current_cpu->hardware.h_nbit = opval;
8101 if (current_cpu->trace_result_p)
8102 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8106 BI opval = tmp_carry_out;
8107 current_cpu->hardware.h_cbit = opval;
8108 if (current_cpu->trace_result_p)
8109 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8114 current_cpu->done_insn (npc, status);
8119 // ********** cmp-reg/imm-shift: cmp$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
8122 arm_sem_cmp_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
8124 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
8125 sem_status status = SEM_STATUS_NORMAL;
8126 arm_scache* abuf = sem;
8127 PCADDR pc = abuf->addr;
8128 PCADDR npc = pc + 4;
8132 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
8133 if (EQSI (FLD (f_rd), 15)) {
8135 SI opval = current_cpu->h_spsr_get ();
8136 current_cpu->h_cpsr_set (opval);
8137 if (current_cpu->trace_result_p)
8138 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
8143 tmp_result = SUBCSI (* FLD (i_rn), tmp_operand2, 0);
8146 BI opval = EQSI (tmp_result, 0);
8147 current_cpu->hardware.h_zbit = opval;
8148 if (current_cpu->trace_result_p)
8149 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8152 BI opval = LTSI (tmp_result, 0);
8153 current_cpu->hardware.h_nbit = opval;
8154 if (current_cpu->trace_result_p)
8155 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8159 BI opval = NOTSI (SUBCFSI (* FLD (i_rn), tmp_operand2, 0));
8160 current_cpu->hardware.h_cbit = opval;
8161 if (current_cpu->trace_result_p)
8162 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8165 BI opval = SUBOFSI (* FLD (i_rn), tmp_operand2, 0);
8166 current_cpu->hardware.h_vbit = opval;
8167 if (current_cpu->trace_result_p)
8168 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8174 current_cpu->done_insn (npc, status);
8179 // ********** cmp-reg/reg-shift: cmp$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
8182 arm_sem_cmp_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
8184 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
8185 sem_status status = SEM_STATUS_NORMAL;
8186 arm_scache* abuf = sem;
8187 PCADDR pc = abuf->addr;
8188 PCADDR npc = pc + 4;
8192 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
8193 if (EQSI (FLD (f_rd), 15)) {
8195 SI opval = current_cpu->h_spsr_get ();
8196 current_cpu->h_cpsr_set (opval);
8197 if (current_cpu->trace_result_p)
8198 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
8203 tmp_result = SUBCSI (* FLD (i_rn), tmp_operand2, 0);
8206 BI opval = EQSI (tmp_result, 0);
8207 current_cpu->hardware.h_zbit = opval;
8208 if (current_cpu->trace_result_p)
8209 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8212 BI opval = LTSI (tmp_result, 0);
8213 current_cpu->hardware.h_nbit = opval;
8214 if (current_cpu->trace_result_p)
8215 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8219 BI opval = NOTSI (SUBCFSI (* FLD (i_rn), tmp_operand2, 0));
8220 current_cpu->hardware.h_cbit = opval;
8221 if (current_cpu->trace_result_p)
8222 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8225 BI opval = SUBOFSI (* FLD (i_rn), tmp_operand2, 0);
8226 current_cpu->hardware.h_vbit = opval;
8227 if (current_cpu->trace_result_p)
8228 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8234 current_cpu->done_insn (npc, status);
8239 // ********** cmp-imm: cmp${cond}${set-cc?} $rn,$imm12
8242 arm_sem_cmp_imm (arm7f_cpu* current_cpu, arm_scache* sem)
8244 #define FLD(f) abuf->fields.sfmt_and_imm.f
8245 sem_status status = SEM_STATUS_NORMAL;
8246 arm_scache* abuf = sem;
8247 PCADDR pc = abuf->addr;
8248 PCADDR npc = pc + 4;
8252 tmp_result = SUBCSI (* FLD (i_rn), FLD (f_imm12), 0);
8255 BI opval = EQSI (tmp_result, 0);
8256 current_cpu->hardware.h_zbit = opval;
8257 if (current_cpu->trace_result_p)
8258 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8261 BI opval = LTSI (tmp_result, 0);
8262 current_cpu->hardware.h_nbit = opval;
8263 if (current_cpu->trace_result_p)
8264 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8268 BI opval = NOTSI (SUBCFSI (* FLD (i_rn), FLD (f_imm12), 0));
8269 current_cpu->hardware.h_cbit = opval;
8270 if (current_cpu->trace_result_p)
8271 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8274 BI opval = SUBOFSI (* FLD (i_rn), FLD (f_imm12), 0);
8275 current_cpu->hardware.h_vbit = opval;
8276 if (current_cpu->trace_result_p)
8277 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8281 current_cpu->done_insn (npc, status);
8286 // ********** cmn-reg/imm-shift: cmn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
8289 arm_sem_cmn_reg_imm_shift (arm7f_cpu* current_cpu, arm_scache* sem)
8291 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
8292 sem_status status = SEM_STATUS_NORMAL;
8293 arm_scache* abuf = sem;
8294 PCADDR pc = abuf->addr;
8295 PCADDR npc = pc + 4;
8299 tmp_operand2 = current_cpu->compute_operand2_immshift (* FLD (i_rm), FLD (f_operand2_shifttype), FLD (f_operand2_shiftimm));
8300 if (EQSI (FLD (f_rd), 15)) {
8302 SI opval = current_cpu->h_spsr_get ();
8303 current_cpu->h_cpsr_set (opval);
8304 if (current_cpu->trace_result_p)
8305 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
8310 tmp_result = ADDCSI (* FLD (i_rn), tmp_operand2, 0);
8313 BI opval = EQSI (tmp_result, 0);
8314 current_cpu->hardware.h_zbit = opval;
8315 if (current_cpu->trace_result_p)
8316 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8319 BI opval = LTSI (tmp_result, 0);
8320 current_cpu->hardware.h_nbit = opval;
8321 if (current_cpu->trace_result_p)
8322 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8326 BI opval = ADDCFSI (* FLD (i_rn), tmp_operand2, 0);
8327 current_cpu->hardware.h_cbit = opval;
8328 if (current_cpu->trace_result_p)
8329 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8332 BI opval = ADDOFSI (* FLD (i_rn), tmp_operand2, 0);
8333 current_cpu->hardware.h_vbit = opval;
8334 if (current_cpu->trace_result_p)
8335 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8341 current_cpu->done_insn (npc, status);
8346 // ********** cmn-reg/reg-shift: cmn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
8349 arm_sem_cmn_reg_reg_shift (arm7f_cpu* current_cpu, arm_scache* sem)
8351 #define FLD(f) abuf->fields.sfmt_and_reg_reg_shift.f
8352 sem_status status = SEM_STATUS_NORMAL;
8353 arm_scache* abuf = sem;
8354 PCADDR pc = abuf->addr;
8355 PCADDR npc = pc + 4;
8359 tmp_operand2 = current_cpu->compute_operand2_regshift (* FLD (i_rm), FLD (f_operand2_shifttype), * FLD (i_operand2_shiftreg));
8360 if (EQSI (FLD (f_rd), 15)) {
8362 SI opval = current_cpu->h_spsr_get ();
8363 current_cpu->h_cpsr_set (opval);
8364 if (current_cpu->trace_result_p)
8365 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
8370 tmp_result = ADDCSI (* FLD (i_rn), tmp_operand2, 0);
8373 BI opval = EQSI (tmp_result, 0);
8374 current_cpu->hardware.h_zbit = opval;
8375 if (current_cpu->trace_result_p)
8376 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8379 BI opval = LTSI (tmp_result, 0);
8380 current_cpu->hardware.h_nbit = opval;
8381 if (current_cpu->trace_result_p)
8382 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8386 BI opval = ADDCFSI (* FLD (i_rn), tmp_operand2, 0);
8387 current_cpu->hardware.h_cbit = opval;
8388 if (current_cpu->trace_result_p)
8389 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8392 BI opval = ADDOFSI (* FLD (i_rn), tmp_operand2, 0);
8393 current_cpu->hardware.h_vbit = opval;
8394 if (current_cpu->trace_result_p)
8395 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8401 current_cpu->done_insn (npc, status);
8406 // ********** cmn-imm: cmn${cond}${set-cc?} $rn,$imm12
8409 arm_sem_cmn_imm (arm7f_cpu* current_cpu, arm_scache* sem)
8411 #define FLD(f) abuf->fields.sfmt_and_imm.f
8412 sem_status status = SEM_STATUS_NORMAL;
8413 arm_scache* abuf = sem;
8414 PCADDR pc = abuf->addr;
8415 PCADDR npc = pc + 4;
8419 tmp_result = ADDCSI (* FLD (i_rn), FLD (f_imm12), 0);
8422 BI opval = EQSI (tmp_result, 0);
8423 current_cpu->hardware.h_zbit = opval;
8424 if (current_cpu->trace_result_p)
8425 current_cpu->trace_stream << "zbit" << ":=0x" << hex << opval << dec << " ";
8428 BI opval = LTSI (tmp_result, 0);
8429 current_cpu->hardware.h_nbit = opval;
8430 if (current_cpu->trace_result_p)
8431 current_cpu->trace_stream << "nbit" << ":=0x" << hex << opval << dec << " ";
8435 BI opval = ADDCFSI (* FLD (i_rn), FLD (f_imm12), 0);
8436 current_cpu->hardware.h_cbit = opval;
8437 if (current_cpu->trace_result_p)
8438 current_cpu->trace_stream << "cbit" << ":=0x" << hex << opval << dec << " ";
8441 BI opval = ADDOFSI (* FLD (i_rn), FLD (f_imm12), 0);
8442 current_cpu->hardware.h_vbit = opval;
8443 if (current_cpu->trace_result_p)
8444 current_cpu->trace_stream << "vbit" << ":=0x" << hex << opval << dec << " ";
8448 current_cpu->done_insn (npc, status);
8453 // ********** ldmda: FIXME
8456 arm_sem_ldmda (arm7f_cpu* current_cpu, arm_scache* sem)
8458 #define FLD(f) abuf->fields.sfmt_ldmda.f
8459 sem_status status = SEM_STATUS_NORMAL;
8460 arm_scache* abuf = sem;
8461 PCADDR pc = abuf->addr;
8462 PCADDR npc = pc + 4;
8466 tmp_addr = * FLD (i_rn);
8467 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
8470 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8471 current_cpu->branch (opval, npc, status);
8472 if (current_cpu->trace_result_p)
8473 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
8475 tmp_addr = SUBSI (tmp_addr, 4);
8478 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
8481 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8482 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
8483 if (current_cpu->trace_result_p)
8484 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
8486 tmp_addr = SUBSI (tmp_addr, 4);
8489 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
8492 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8493 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
8494 if (current_cpu->trace_result_p)
8495 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
8497 tmp_addr = SUBSI (tmp_addr, 4);
8500 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
8503 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8504 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
8505 if (current_cpu->trace_result_p)
8506 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
8508 tmp_addr = SUBSI (tmp_addr, 4);
8511 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
8514 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8515 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
8516 if (current_cpu->trace_result_p)
8517 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
8519 tmp_addr = SUBSI (tmp_addr, 4);
8522 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
8525 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8526 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
8527 if (current_cpu->trace_result_p)
8528 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
8530 tmp_addr = SUBSI (tmp_addr, 4);
8533 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
8536 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8537 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
8538 if (current_cpu->trace_result_p)
8539 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
8541 tmp_addr = SUBSI (tmp_addr, 4);
8544 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
8547 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8548 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
8549 if (current_cpu->trace_result_p)
8550 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
8552 tmp_addr = SUBSI (tmp_addr, 4);
8555 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
8558 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8559 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
8560 if (current_cpu->trace_result_p)
8561 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
8563 tmp_addr = SUBSI (tmp_addr, 4);
8566 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
8569 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8570 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
8571 if (current_cpu->trace_result_p)
8572 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
8574 tmp_addr = SUBSI (tmp_addr, 4);
8577 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
8580 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8581 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
8582 if (current_cpu->trace_result_p)
8583 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
8585 tmp_addr = SUBSI (tmp_addr, 4);
8588 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
8591 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8592 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
8593 if (current_cpu->trace_result_p)
8594 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
8596 tmp_addr = SUBSI (tmp_addr, 4);
8599 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
8602 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8603 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
8604 if (current_cpu->trace_result_p)
8605 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
8607 tmp_addr = SUBSI (tmp_addr, 4);
8610 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
8613 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8614 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
8615 if (current_cpu->trace_result_p)
8616 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
8618 tmp_addr = SUBSI (tmp_addr, 4);
8621 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
8624 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8625 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
8626 if (current_cpu->trace_result_p)
8627 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
8629 tmp_addr = SUBSI (tmp_addr, 4);
8632 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
8635 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8636 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
8637 if (current_cpu->trace_result_p)
8638 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
8640 tmp_addr = SUBSI (tmp_addr, 4);
8645 current_cpu->done_cti_insn (npc, status);
8650 // ********** ldmda-wb: FIXME
8653 arm_sem_ldmda_wb (arm7f_cpu* current_cpu, arm_scache* sem)
8655 #define FLD(f) abuf->fields.sfmt_ldmda.f
8656 sem_status status = SEM_STATUS_NORMAL;
8657 arm_scache* abuf = sem;
8658 PCADDR pc = abuf->addr;
8659 PCADDR npc = pc + 4;
8663 tmp_addr = * FLD (i_rn);
8664 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
8667 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8668 current_cpu->branch (opval, npc, status);
8669 if (current_cpu->trace_result_p)
8670 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
8672 tmp_addr = SUBSI (tmp_addr, 4);
8675 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
8678 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8679 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
8680 if (current_cpu->trace_result_p)
8681 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
8683 tmp_addr = SUBSI (tmp_addr, 4);
8686 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
8689 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8690 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
8691 if (current_cpu->trace_result_p)
8692 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
8694 tmp_addr = SUBSI (tmp_addr, 4);
8697 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
8700 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8701 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
8702 if (current_cpu->trace_result_p)
8703 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
8705 tmp_addr = SUBSI (tmp_addr, 4);
8708 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
8711 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8712 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
8713 if (current_cpu->trace_result_p)
8714 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
8716 tmp_addr = SUBSI (tmp_addr, 4);
8719 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
8722 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8723 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
8724 if (current_cpu->trace_result_p)
8725 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
8727 tmp_addr = SUBSI (tmp_addr, 4);
8730 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
8733 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8734 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
8735 if (current_cpu->trace_result_p)
8736 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
8738 tmp_addr = SUBSI (tmp_addr, 4);
8741 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
8744 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8745 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
8746 if (current_cpu->trace_result_p)
8747 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
8749 tmp_addr = SUBSI (tmp_addr, 4);
8752 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
8755 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8756 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
8757 if (current_cpu->trace_result_p)
8758 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
8760 tmp_addr = SUBSI (tmp_addr, 4);
8763 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
8766 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8767 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
8768 if (current_cpu->trace_result_p)
8769 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
8771 tmp_addr = SUBSI (tmp_addr, 4);
8774 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
8777 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8778 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
8779 if (current_cpu->trace_result_p)
8780 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
8782 tmp_addr = SUBSI (tmp_addr, 4);
8785 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
8788 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8789 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
8790 if (current_cpu->trace_result_p)
8791 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
8793 tmp_addr = SUBSI (tmp_addr, 4);
8796 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
8799 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8800 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
8801 if (current_cpu->trace_result_p)
8802 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
8804 tmp_addr = SUBSI (tmp_addr, 4);
8807 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
8810 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8811 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
8812 if (current_cpu->trace_result_p)
8813 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
8815 tmp_addr = SUBSI (tmp_addr, 4);
8818 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
8821 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8822 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
8823 if (current_cpu->trace_result_p)
8824 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
8826 tmp_addr = SUBSI (tmp_addr, 4);
8829 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
8832 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8833 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
8834 if (current_cpu->trace_result_p)
8835 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
8837 tmp_addr = SUBSI (tmp_addr, 4);
8841 SI opval = tmp_addr;
8842 * FLD (i_rn) = opval;
8843 if (current_cpu->trace_result_p)
8844 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
8848 current_cpu->done_cti_insn (npc, status);
8853 // ********** ldmib: FIXME
8856 arm_sem_ldmib (arm7f_cpu* current_cpu, arm_scache* sem)
8858 #define FLD(f) abuf->fields.sfmt_ldmda.f
8859 sem_status status = SEM_STATUS_NORMAL;
8860 arm_scache* abuf = sem;
8861 PCADDR pc = abuf->addr;
8862 PCADDR npc = pc + 4;
8866 tmp_addr = * FLD (i_rn);
8867 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
8869 tmp_addr = ADDSI (tmp_addr, 4);
8871 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8872 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
8873 if (current_cpu->trace_result_p)
8874 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
8878 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
8880 tmp_addr = ADDSI (tmp_addr, 4);
8882 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8883 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
8884 if (current_cpu->trace_result_p)
8885 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
8889 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
8891 tmp_addr = ADDSI (tmp_addr, 4);
8893 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8894 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
8895 if (current_cpu->trace_result_p)
8896 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
8900 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
8902 tmp_addr = ADDSI (tmp_addr, 4);
8904 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8905 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
8906 if (current_cpu->trace_result_p)
8907 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
8911 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
8913 tmp_addr = ADDSI (tmp_addr, 4);
8915 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8916 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
8917 if (current_cpu->trace_result_p)
8918 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
8922 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
8924 tmp_addr = ADDSI (tmp_addr, 4);
8926 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8927 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
8928 if (current_cpu->trace_result_p)
8929 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
8933 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
8935 tmp_addr = ADDSI (tmp_addr, 4);
8937 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8938 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
8939 if (current_cpu->trace_result_p)
8940 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
8944 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
8946 tmp_addr = ADDSI (tmp_addr, 4);
8948 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8949 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
8950 if (current_cpu->trace_result_p)
8951 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
8955 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
8957 tmp_addr = ADDSI (tmp_addr, 4);
8959 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8960 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
8961 if (current_cpu->trace_result_p)
8962 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
8966 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
8968 tmp_addr = ADDSI (tmp_addr, 4);
8970 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8971 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
8972 if (current_cpu->trace_result_p)
8973 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
8977 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
8979 tmp_addr = ADDSI (tmp_addr, 4);
8981 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8982 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
8983 if (current_cpu->trace_result_p)
8984 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
8988 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
8990 tmp_addr = ADDSI (tmp_addr, 4);
8992 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
8993 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
8994 if (current_cpu->trace_result_p)
8995 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
8999 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9001 tmp_addr = ADDSI (tmp_addr, 4);
9003 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9004 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9005 if (current_cpu->trace_result_p)
9006 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9010 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9012 tmp_addr = ADDSI (tmp_addr, 4);
9014 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9015 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9016 if (current_cpu->trace_result_p)
9017 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9021 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9023 tmp_addr = ADDSI (tmp_addr, 4);
9025 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9026 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9027 if (current_cpu->trace_result_p)
9028 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9032 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9034 tmp_addr = ADDSI (tmp_addr, 4);
9036 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9037 current_cpu->branch (opval, npc, status);
9038 if (current_cpu->trace_result_p)
9039 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9045 current_cpu->done_cti_insn (npc, status);
9050 // ********** ldmib-wb: FIXME
9053 arm_sem_ldmib_wb (arm7f_cpu* current_cpu, arm_scache* sem)
9055 #define FLD(f) abuf->fields.sfmt_ldmda.f
9056 sem_status status = SEM_STATUS_NORMAL;
9057 arm_scache* abuf = sem;
9058 PCADDR pc = abuf->addr;
9059 PCADDR npc = pc + 4;
9063 tmp_addr = * FLD (i_rn);
9064 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
9066 tmp_addr = ADDSI (tmp_addr, 4);
9068 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9069 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
9070 if (current_cpu->trace_result_p)
9071 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
9075 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
9077 tmp_addr = ADDSI (tmp_addr, 4);
9079 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9080 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
9081 if (current_cpu->trace_result_p)
9082 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
9086 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
9088 tmp_addr = ADDSI (tmp_addr, 4);
9090 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9091 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
9092 if (current_cpu->trace_result_p)
9093 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
9097 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
9099 tmp_addr = ADDSI (tmp_addr, 4);
9101 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9102 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
9103 if (current_cpu->trace_result_p)
9104 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
9108 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
9110 tmp_addr = ADDSI (tmp_addr, 4);
9112 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9113 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
9114 if (current_cpu->trace_result_p)
9115 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
9119 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
9121 tmp_addr = ADDSI (tmp_addr, 4);
9123 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9124 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
9125 if (current_cpu->trace_result_p)
9126 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
9130 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
9132 tmp_addr = ADDSI (tmp_addr, 4);
9134 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9135 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
9136 if (current_cpu->trace_result_p)
9137 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
9141 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
9143 tmp_addr = ADDSI (tmp_addr, 4);
9145 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9146 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
9147 if (current_cpu->trace_result_p)
9148 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
9152 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
9154 tmp_addr = ADDSI (tmp_addr, 4);
9156 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9157 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
9158 if (current_cpu->trace_result_p)
9159 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
9163 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
9165 tmp_addr = ADDSI (tmp_addr, 4);
9167 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9168 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
9169 if (current_cpu->trace_result_p)
9170 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
9174 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
9176 tmp_addr = ADDSI (tmp_addr, 4);
9178 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9179 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
9180 if (current_cpu->trace_result_p)
9181 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
9185 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
9187 tmp_addr = ADDSI (tmp_addr, 4);
9189 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9190 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
9191 if (current_cpu->trace_result_p)
9192 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
9196 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9198 tmp_addr = ADDSI (tmp_addr, 4);
9200 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9201 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9202 if (current_cpu->trace_result_p)
9203 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9207 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9209 tmp_addr = ADDSI (tmp_addr, 4);
9211 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9212 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9213 if (current_cpu->trace_result_p)
9214 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9218 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9220 tmp_addr = ADDSI (tmp_addr, 4);
9222 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9223 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9224 if (current_cpu->trace_result_p)
9225 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9229 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9231 tmp_addr = ADDSI (tmp_addr, 4);
9233 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9234 current_cpu->branch (opval, npc, status);
9235 if (current_cpu->trace_result_p)
9236 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9241 SI opval = tmp_addr;
9242 * FLD (i_rn) = opval;
9243 if (current_cpu->trace_result_p)
9244 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
9248 current_cpu->done_cti_insn (npc, status);
9253 // ********** ldmia: FIXME
9256 arm_sem_ldmia (arm7f_cpu* current_cpu, arm_scache* sem)
9258 #define FLD(f) abuf->fields.sfmt_ldmda.f
9259 sem_status status = SEM_STATUS_NORMAL;
9260 arm_scache* abuf = sem;
9261 PCADDR pc = abuf->addr;
9262 PCADDR npc = pc + 4;
9266 tmp_addr = * FLD (i_rn);
9267 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
9270 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9271 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
9272 if (current_cpu->trace_result_p)
9273 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
9275 tmp_addr = ADDSI (tmp_addr, 4);
9278 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
9281 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9282 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
9283 if (current_cpu->trace_result_p)
9284 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
9286 tmp_addr = ADDSI (tmp_addr, 4);
9289 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
9292 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9293 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
9294 if (current_cpu->trace_result_p)
9295 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
9297 tmp_addr = ADDSI (tmp_addr, 4);
9300 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
9303 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9304 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
9305 if (current_cpu->trace_result_p)
9306 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
9308 tmp_addr = ADDSI (tmp_addr, 4);
9311 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
9314 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9315 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
9316 if (current_cpu->trace_result_p)
9317 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
9319 tmp_addr = ADDSI (tmp_addr, 4);
9322 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
9325 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9326 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
9327 if (current_cpu->trace_result_p)
9328 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
9330 tmp_addr = ADDSI (tmp_addr, 4);
9333 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
9336 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9337 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
9338 if (current_cpu->trace_result_p)
9339 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
9341 tmp_addr = ADDSI (tmp_addr, 4);
9344 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
9347 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9348 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
9349 if (current_cpu->trace_result_p)
9350 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
9352 tmp_addr = ADDSI (tmp_addr, 4);
9355 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
9358 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9359 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
9360 if (current_cpu->trace_result_p)
9361 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
9363 tmp_addr = ADDSI (tmp_addr, 4);
9366 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
9369 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9370 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
9371 if (current_cpu->trace_result_p)
9372 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
9374 tmp_addr = ADDSI (tmp_addr, 4);
9377 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
9380 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9381 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
9382 if (current_cpu->trace_result_p)
9383 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
9385 tmp_addr = ADDSI (tmp_addr, 4);
9388 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
9391 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9392 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
9393 if (current_cpu->trace_result_p)
9394 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
9396 tmp_addr = ADDSI (tmp_addr, 4);
9399 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9402 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9403 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9404 if (current_cpu->trace_result_p)
9405 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9407 tmp_addr = ADDSI (tmp_addr, 4);
9410 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9413 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9414 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9415 if (current_cpu->trace_result_p)
9416 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9418 tmp_addr = ADDSI (tmp_addr, 4);
9421 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9424 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9425 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9426 if (current_cpu->trace_result_p)
9427 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9429 tmp_addr = ADDSI (tmp_addr, 4);
9432 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9435 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9436 current_cpu->branch (opval, npc, status);
9437 if (current_cpu->trace_result_p)
9438 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9440 tmp_addr = ADDSI (tmp_addr, 4);
9445 current_cpu->done_cti_insn (npc, status);
9450 // ********** ldmia-wb: FIXME
9453 arm_sem_ldmia_wb (arm7f_cpu* current_cpu, arm_scache* sem)
9455 #define FLD(f) abuf->fields.sfmt_ldmda.f
9456 sem_status status = SEM_STATUS_NORMAL;
9457 arm_scache* abuf = sem;
9458 PCADDR pc = abuf->addr;
9459 PCADDR npc = pc + 4;
9463 tmp_addr = * FLD (i_rn);
9464 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
9467 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9468 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
9469 if (current_cpu->trace_result_p)
9470 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
9472 tmp_addr = ADDSI (tmp_addr, 4);
9475 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
9478 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9479 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
9480 if (current_cpu->trace_result_p)
9481 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
9483 tmp_addr = ADDSI (tmp_addr, 4);
9486 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
9489 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9490 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
9491 if (current_cpu->trace_result_p)
9492 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
9494 tmp_addr = ADDSI (tmp_addr, 4);
9497 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
9500 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9501 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
9502 if (current_cpu->trace_result_p)
9503 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
9505 tmp_addr = ADDSI (tmp_addr, 4);
9508 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
9511 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9512 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
9513 if (current_cpu->trace_result_p)
9514 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
9516 tmp_addr = ADDSI (tmp_addr, 4);
9519 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
9522 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9523 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
9524 if (current_cpu->trace_result_p)
9525 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
9527 tmp_addr = ADDSI (tmp_addr, 4);
9530 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
9533 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9534 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
9535 if (current_cpu->trace_result_p)
9536 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
9538 tmp_addr = ADDSI (tmp_addr, 4);
9541 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
9544 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9545 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
9546 if (current_cpu->trace_result_p)
9547 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
9549 tmp_addr = ADDSI (tmp_addr, 4);
9552 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
9555 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9556 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
9557 if (current_cpu->trace_result_p)
9558 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
9560 tmp_addr = ADDSI (tmp_addr, 4);
9563 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
9566 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9567 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
9568 if (current_cpu->trace_result_p)
9569 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
9571 tmp_addr = ADDSI (tmp_addr, 4);
9574 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
9577 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9578 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
9579 if (current_cpu->trace_result_p)
9580 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
9582 tmp_addr = ADDSI (tmp_addr, 4);
9585 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
9588 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9589 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
9590 if (current_cpu->trace_result_p)
9591 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
9593 tmp_addr = ADDSI (tmp_addr, 4);
9596 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9599 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9600 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9601 if (current_cpu->trace_result_p)
9602 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9604 tmp_addr = ADDSI (tmp_addr, 4);
9607 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9610 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9611 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9612 if (current_cpu->trace_result_p)
9613 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9615 tmp_addr = ADDSI (tmp_addr, 4);
9618 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9621 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9622 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9623 if (current_cpu->trace_result_p)
9624 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9626 tmp_addr = ADDSI (tmp_addr, 4);
9629 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9632 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9633 current_cpu->branch (opval, npc, status);
9634 if (current_cpu->trace_result_p)
9635 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9637 tmp_addr = ADDSI (tmp_addr, 4);
9641 SI opval = tmp_addr;
9642 * FLD (i_rn) = opval;
9643 if (current_cpu->trace_result_p)
9644 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
9648 current_cpu->done_cti_insn (npc, status);
9653 // ********** ldmdb: ldm$cond ..
9656 arm_sem_ldmdb (arm7f_cpu* current_cpu, arm_scache* sem)
9658 #define FLD(f) abuf->fields.sfmt_ldmda.f
9659 sem_status status = SEM_STATUS_NORMAL;
9660 arm_scache* abuf = sem;
9661 PCADDR pc = abuf->addr;
9662 PCADDR npc = pc + 4;
9666 tmp_addr = * FLD (i_rn);
9667 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9669 tmp_addr = SUBSI (tmp_addr, 4);
9671 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9672 current_cpu->branch (opval, npc, status);
9673 if (current_cpu->trace_result_p)
9674 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9678 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9680 tmp_addr = SUBSI (tmp_addr, 4);
9682 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9683 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9684 if (current_cpu->trace_result_p)
9685 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9689 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9691 tmp_addr = SUBSI (tmp_addr, 4);
9693 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9694 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9695 if (current_cpu->trace_result_p)
9696 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9700 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9702 tmp_addr = SUBSI (tmp_addr, 4);
9704 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9705 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9706 if (current_cpu->trace_result_p)
9707 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9711 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
9713 tmp_addr = SUBSI (tmp_addr, 4);
9715 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9716 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
9717 if (current_cpu->trace_result_p)
9718 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
9722 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
9724 tmp_addr = SUBSI (tmp_addr, 4);
9726 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9727 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
9728 if (current_cpu->trace_result_p)
9729 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
9733 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
9735 tmp_addr = SUBSI (tmp_addr, 4);
9737 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9738 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
9739 if (current_cpu->trace_result_p)
9740 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
9744 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
9746 tmp_addr = SUBSI (tmp_addr, 4);
9748 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9749 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
9750 if (current_cpu->trace_result_p)
9751 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
9755 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
9757 tmp_addr = SUBSI (tmp_addr, 4);
9759 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9760 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
9761 if (current_cpu->trace_result_p)
9762 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
9766 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
9768 tmp_addr = SUBSI (tmp_addr, 4);
9770 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9771 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
9772 if (current_cpu->trace_result_p)
9773 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
9777 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
9779 tmp_addr = SUBSI (tmp_addr, 4);
9781 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9782 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
9783 if (current_cpu->trace_result_p)
9784 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
9788 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
9790 tmp_addr = SUBSI (tmp_addr, 4);
9792 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9793 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
9794 if (current_cpu->trace_result_p)
9795 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
9799 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
9801 tmp_addr = SUBSI (tmp_addr, 4);
9803 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9804 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
9805 if (current_cpu->trace_result_p)
9806 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
9810 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
9812 tmp_addr = SUBSI (tmp_addr, 4);
9814 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9815 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
9816 if (current_cpu->trace_result_p)
9817 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
9821 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
9823 tmp_addr = SUBSI (tmp_addr, 4);
9825 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9826 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
9827 if (current_cpu->trace_result_p)
9828 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
9832 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
9834 tmp_addr = SUBSI (tmp_addr, 4);
9836 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9837 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
9838 if (current_cpu->trace_result_p)
9839 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
9845 current_cpu->done_cti_insn (npc, status);
9850 // ********** ldmdb-wb: FIXME
9853 arm_sem_ldmdb_wb (arm7f_cpu* current_cpu, arm_scache* sem)
9855 #define FLD(f) abuf->fields.sfmt_ldmda.f
9856 sem_status status = SEM_STATUS_NORMAL;
9857 arm_scache* abuf = sem;
9858 PCADDR pc = abuf->addr;
9859 PCADDR npc = pc + 4;
9863 tmp_addr = * FLD (i_rn);
9864 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
9866 tmp_addr = SUBSI (tmp_addr, 4);
9868 USI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9869 current_cpu->branch (opval, npc, status);
9870 if (current_cpu->trace_result_p)
9871 current_cpu->trace_stream << "pc" << ":=0x" << hex << opval << dec << " ";
9875 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
9877 tmp_addr = SUBSI (tmp_addr, 4);
9879 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9880 current_cpu->hardware.h_gr[((UINT) 14)] = opval;
9881 if (current_cpu->trace_result_p)
9882 current_cpu->trace_stream << "gr-14" << '[' << ((UINT) 14) << ']' << ":=0x" << hex << opval << dec << " ";
9886 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
9888 tmp_addr = SUBSI (tmp_addr, 4);
9890 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9891 current_cpu->hardware.h_gr[((UINT) 13)] = opval;
9892 if (current_cpu->trace_result_p)
9893 current_cpu->trace_stream << "gr-13" << '[' << ((UINT) 13) << ']' << ":=0x" << hex << opval << dec << " ";
9897 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
9899 tmp_addr = SUBSI (tmp_addr, 4);
9901 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9902 current_cpu->hardware.h_gr[((UINT) 12)] = opval;
9903 if (current_cpu->trace_result_p)
9904 current_cpu->trace_stream << "gr-12" << '[' << ((UINT) 12) << ']' << ":=0x" << hex << opval << dec << " ";
9908 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
9910 tmp_addr = SUBSI (tmp_addr, 4);
9912 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9913 current_cpu->hardware.h_gr[((UINT) 11)] = opval;
9914 if (current_cpu->trace_result_p)
9915 current_cpu->trace_stream << "gr-11" << '[' << ((UINT) 11) << ']' << ":=0x" << hex << opval << dec << " ";
9919 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
9921 tmp_addr = SUBSI (tmp_addr, 4);
9923 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9924 current_cpu->hardware.h_gr[((UINT) 10)] = opval;
9925 if (current_cpu->trace_result_p)
9926 current_cpu->trace_stream << "gr-10" << '[' << ((UINT) 10) << ']' << ":=0x" << hex << opval << dec << " ";
9930 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
9932 tmp_addr = SUBSI (tmp_addr, 4);
9934 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9935 current_cpu->hardware.h_gr[((UINT) 9)] = opval;
9936 if (current_cpu->trace_result_p)
9937 current_cpu->trace_stream << "gr-9" << '[' << ((UINT) 9) << ']' << ":=0x" << hex << opval << dec << " ";
9941 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
9943 tmp_addr = SUBSI (tmp_addr, 4);
9945 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9946 current_cpu->hardware.h_gr[((UINT) 8)] = opval;
9947 if (current_cpu->trace_result_p)
9948 current_cpu->trace_stream << "gr-8" << '[' << ((UINT) 8) << ']' << ":=0x" << hex << opval << dec << " ";
9952 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
9954 tmp_addr = SUBSI (tmp_addr, 4);
9956 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9957 current_cpu->hardware.h_gr[((UINT) 7)] = opval;
9958 if (current_cpu->trace_result_p)
9959 current_cpu->trace_stream << "gr-7" << '[' << ((UINT) 7) << ']' << ":=0x" << hex << opval << dec << " ";
9963 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
9965 tmp_addr = SUBSI (tmp_addr, 4);
9967 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9968 current_cpu->hardware.h_gr[((UINT) 6)] = opval;
9969 if (current_cpu->trace_result_p)
9970 current_cpu->trace_stream << "gr-6" << '[' << ((UINT) 6) << ']' << ":=0x" << hex << opval << dec << " ";
9974 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
9976 tmp_addr = SUBSI (tmp_addr, 4);
9978 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9979 current_cpu->hardware.h_gr[((UINT) 5)] = opval;
9980 if (current_cpu->trace_result_p)
9981 current_cpu->trace_stream << "gr-5" << '[' << ((UINT) 5) << ']' << ":=0x" << hex << opval << dec << " ";
9985 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
9987 tmp_addr = SUBSI (tmp_addr, 4);
9989 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
9990 current_cpu->hardware.h_gr[((UINT) 4)] = opval;
9991 if (current_cpu->trace_result_p)
9992 current_cpu->trace_stream << "gr-4" << '[' << ((UINT) 4) << ']' << ":=0x" << hex << opval << dec << " ";
9996 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
9998 tmp_addr = SUBSI (tmp_addr, 4);
10000 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
10001 current_cpu->hardware.h_gr[((UINT) 3)] = opval;
10002 if (current_cpu->trace_result_p)
10003 current_cpu->trace_stream << "gr-3" << '[' << ((UINT) 3) << ']' << ":=0x" << hex << opval << dec << " ";
10007 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10009 tmp_addr = SUBSI (tmp_addr, 4);
10011 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
10012 current_cpu->hardware.h_gr[((UINT) 2)] = opval;
10013 if (current_cpu->trace_result_p)
10014 current_cpu->trace_stream << "gr-2" << '[' << ((UINT) 2) << ']' << ":=0x" << hex << opval << dec << " ";
10018 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10020 tmp_addr = SUBSI (tmp_addr, 4);
10022 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
10023 current_cpu->hardware.h_gr[((UINT) 1)] = opval;
10024 if (current_cpu->trace_result_p)
10025 current_cpu->trace_stream << "gr-1" << '[' << ((UINT) 1) << ']' << ":=0x" << hex << opval << dec << " ";
10029 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10031 tmp_addr = SUBSI (tmp_addr, 4);
10033 SI opval = current_cpu->GETMEMSI (pc, tmp_addr);
10034 current_cpu->hardware.h_gr[((UINT) 0)] = opval;
10035 if (current_cpu->trace_result_p)
10036 current_cpu->trace_stream << "gr-0" << '[' << ((UINT) 0) << ']' << ":=0x" << hex << opval << dec << " ";
10041 SI opval = tmp_addr;
10042 * FLD (i_rn) = opval;
10043 if (current_cpu->trace_result_p)
10044 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
10048 current_cpu->done_cti_insn (npc, status);
10053 // ********** stmdb: FIXME
10056 arm_sem_stmdb (arm7f_cpu* current_cpu, arm_scache* sem)
10058 #define FLD(f) abuf->fields.sfmt_ldmda.f
10059 sem_status status = SEM_STATUS_NORMAL;
10060 arm_scache* abuf = sem;
10061 PCADDR pc = abuf->addr;
10062 PCADDR npc = pc + 4;
10066 tmp_addr = * FLD (i_rn);
10067 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
10069 tmp_addr = SUBSI (tmp_addr, 4);
10071 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
10072 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10073 if (current_cpu->trace_result_p)
10074 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10078 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
10080 tmp_addr = SUBSI (tmp_addr, 4);
10082 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
10083 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10084 if (current_cpu->trace_result_p)
10085 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10089 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
10091 tmp_addr = SUBSI (tmp_addr, 4);
10093 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
10094 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10095 if (current_cpu->trace_result_p)
10096 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10100 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
10102 tmp_addr = SUBSI (tmp_addr, 4);
10104 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
10105 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10106 if (current_cpu->trace_result_p)
10107 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10111 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
10113 tmp_addr = SUBSI (tmp_addr, 4);
10115 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
10116 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10117 if (current_cpu->trace_result_p)
10118 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10122 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
10124 tmp_addr = SUBSI (tmp_addr, 4);
10126 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
10127 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10128 if (current_cpu->trace_result_p)
10129 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10133 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
10135 tmp_addr = SUBSI (tmp_addr, 4);
10137 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
10138 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10139 if (current_cpu->trace_result_p)
10140 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10144 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
10146 tmp_addr = SUBSI (tmp_addr, 4);
10148 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
10149 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10150 if (current_cpu->trace_result_p)
10151 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10155 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
10157 tmp_addr = SUBSI (tmp_addr, 4);
10159 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
10160 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10161 if (current_cpu->trace_result_p)
10162 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10166 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
10168 tmp_addr = SUBSI (tmp_addr, 4);
10170 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
10171 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10172 if (current_cpu->trace_result_p)
10173 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10177 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
10179 tmp_addr = SUBSI (tmp_addr, 4);
10181 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
10182 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10183 if (current_cpu->trace_result_p)
10184 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10188 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
10190 tmp_addr = SUBSI (tmp_addr, 4);
10192 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
10193 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10194 if (current_cpu->trace_result_p)
10195 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10199 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
10201 tmp_addr = SUBSI (tmp_addr, 4);
10203 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
10204 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10205 if (current_cpu->trace_result_p)
10206 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10210 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10212 tmp_addr = SUBSI (tmp_addr, 4);
10214 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
10215 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10216 if (current_cpu->trace_result_p)
10217 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10221 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10223 tmp_addr = SUBSI (tmp_addr, 4);
10225 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
10226 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10227 if (current_cpu->trace_result_p)
10228 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10232 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10234 tmp_addr = SUBSI (tmp_addr, 4);
10236 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
10237 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10238 if (current_cpu->trace_result_p)
10239 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10245 current_cpu->done_insn (npc, status);
10250 // ********** stmdb-wb: FIXME
10253 arm_sem_stmdb_wb (arm7f_cpu* current_cpu, arm_scache* sem)
10255 #define FLD(f) abuf->fields.sfmt_ldmda.f
10256 sem_status status = SEM_STATUS_NORMAL;
10257 arm_scache* abuf = sem;
10258 PCADDR pc = abuf->addr;
10259 PCADDR npc = pc + 4;
10263 tmp_addr = * FLD (i_rn);
10264 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
10266 tmp_addr = SUBSI (tmp_addr, 4);
10268 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
10269 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10270 if (current_cpu->trace_result_p)
10271 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10275 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
10277 tmp_addr = SUBSI (tmp_addr, 4);
10279 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
10280 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10281 if (current_cpu->trace_result_p)
10282 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10286 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
10288 tmp_addr = SUBSI (tmp_addr, 4);
10290 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
10291 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10292 if (current_cpu->trace_result_p)
10293 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10297 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
10299 tmp_addr = SUBSI (tmp_addr, 4);
10301 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
10302 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10303 if (current_cpu->trace_result_p)
10304 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10308 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
10310 tmp_addr = SUBSI (tmp_addr, 4);
10312 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
10313 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10314 if (current_cpu->trace_result_p)
10315 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10319 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
10321 tmp_addr = SUBSI (tmp_addr, 4);
10323 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
10324 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10325 if (current_cpu->trace_result_p)
10326 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10330 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
10332 tmp_addr = SUBSI (tmp_addr, 4);
10334 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
10335 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10336 if (current_cpu->trace_result_p)
10337 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10341 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
10343 tmp_addr = SUBSI (tmp_addr, 4);
10345 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
10346 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10347 if (current_cpu->trace_result_p)
10348 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10352 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
10354 tmp_addr = SUBSI (tmp_addr, 4);
10356 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
10357 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10358 if (current_cpu->trace_result_p)
10359 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10363 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
10365 tmp_addr = SUBSI (tmp_addr, 4);
10367 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
10368 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10369 if (current_cpu->trace_result_p)
10370 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10374 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
10376 tmp_addr = SUBSI (tmp_addr, 4);
10378 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
10379 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10380 if (current_cpu->trace_result_p)
10381 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10385 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
10387 tmp_addr = SUBSI (tmp_addr, 4);
10389 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
10390 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10391 if (current_cpu->trace_result_p)
10392 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10396 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
10398 tmp_addr = SUBSI (tmp_addr, 4);
10400 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
10401 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10402 if (current_cpu->trace_result_p)
10403 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10407 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10409 tmp_addr = SUBSI (tmp_addr, 4);
10411 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
10412 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10413 if (current_cpu->trace_result_p)
10414 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10418 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10420 tmp_addr = SUBSI (tmp_addr, 4);
10422 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
10423 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10424 if (current_cpu->trace_result_p)
10425 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10429 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10431 tmp_addr = SUBSI (tmp_addr, 4);
10433 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
10434 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10435 if (current_cpu->trace_result_p)
10436 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10441 SI opval = tmp_addr;
10442 * FLD (i_rn) = opval;
10443 if (current_cpu->trace_result_p)
10444 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
10448 current_cpu->done_insn (npc, status);
10453 // ********** stmib: FIXME
10456 arm_sem_stmib (arm7f_cpu* current_cpu, arm_scache* sem)
10458 #define FLD(f) abuf->fields.sfmt_ldmda.f
10459 sem_status status = SEM_STATUS_NORMAL;
10460 arm_scache* abuf = sem;
10461 PCADDR pc = abuf->addr;
10462 PCADDR npc = pc + 4;
10466 tmp_addr = * FLD (i_rn);
10467 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10469 tmp_addr = ADDSI (tmp_addr, 4);
10471 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
10472 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10473 if (current_cpu->trace_result_p)
10474 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10478 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10480 tmp_addr = ADDSI (tmp_addr, 4);
10482 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
10483 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10484 if (current_cpu->trace_result_p)
10485 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10489 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10491 tmp_addr = ADDSI (tmp_addr, 4);
10493 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
10494 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10495 if (current_cpu->trace_result_p)
10496 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10500 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
10502 tmp_addr = ADDSI (tmp_addr, 4);
10504 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
10505 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10506 if (current_cpu->trace_result_p)
10507 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10511 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
10513 tmp_addr = ADDSI (tmp_addr, 4);
10515 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
10516 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10517 if (current_cpu->trace_result_p)
10518 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10522 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
10524 tmp_addr = ADDSI (tmp_addr, 4);
10526 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
10527 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10528 if (current_cpu->trace_result_p)
10529 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10533 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
10535 tmp_addr = ADDSI (tmp_addr, 4);
10537 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
10538 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10539 if (current_cpu->trace_result_p)
10540 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10544 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
10546 tmp_addr = ADDSI (tmp_addr, 4);
10548 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
10549 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10550 if (current_cpu->trace_result_p)
10551 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10555 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
10557 tmp_addr = ADDSI (tmp_addr, 4);
10559 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
10560 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10561 if (current_cpu->trace_result_p)
10562 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10566 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
10568 tmp_addr = ADDSI (tmp_addr, 4);
10570 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
10571 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10572 if (current_cpu->trace_result_p)
10573 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10577 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
10579 tmp_addr = ADDSI (tmp_addr, 4);
10581 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
10582 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10583 if (current_cpu->trace_result_p)
10584 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10588 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
10590 tmp_addr = ADDSI (tmp_addr, 4);
10592 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
10593 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10594 if (current_cpu->trace_result_p)
10595 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10599 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
10601 tmp_addr = ADDSI (tmp_addr, 4);
10603 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
10604 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10605 if (current_cpu->trace_result_p)
10606 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10610 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
10612 tmp_addr = ADDSI (tmp_addr, 4);
10614 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
10615 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10616 if (current_cpu->trace_result_p)
10617 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10621 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
10623 tmp_addr = ADDSI (tmp_addr, 4);
10625 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
10626 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10627 if (current_cpu->trace_result_p)
10628 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10632 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
10634 tmp_addr = ADDSI (tmp_addr, 4);
10636 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
10637 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10638 if (current_cpu->trace_result_p)
10639 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10645 current_cpu->done_insn (npc, status);
10650 // ********** stmib-wb: FIXME
10653 arm_sem_stmib_wb (arm7f_cpu* current_cpu, arm_scache* sem)
10655 #define FLD(f) abuf->fields.sfmt_ldmda.f
10656 sem_status status = SEM_STATUS_NORMAL;
10657 arm_scache* abuf = sem;
10658 PCADDR pc = abuf->addr;
10659 PCADDR npc = pc + 4;
10663 tmp_addr = * FLD (i_rn);
10664 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10666 tmp_addr = ADDSI (tmp_addr, 4);
10668 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
10669 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10670 if (current_cpu->trace_result_p)
10671 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10675 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10677 tmp_addr = ADDSI (tmp_addr, 4);
10679 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
10680 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10681 if (current_cpu->trace_result_p)
10682 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10686 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10688 tmp_addr = ADDSI (tmp_addr, 4);
10690 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
10691 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10692 if (current_cpu->trace_result_p)
10693 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10697 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
10699 tmp_addr = ADDSI (tmp_addr, 4);
10701 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
10702 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10703 if (current_cpu->trace_result_p)
10704 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10708 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
10710 tmp_addr = ADDSI (tmp_addr, 4);
10712 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
10713 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10714 if (current_cpu->trace_result_p)
10715 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10719 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
10721 tmp_addr = ADDSI (tmp_addr, 4);
10723 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
10724 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10725 if (current_cpu->trace_result_p)
10726 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10730 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
10732 tmp_addr = ADDSI (tmp_addr, 4);
10734 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
10735 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10736 if (current_cpu->trace_result_p)
10737 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10741 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
10743 tmp_addr = ADDSI (tmp_addr, 4);
10745 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
10746 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10747 if (current_cpu->trace_result_p)
10748 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10752 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
10754 tmp_addr = ADDSI (tmp_addr, 4);
10756 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
10757 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10758 if (current_cpu->trace_result_p)
10759 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10763 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
10765 tmp_addr = ADDSI (tmp_addr, 4);
10767 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
10768 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10769 if (current_cpu->trace_result_p)
10770 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10774 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
10776 tmp_addr = ADDSI (tmp_addr, 4);
10778 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
10779 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10780 if (current_cpu->trace_result_p)
10781 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10785 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
10787 tmp_addr = ADDSI (tmp_addr, 4);
10789 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
10790 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10791 if (current_cpu->trace_result_p)
10792 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10796 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
10798 tmp_addr = ADDSI (tmp_addr, 4);
10800 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
10801 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10802 if (current_cpu->trace_result_p)
10803 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10807 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
10809 tmp_addr = ADDSI (tmp_addr, 4);
10811 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
10812 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10813 if (current_cpu->trace_result_p)
10814 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10818 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
10820 tmp_addr = ADDSI (tmp_addr, 4);
10822 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
10823 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10824 if (current_cpu->trace_result_p)
10825 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10829 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
10831 tmp_addr = ADDSI (tmp_addr, 4);
10833 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
10834 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10835 if (current_cpu->trace_result_p)
10836 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10841 SI opval = tmp_addr;
10842 * FLD (i_rn) = opval;
10843 if (current_cpu->trace_result_p)
10844 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
10848 current_cpu->done_insn (npc, status);
10853 // ********** stmia: FIXME
10856 arm_sem_stmia (arm7f_cpu* current_cpu, arm_scache* sem)
10858 #define FLD(f) abuf->fields.sfmt_ldmda.f
10859 sem_status status = SEM_STATUS_NORMAL;
10860 arm_scache* abuf = sem;
10861 PCADDR pc = abuf->addr;
10862 PCADDR npc = pc + 4;
10866 tmp_addr = * FLD (i_rn);
10867 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
10870 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
10871 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10872 if (current_cpu->trace_result_p)
10873 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10875 tmp_addr = ADDSI (tmp_addr, 4);
10878 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
10881 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
10882 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10883 if (current_cpu->trace_result_p)
10884 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10886 tmp_addr = ADDSI (tmp_addr, 4);
10889 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
10892 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
10893 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10894 if (current_cpu->trace_result_p)
10895 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10897 tmp_addr = ADDSI (tmp_addr, 4);
10900 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
10903 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
10904 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10905 if (current_cpu->trace_result_p)
10906 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10908 tmp_addr = ADDSI (tmp_addr, 4);
10911 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
10914 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
10915 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10916 if (current_cpu->trace_result_p)
10917 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10919 tmp_addr = ADDSI (tmp_addr, 4);
10922 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
10925 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
10926 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10927 if (current_cpu->trace_result_p)
10928 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10930 tmp_addr = ADDSI (tmp_addr, 4);
10933 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
10936 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
10937 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10938 if (current_cpu->trace_result_p)
10939 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10941 tmp_addr = ADDSI (tmp_addr, 4);
10944 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
10947 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
10948 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10949 if (current_cpu->trace_result_p)
10950 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10952 tmp_addr = ADDSI (tmp_addr, 4);
10955 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
10958 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
10959 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10960 if (current_cpu->trace_result_p)
10961 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10963 tmp_addr = ADDSI (tmp_addr, 4);
10966 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
10969 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
10970 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10971 if (current_cpu->trace_result_p)
10972 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10974 tmp_addr = ADDSI (tmp_addr, 4);
10977 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
10980 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
10981 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10982 if (current_cpu->trace_result_p)
10983 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10985 tmp_addr = ADDSI (tmp_addr, 4);
10988 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
10991 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
10992 current_cpu->SETMEMSI (pc, tmp_addr, opval);
10993 if (current_cpu->trace_result_p)
10994 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
10996 tmp_addr = ADDSI (tmp_addr, 4);
10999 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
11002 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
11003 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11004 if (current_cpu->trace_result_p)
11005 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11007 tmp_addr = ADDSI (tmp_addr, 4);
11010 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
11013 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
11014 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11015 if (current_cpu->trace_result_p)
11016 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11018 tmp_addr = ADDSI (tmp_addr, 4);
11021 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
11024 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
11025 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11026 if (current_cpu->trace_result_p)
11027 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11029 tmp_addr = ADDSI (tmp_addr, 4);
11032 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
11035 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
11036 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11037 if (current_cpu->trace_result_p)
11038 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11040 tmp_addr = ADDSI (tmp_addr, 4);
11045 current_cpu->done_insn (npc, status);
11050 // ********** stmia-wb: FIXME
11053 arm_sem_stmia_wb (arm7f_cpu* current_cpu, arm_scache* sem)
11055 #define FLD(f) abuf->fields.sfmt_ldmda.f
11056 sem_status status = SEM_STATUS_NORMAL;
11057 arm_scache* abuf = sem;
11058 PCADDR pc = abuf->addr;
11059 PCADDR npc = pc + 4;
11063 tmp_addr = * FLD (i_rn);
11064 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
11067 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
11068 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11069 if (current_cpu->trace_result_p)
11070 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11072 tmp_addr = ADDSI (tmp_addr, 4);
11075 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
11078 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
11079 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11080 if (current_cpu->trace_result_p)
11081 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11083 tmp_addr = ADDSI (tmp_addr, 4);
11086 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
11089 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
11090 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11091 if (current_cpu->trace_result_p)
11092 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11094 tmp_addr = ADDSI (tmp_addr, 4);
11097 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
11100 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
11101 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11102 if (current_cpu->trace_result_p)
11103 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11105 tmp_addr = ADDSI (tmp_addr, 4);
11108 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
11111 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
11112 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11113 if (current_cpu->trace_result_p)
11114 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11116 tmp_addr = ADDSI (tmp_addr, 4);
11119 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
11122 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
11123 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11124 if (current_cpu->trace_result_p)
11125 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11127 tmp_addr = ADDSI (tmp_addr, 4);
11130 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
11133 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
11134 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11135 if (current_cpu->trace_result_p)
11136 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11138 tmp_addr = ADDSI (tmp_addr, 4);
11141 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
11144 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
11145 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11146 if (current_cpu->trace_result_p)
11147 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11149 tmp_addr = ADDSI (tmp_addr, 4);
11152 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
11155 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
11156 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11157 if (current_cpu->trace_result_p)
11158 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11160 tmp_addr = ADDSI (tmp_addr, 4);
11163 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
11166 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
11167 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11168 if (current_cpu->trace_result_p)
11169 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11171 tmp_addr = ADDSI (tmp_addr, 4);
11174 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
11177 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
11178 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11179 if (current_cpu->trace_result_p)
11180 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11182 tmp_addr = ADDSI (tmp_addr, 4);
11185 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
11188 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
11189 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11190 if (current_cpu->trace_result_p)
11191 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11193 tmp_addr = ADDSI (tmp_addr, 4);
11196 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
11199 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
11200 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11201 if (current_cpu->trace_result_p)
11202 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11204 tmp_addr = ADDSI (tmp_addr, 4);
11207 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
11210 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
11211 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11212 if (current_cpu->trace_result_p)
11213 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11215 tmp_addr = ADDSI (tmp_addr, 4);
11218 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
11221 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
11222 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11223 if (current_cpu->trace_result_p)
11224 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11226 tmp_addr = ADDSI (tmp_addr, 4);
11229 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
11232 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
11233 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11234 if (current_cpu->trace_result_p)
11235 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11237 tmp_addr = ADDSI (tmp_addr, 4);
11241 SI opval = tmp_addr;
11242 * FLD (i_rn) = opval;
11243 if (current_cpu->trace_result_p)
11244 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
11248 current_cpu->done_insn (npc, status);
11253 // ********** stmda: FIXME
11256 arm_sem_stmda (arm7f_cpu* current_cpu, arm_scache* sem)
11258 #define FLD(f) abuf->fields.sfmt_ldmda.f
11259 sem_status status = SEM_STATUS_NORMAL;
11260 arm_scache* abuf = sem;
11261 PCADDR pc = abuf->addr;
11262 PCADDR npc = pc + 4;
11266 tmp_addr = * FLD (i_rn);
11267 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
11270 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
11271 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11272 if (current_cpu->trace_result_p)
11273 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11275 tmp_addr = SUBSI (tmp_addr, 4);
11278 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
11281 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
11282 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11283 if (current_cpu->trace_result_p)
11284 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11286 tmp_addr = SUBSI (tmp_addr, 4);
11289 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
11292 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
11293 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11294 if (current_cpu->trace_result_p)
11295 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11297 tmp_addr = SUBSI (tmp_addr, 4);
11300 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
11303 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
11304 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11305 if (current_cpu->trace_result_p)
11306 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11308 tmp_addr = SUBSI (tmp_addr, 4);
11311 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
11314 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
11315 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11316 if (current_cpu->trace_result_p)
11317 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11319 tmp_addr = SUBSI (tmp_addr, 4);
11322 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
11325 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
11326 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11327 if (current_cpu->trace_result_p)
11328 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11330 tmp_addr = SUBSI (tmp_addr, 4);
11333 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
11336 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
11337 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11338 if (current_cpu->trace_result_p)
11339 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11341 tmp_addr = SUBSI (tmp_addr, 4);
11344 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
11347 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
11348 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11349 if (current_cpu->trace_result_p)
11350 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11352 tmp_addr = SUBSI (tmp_addr, 4);
11355 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
11358 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
11359 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11360 if (current_cpu->trace_result_p)
11361 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11363 tmp_addr = SUBSI (tmp_addr, 4);
11366 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
11369 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
11370 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11371 if (current_cpu->trace_result_p)
11372 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11374 tmp_addr = SUBSI (tmp_addr, 4);
11377 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
11380 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
11381 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11382 if (current_cpu->trace_result_p)
11383 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11385 tmp_addr = SUBSI (tmp_addr, 4);
11388 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
11391 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
11392 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11393 if (current_cpu->trace_result_p)
11394 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11396 tmp_addr = SUBSI (tmp_addr, 4);
11399 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
11402 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
11403 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11404 if (current_cpu->trace_result_p)
11405 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11407 tmp_addr = SUBSI (tmp_addr, 4);
11410 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
11413 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
11414 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11415 if (current_cpu->trace_result_p)
11416 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11418 tmp_addr = SUBSI (tmp_addr, 4);
11421 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
11424 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
11425 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11426 if (current_cpu->trace_result_p)
11427 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11429 tmp_addr = SUBSI (tmp_addr, 4);
11432 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
11435 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
11436 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11437 if (current_cpu->trace_result_p)
11438 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11440 tmp_addr = SUBSI (tmp_addr, 4);
11445 current_cpu->done_insn (npc, status);
11450 // ********** stmda-wb: FIXME
11453 arm_sem_stmda_wb (arm7f_cpu* current_cpu, arm_scache* sem)
11455 #define FLD(f) abuf->fields.sfmt_ldmda.f
11456 sem_status status = SEM_STATUS_NORMAL;
11457 arm_scache* abuf = sem;
11458 PCADDR pc = abuf->addr;
11459 PCADDR npc = pc + 4;
11463 tmp_addr = * FLD (i_rn);
11464 if (ANDSI (FLD (f_reg_list), SLLSI (1, 15))) {
11467 SI opval = ADDSI (current_cpu->hardware.h_gr[((UINT) 15)], 4);
11468 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11469 if (current_cpu->trace_result_p)
11470 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11472 tmp_addr = SUBSI (tmp_addr, 4);
11475 if (ANDSI (FLD (f_reg_list), SLLSI (1, 14))) {
11478 SI opval = current_cpu->hardware.h_gr[((UINT) 14)];
11479 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11480 if (current_cpu->trace_result_p)
11481 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11483 tmp_addr = SUBSI (tmp_addr, 4);
11486 if (ANDSI (FLD (f_reg_list), SLLSI (1, 13))) {
11489 SI opval = current_cpu->hardware.h_gr[((UINT) 13)];
11490 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11491 if (current_cpu->trace_result_p)
11492 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11494 tmp_addr = SUBSI (tmp_addr, 4);
11497 if (ANDSI (FLD (f_reg_list), SLLSI (1, 12))) {
11500 SI opval = current_cpu->hardware.h_gr[((UINT) 12)];
11501 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11502 if (current_cpu->trace_result_p)
11503 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11505 tmp_addr = SUBSI (tmp_addr, 4);
11508 if (ANDSI (FLD (f_reg_list), SLLSI (1, 11))) {
11511 SI opval = current_cpu->hardware.h_gr[((UINT) 11)];
11512 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11513 if (current_cpu->trace_result_p)
11514 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11516 tmp_addr = SUBSI (tmp_addr, 4);
11519 if (ANDSI (FLD (f_reg_list), SLLSI (1, 10))) {
11522 SI opval = current_cpu->hardware.h_gr[((UINT) 10)];
11523 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11524 if (current_cpu->trace_result_p)
11525 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11527 tmp_addr = SUBSI (tmp_addr, 4);
11530 if (ANDSI (FLD (f_reg_list), SLLSI (1, 9))) {
11533 SI opval = current_cpu->hardware.h_gr[((UINT) 9)];
11534 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11535 if (current_cpu->trace_result_p)
11536 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11538 tmp_addr = SUBSI (tmp_addr, 4);
11541 if (ANDSI (FLD (f_reg_list), SLLSI (1, 8))) {
11544 SI opval = current_cpu->hardware.h_gr[((UINT) 8)];
11545 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11546 if (current_cpu->trace_result_p)
11547 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11549 tmp_addr = SUBSI (tmp_addr, 4);
11552 if (ANDSI (FLD (f_reg_list), SLLSI (1, 7))) {
11555 SI opval = current_cpu->hardware.h_gr[((UINT) 7)];
11556 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11557 if (current_cpu->trace_result_p)
11558 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11560 tmp_addr = SUBSI (tmp_addr, 4);
11563 if (ANDSI (FLD (f_reg_list), SLLSI (1, 6))) {
11566 SI opval = current_cpu->hardware.h_gr[((UINT) 6)];
11567 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11568 if (current_cpu->trace_result_p)
11569 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11571 tmp_addr = SUBSI (tmp_addr, 4);
11574 if (ANDSI (FLD (f_reg_list), SLLSI (1, 5))) {
11577 SI opval = current_cpu->hardware.h_gr[((UINT) 5)];
11578 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11579 if (current_cpu->trace_result_p)
11580 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11582 tmp_addr = SUBSI (tmp_addr, 4);
11585 if (ANDSI (FLD (f_reg_list), SLLSI (1, 4))) {
11588 SI opval = current_cpu->hardware.h_gr[((UINT) 4)];
11589 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11590 if (current_cpu->trace_result_p)
11591 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11593 tmp_addr = SUBSI (tmp_addr, 4);
11596 if (ANDSI (FLD (f_reg_list), SLLSI (1, 3))) {
11599 SI opval = current_cpu->hardware.h_gr[((UINT) 3)];
11600 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11601 if (current_cpu->trace_result_p)
11602 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11604 tmp_addr = SUBSI (tmp_addr, 4);
11607 if (ANDSI (FLD (f_reg_list), SLLSI (1, 2))) {
11610 SI opval = current_cpu->hardware.h_gr[((UINT) 2)];
11611 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11612 if (current_cpu->trace_result_p)
11613 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11615 tmp_addr = SUBSI (tmp_addr, 4);
11618 if (ANDSI (FLD (f_reg_list), SLLSI (1, 1))) {
11621 SI opval = current_cpu->hardware.h_gr[((UINT) 1)];
11622 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11623 if (current_cpu->trace_result_p)
11624 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11626 tmp_addr = SUBSI (tmp_addr, 4);
11629 if (ANDSI (FLD (f_reg_list), SLLSI (1, 0))) {
11632 SI opval = current_cpu->hardware.h_gr[((UINT) 0)];
11633 current_cpu->SETMEMSI (pc, tmp_addr, opval);
11634 if (current_cpu->trace_result_p)
11635 current_cpu->trace_stream << "memory" << '[' << "0x" << hex << (UDI) tmp_addr << dec << ']' << ":=0x" << hex << opval << dec << " ";
11637 tmp_addr = SUBSI (tmp_addr, 4);
11641 SI opval = tmp_addr;
11642 * FLD (i_rn) = opval;
11643 if (current_cpu->trace_result_p)
11644 current_cpu->trace_stream << "rn" << '[' << FLD (f_rn) << ']' << ":=0x" << hex << opval << dec << " ";
11648 current_cpu->done_insn (npc, status);
11653 // ********** mrs-c: mrs$cond $rd,cpsr
11656 arm_sem_mrs_c (arm7f_cpu* current_cpu, arm_scache* sem)
11658 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
11659 sem_status status = SEM_STATUS_NORMAL;
11660 arm_scache* abuf = sem;
11661 PCADDR pc = abuf->addr;
11662 PCADDR npc = pc + 4;
11665 SI opval = current_cpu->h_cpsr_get ();
11666 * FLD (i_rd) = opval;
11667 if (current_cpu->trace_result_p)
11668 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
11671 current_cpu->done_insn (npc, status);
11676 // ********** mrs-s: mrs$cond $rd,spsr
11679 arm_sem_mrs_s (arm7f_cpu* current_cpu, arm_scache* sem)
11681 #define FLD(f) abuf->fields.sfmt_strh_pre_dec_imm_offset.f
11682 sem_status status = SEM_STATUS_NORMAL;
11683 arm_scache* abuf = sem;
11684 PCADDR pc = abuf->addr;
11685 PCADDR npc = pc + 4;
11688 SI opval = current_cpu->h_spsr_get ();
11689 * FLD (i_rd) = opval;
11690 if (current_cpu->trace_result_p)
11691 current_cpu->trace_stream << "rd" << '[' << FLD (f_rd) << ']' << ":=0x" << hex << opval << dec << " ";
11694 current_cpu->done_insn (npc, status);
11699 // ********** msr-c: msr$cond cpsr,$rm
11702 arm_sem_msr_c (arm7f_cpu* current_cpu, arm_scache* sem)
11704 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
11705 sem_status status = SEM_STATUS_NORMAL;
11706 arm_scache* abuf = sem;
11707 PCADDR pc = abuf->addr;
11708 PCADDR npc = pc + 4;
11711 SI opval = * FLD (i_rm);
11712 current_cpu->h_cpsr_set (opval);
11713 if (current_cpu->trace_result_p)
11714 current_cpu->trace_stream << "cpsr" << ":=0x" << hex << opval << dec << " ";
11717 current_cpu->done_insn (npc, status);
11722 // ********** msr-s: msr$cond spsr,$rm
11725 arm_sem_msr_s (arm7f_cpu* current_cpu, arm_scache* sem)
11727 #define FLD(f) abuf->fields.sfmt_and_reg_imm_shift.f
11728 sem_status status = SEM_STATUS_NORMAL;
11729 arm_scache* abuf = sem;
11730 PCADDR pc = abuf->addr;
11731 PCADDR npc = pc + 4;
11734 SI opval = * FLD (i_rm);
11735 current_cpu->h_spsr_set (opval);
11736 if (current_cpu->trace_result_p)
11737 current_cpu->trace_stream << "spsr" << ":=0x" << hex << opval << dec << " ";
11740 current_cpu->done_insn (npc, status);